WO2002027779A2 - Singulation of semiconductor packages by tie bar cutting - Google Patents

Singulation of semiconductor packages by tie bar cutting Download PDF

Info

Publication number
WO2002027779A2
WO2002027779A2 PCT/US2001/029195 US0129195W WO0227779A2 WO 2002027779 A2 WO2002027779 A2 WO 2002027779A2 US 0129195 W US0129195 W US 0129195W WO 0227779 A2 WO0227779 A2 WO 0227779A2
Authority
WO
WIPO (PCT)
Prior art keywords
cutting edges
chip package
cutting
recited
edges
Prior art date
Application number
PCT/US2001/029195
Other languages
French (fr)
Other versions
WO2002027779A3 (en
Inventor
Ronald Koch
Michael Blumenauer
David Poole
Wolfgang Hetzel
Original Assignee
Infineon Technologies Richmond, Lp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Richmond, Lp filed Critical Infineon Technologies Richmond, Lp
Priority to JP2002531476A priority Critical patent/JP2004510349A/en
Priority to EP01985776A priority patent/EP1320880A2/en
Priority to KR10-2003-7004390A priority patent/KR20030069996A/en
Publication of WO2002027779A2 publication Critical patent/WO2002027779A2/en
Publication of WO2002027779A3 publication Critical patent/WO2002027779A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842Mechanical treatment, e.g. punching, cutting, deforming, cold welding

Abstract

An apparatus for separating a chip package from a carrier, in accordance with the present invention, includes a separation tool having a planar surface for supporting a chip package. The planar surface includes opposite ends, and first cutting edges are disposed on the opposite ends of the planar surface. A cutting plate has second cutting edges, and the cutting plate is operatively positioned for causing a shearing action between the first and second cutting edges to sever connections to the chip package when the first and second cutting edges engage to remove the chip package from the carrier.

Description

SINGULATION OF SEMICONDUCTOR PACKAGES BY TIE BAR CUTTING
BACKGROUND
1. Technical Field
This disclosure relates to semiconductor fabrication, and more particularly, to an apparatus for providing a slicing action to cut tie bars for semiconductor devices.
2. Description of the Related Art
Semiconductor chips are fabricated, tested and packaged. With the conventional semiconductor plastic packaging processes, several chips are processed simultaneously on a carrier called leadframe 10, as shown in FIG. 1. After the packaging has been completed and leads 8 have been cut (as shown at spacings 9) and final formed (e.g., bent in a same direction to permit board mounting) , singulating a device 11 from the leadframe 10 is performed as follows. The device 11 is still held by tie bars 14 (which is a piece of the leadframe) to a leadframe outer rail 16.
As shown in FIG. 2, during the conventional singulation operation, the device 11 is pushed up by a punch 17 while the rails 16 are being held in position, the tie bars 14 eventually break off. Ties bars 14 are broken off by yielding the material of the tie bars 14 in a combination of bending and normal stress during the punching process.
Breaking the tie bar puts high stress on a bottom package 13 of device 11, leading to a percentage of lead/chip failures. Since the damage is on the bottom and may include chipping or other damage due to high stress, it is not easily detectable. Therefore, pre-damaged devices may escape undetected to an end user.
Therefore, a need exists for an apparatus and method for avoiding package damage caused by high stress punching operations .
SUMMARY OF THE INVENTION
An apparatus for separating a chip package from a carrier, in accordance with the present invention, includes a separation tool having a planar surface for supporting a chip package. The planar surface includes opposite ends, and first cutting edges are disposed on the opposite ends of the planar surface. A cutting plate has second cutting edges, and the cutting plate is operatively positioned for causing a shearing action between the first and second cutting edges to sever connections to the chip package when the first and second cutting edges engage to remove the chip package from the carrier.
Another apparatus for separating a chip package from a carrier, in accordance with the present invention, includes a base tool forming a slot therein, and a separation tool slidably disposed within the slot. The separation tool includes planar surfaces for supporting a chip package. The planar surface includes opposite ends. A securing assembly is disposed on the separation tool for securing the chip package on the planar surfaces. First cutting edges are disposed on the opposite ends of the planar surface. A cutting plate, which remains stationary relative to the base tool, is disposed in an operative relationship with the separation tool. The cutting plate has second cutting edges such that, when the separation tool is translated toward the cutting plate, the first and second cutting edges cause a shearing action to cut the connections to remove the chip package from the carrier of the chip package.
In alternate embodiments, the first edges may include a base portion, which narrows to an apex. The first cutting edges may be inclined along a length of the first cutting edges relative to the planar surface. The first cutting edges may be inclined by between about 0.5 degrees to about 5 degrees. The first cutting edges may be removable from the separation^ tool . The cutting plate may include a flat surface and the second cutting edges may include a corner formed on an end of the flat surface. The cutting plate may include a flat surface and the second cutting edges may be inclined along a length of the second cutting edges relative to the flat surface. The second cutting edges may be inclined by between about 0.5 degrees to about 5 degrees .
A method for removing a chip package from a carrier, includes the steps of providing a separation tool having a planar surface for supporting a chip package, the planar surface including opposite ends having first cutting edges disposed on the opposite ends of the planar surface, and a cutting plate having second cutting edges, translating the separation tool to bring connections of the chip package into contact with the first cutting edges, and cutting the connections by moving the chip package toward a cutting plate having second cutting edges. The cutting plate is operatively positioned for causing a shearing action between the first and second cutting edges to cut the connections of the chip package to remove the chip package from the carrier.
In other methods, the first edges may include a base portion, which narrows to an apex, and one of the first cutting edges and the second cutting edges may be inclined along their length relative to the planar surface.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings .
BRIEF DESCRIPTION OF DRAWINGS
This disclosure will present in detail the following description of preferred embodiments with reference to the following figures wherein:
FIG. 1 is a top view of a leadframe carrying chip packages "in accordance with the prior art; FIG. 2 is a cross-sectional view of a punch employed to break tie bars to separate a chip package from a leadframe in accordance with the prior art;
FIG. 3 is a top view of a separation tool in accordance with a preferred embodiment of the present invention;
FIG. 4 is a cross-sectional view of the separation tool taken at section line 4-4 of FIG. 3 in accordance with the present invention;
FIG. 5 is a partial cross-sectional view of detail 5 of FIG. 4 in accordance with the present invention;
FIG. 6 is a side view of an inclined sharp edge mounted or formed on the separation tool in accordance with the present invention;
FIG. 7 illustratively depicts a cutting plate configuration employed with sharp edges of the separation tool to cut tie bars or wires in accordance with the present invention;
FIG. 8 is a side view of an inclined sharp edge mounted or formed on -a cutting plate in accordance with the present invention;
FIG. 9 is a cross-sectional view of an apparatus for singulating a chip package before tie bars are cut in accordance with the present invention;
FIG. 10 is a cross-sectional view of the apparatus of "FTG.--9~"showing" tie bars"~being cut ±n "accordance with the present" invention"; ' and FIG. 11 is a cross-sectional view of the apparatus of
FIG. 9 showing the chip package being removed in accordance with the present invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The present invention provides a novel apparatus and method for separating a semiconductor device from a leadframe. A cutting edge is provided on a first tool, which supports the semiconductor device, and a cutting edge is provided on a second tool, which opposes the motion of the device. As the two cutting edges move closer to each other, a cutting action is provided which shears tie bars to cut the tie bars as opposed to breaking the tie bars. Advantageously, the stress is reduced significantly during the cutting process of the present invention over the breaking process of the prior art.
Referring now in specific detail to the drawings in which like reference numerals identify similar or identical elements throughout the several views, and initially to FIGS. 3 and 4, a top view (FIG. 3) and a side view (FIG. 4) of a separation tool 100 are shown in accordance with one embodiment of the present invention. Separation tool 100 includes support areas 102, which are planar portions employed for supporting a device (not shown) in preparation for singulation. A recessed area 104 is disposed between areas 102, and includes a device securing assembly 106. Assembly 106 may include any mechanism for securing a device thereon for cutting tie bars and for securing the device after the tie bars are cut, as will be explained herein below. In a preferred embodiment, assembly
106 includes one or more vacuum tubes 108, which communicate with a vacuum source (not shown) for securing the device on separation tool 100. In accordance with the present invention, sharp edges 110 are provided at ends 112 of support areas 102. Detail 5 of FIG. 4 as magnified in FIG. 5 shows this in greater detail.
Referring to FIG. 5, sharp edges 110 preferably include an apex 114 employed for cutting tie bars or wires extending from devices. Tool 100 is extended below edges 110 by structure 118 to provide structural support for the cutting action provided by edges 110. In one embodiment, structures 118 are integrally formed with or rigidly connected to edges 110. Alternately, structures 118 and/or edges 110 are removable and replaceable to account for wearing. If replaceable, edges 110 may be made of a hardened, more expensive material, such as a carbide material, and other portions of punch 100 may include cheaper material, such as tool--&teel . --If punch -100-J-n-cludes integrally formed- edges 110, annealing a steel material to harden edges 110 is preferred.
A base 115 of edges 110 and region 118 may extend outward by a dimension E, which may be about % mm. In one embodiment, dimension A is about 5 millimeters (mm) , while dimension B is betwe~en about 0.4 mm to" about 0.6 mm." An~angle F may be between 15 and 25 degrees. Other dimensions are also contemplated for dimensions A, B, E and F. •Referring to FIG. 6, a side view of an edge 110' is shown in accordance with another embodiment of the present invention. Edge 110' includes a slight inclination at an angle C. Angle C may include an angle of between about 0.5 degrees to about 5 degrees. Edge 110' is inclined to provide higher localized shear stress in tie bars or wires when cutting the tie bars or wires. Tie bars or wires are advantageously cut across edge 110' from one side to the other.
To provide the cutting action of the present invention a mating surface needs to be provided. As shown in FIG. 7, tool 100 moves up and down in the direction of arrow "D" . FIG. 7 shows a cutting edge 204, which includes a corner. It is preferable to have cutting plate 201 stationary while tool 100 moves relative to cutting plate 201. In other embodiments, both cutting plate 201 and tool 100 may move, or alternately cutting plate 201 may move and tool 100 may be stationary. In any event, relative motion between tool 100 and cutting plate 201 causes a shear force to be applied to a tie bar or wire 210 to cut tie bar or wire 210 between edge 110 (or 110') and cutting edge 204. This cuts ties bars 210 and releases a chip package 215 from the chip carrier (e.g., leadframe) . It is to be understood the edges 204 may be inclined as shown in FIG. 8.
FIGS. 9-11 depict an illustrative processing sequence for severing tie bars of semiconductor chips for packaging in accordance with the present invention. Referring to FIG. 9, separation tool 100 is slidably mounted in a base 302. Tool 100 moves within a slot 304 formed in base 302 in the direction of arrow "G" . A leadframe or other chip carrier 306 is moved to align a chip package 308 with tool 100. Chip package 308, as referred to herein,' includes a top package 309 and a bottom package 310, which surround an actual semiconductor device (not shown) in a "clam shell" arrangement .
Tool 100 contacts chip package 308 and supports chip package 308 against a bottom package 310 in areas 102 (see also FIG. 3) . Vacuum through vacuum tubes 108 secures chip package 308 against surfaces in areas 102 (FIG. 3) . Tie bars 312 are contacted with edges 110.
Referring to FIG. 10, tool 100 continues to move upward toward cutting plate 201. As edges 110 and cutting edges 204 draw closer a shearing action is imparted to tie bars 312, shearing through tie bars 312 to free chip package 308 from leadframe 306. Advantageously, little or no stress is -imparted- to chip package -308 during -the shearing -of tie bars 312.
Referring to FIG. 11, the freed chip package 308 is carried away by a vacuum chuck 320 or other chip capturing device. Tool 100 is retracted, the process sequence is repeated for a next chip package in a same or different chip carrier. By employing a cutting action instead of breaking leads, """the "present "invention "significantly reduces damage to chip packages and reduces waste or scrap. It is anticipated that a near zero percent rejection rate is achievable in accordance with the present invention.
Having described preferred embodiments for singulation of semiconductor packages by tie bar cutting (which are intended to be illustrative and not limiting) , it is noted that modifications and variations can be made by persons skilled in the art in light of the above teachings. It is therefore to be understood that changes may be made in the particular embodiments of the invention disclosed which are within the scope and spirit of the invention as outlined by the appended claims. Having thus described the invention with the details and particularity required by the patent laws, what is claimed and desired protected by Letters Patent is set forth in the appended claims .

Claims

WHAT IS CLAIMED IS:
1. An apparatus for separating a chip package from a carrier, comprising: a separation tool having a planar 'surface for supporting a chip package, the planar surface including opposites ends; first cutting edges disposed on the opposite ends of the planar surface; and a cutting plate having second cutting edges, the cutting plate being positioned such that the second cutting edges are operatively positioned for causing a shearing action between the first and second cutting edges to sever connections to the chip package when the first and second cutting edges engage to remove the chip package from the carrier.
2-=- The apparatus as recited in claim 1, wherein the first edges include a base portion which narrows to an apex.
3τ The "apparatus- as recited in- claim 1, wherein the first cutting edges are inclined along a length of the first cutting edges relative to the planar surface.
4. The apparatus as recited in claim 3, wherein the first cutting edges are inclined by between about 0.5 degrees to about 5 degrees.
5 J The~appa atus as recitedTn claim 1, wherein the "first "cut11ng~"edges are"remδvaB"1e ~from" the"" separation tool.
6. The apparatus as recited in claim 1, wherein the cutting plate includes a flat surface and the second cutting edges include a corner formed on an end of the flat surface.
7. The apparatus as recited in claim 1, wherein the cutting plate includes a flat surface and the second cutting edges are inclined along a length of the second cutting edges relative to the flat surface.
8. The apparatus as recited in claim 7, wherein the second cutting edges are inclined by between about 0.5 degrees to about 5 degrees.
9. An apparatus for separating a chip package from a carrier, comprising: a base tool forming a slot therein; a separation tool slidably disposed within the slot, the separation tool including planar surfaces for supporting a chip package, the planar surface including opposites ends; a securing assembly disposed on the separation tool for securing the chip package on the planar surfaces; first cutting edges disposed on the opposite ends of the planar surface; and a cutting plate, which remains stationary relative to the base tool, disposed in an operative relationship with the separation tool, the cutting plate having second cutting edges such that when the separation tool is translated toward the cutting plate the first and second cutting edges cause a shearing action to shear connections of the chip package to cut the connections to remove the chip package from the carrier of the chip package.
10. The apparatus as recited in claim 9, wherein the first edges include a base portion which narrows to an apex.
11. The apparatus as recited in claim 9, wherein the securing assembly includes at least one vacuum tube for drawing down the chip package against the planar surface.
12. The apparatus as recited in claim 9, wherein the first cutting edges are inclined along a length of the first cutting edges relative to the planar surface.
13. The apparatus as recited in claim 12, wherein the first cutting edges are inclined by between about 0.5 degrees to about 5 degrees .
14. The apparatus as recited in claim 9, wherein the first cutting edges are removable from the separation tool.
15. The apparatus as recited in claim 9, wherein the cutting plate includes a flat surface and the second cutting edges include a corner formed on an end of the flat surface.
16. The apparatus -as recited in claim 9, wherein cutting plate includes a flat surface and the second cutting edges are inclined along a length of the second cutting edges relative to the flat surface.
17. The apparatus as recited in claim 16, wherein the second cutting edges are inclined by between about 0.5 degrees to" "a'bout 5~degrees
18. A method for removing a chip package from a carrier, comprising the steps of: providing a separation tool having a planar surface for supporting a chip package, the planar surface including opposite ends having first cutting edges disposed on the opposite ends of the planar surface, and a cutting plate having second cutting edges; translating the separation tool to bring connections of the chip package into contact with the first cutting edges; and cutting the connections by moving the chip package toward a cutting plate having second cutting edges, the cutting plate being positioned such that the second cutting edges are operatively positioned for causing a shearing action between the first and second cutting edges to cut the connections of the chip package to remove the chip package from the carrier.
19. The method as recited in claim 18, wherein the first edges include a base portion which narrows to an apex.
20. The method as recited in claim 18, wherein one of the first cutting edges and the second cutting edges are inclined along their length relative to the planar surface.
PCT/US2001/029195 2000-09-26 2001-09-19 Singulation of semiconductor packages by tie bar cutting WO2002027779A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2002531476A JP2004510349A (en) 2000-09-26 2001-09-19 Semiconductor division by tie rod cutting
EP01985776A EP1320880A2 (en) 2000-09-26 2001-09-19 Singulation of semiconductor packages by tie bar cutting
KR10-2003-7004390A KR20030069996A (en) 2000-09-26 2001-09-19 Singulation of semiconductor packages by tie bar cutting

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US66958400A 2000-09-26 2000-09-26
US09/669,584 2000-09-26

Publications (2)

Publication Number Publication Date
WO2002027779A2 true WO2002027779A2 (en) 2002-04-04
WO2002027779A3 WO2002027779A3 (en) 2002-07-11

Family

ID=24686892

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/029195 WO2002027779A2 (en) 2000-09-26 2001-09-19 Singulation of semiconductor packages by tie bar cutting

Country Status (4)

Country Link
EP (1) EP1320880A2 (en)
JP (1) JP2004510349A (en)
KR (1) KR20030069996A (en)
WO (1) WO2002027779A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10644191B2 (en) 2017-10-30 2020-05-05 Samsung Electronics Co., Ltd. Semiconductor package separating device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6065381A (en) * 1997-09-13 2000-05-23 Samsung Electronics Co., Ltd. Apparatus for cutting tie bars of semiconductor packages

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63181361A (en) * 1987-01-22 1988-07-26 Mitsubishi Electric Corp Equipment for manufacturing resin sealed type semiconductor device
JPH01243565A (en) * 1988-03-25 1989-09-28 Toshiba Corp Lead cutting apparatus for semiconductor device
JP2826508B2 (en) * 1996-06-27 1998-11-18 山形日本電気株式会社 Semiconductor device manufacturing equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6065381A (en) * 1997-09-13 2000-05-23 Samsung Electronics Co., Ltd. Apparatus for cutting tie bars of semiconductor packages

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 012, no. 457 (E-688), 30 November 1988 (1988-11-30) -& JP 63 181361 A (MITSUBISHI ELECTRIC CORP), 26 July 1988 (1988-07-26) *
PATENT ABSTRACTS OF JAPAN vol. 013, no. 578 (E-864), 20 December 1989 (1989-12-20) -& JP 01 243565 A (TOSHIBA CORP), 28 September 1989 (1989-09-28) *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 05, 30 April 1998 (1998-04-30) -& JP 10 012641 A (NEC YAMAGATA LTD), 16 January 1998 (1998-01-16) *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10644191B2 (en) 2017-10-30 2020-05-05 Samsung Electronics Co., Ltd. Semiconductor package separating device

Also Published As

Publication number Publication date
EP1320880A2 (en) 2003-06-25
WO2002027779A3 (en) 2002-07-11
JP2004510349A (en) 2004-04-02
KR20030069996A (en) 2003-08-27

Similar Documents

Publication Publication Date Title
US5786266A (en) Multi cut wafer saw process
CN100334706C (en) Semiconductor device and its manufacturing method
US20070102792A1 (en) Multi-layer crack stop structure
JP2011212963A (en) Severing method of brittle material substrate
JP2018093103A (en) Lead processing device and semiconductor device manufactured by using the same
US20020086137A1 (en) Method of reducing wafer stress by laser ablation of streets
JP3896029B2 (en) Method for manufacturing hybrid integrated circuit device
US7250352B2 (en) Methods for manufacturing a hybrid integrated circuit device
EP1320880A2 (en) Singulation of semiconductor packages by tie bar cutting
US7470601B2 (en) Semiconductor device with semiconductor chip and adhesive film and method for producing the same
US6364751B1 (en) Method for singling semiconductor components and semiconductor component singling device
US6621149B2 (en) Semiconductor chip production method and semiconductor wafer
US6586821B1 (en) Lead-frame forming for improved thermal performance
JPH11111745A (en) Manufacture of semiconductor device, press die, and guide rail
EP1359612A2 (en) Methods of manufacturing a hybrid integrated circuit device
CN115516626A (en) Spring rod lead frame
EP1774587B1 (en) Wafer with improved conductive loops in the dicing lines
JPH065758A (en) Method and apparatus for fabricating semiconductor device
WO2009056469A1 (en) Foil perforating needle for detaching a small die from a foil
EP0535882B1 (en) Method of processing a semiconductor chip package
JP3226874B2 (en) Lead cutting method
US20040187544A1 (en) Method and apparatus for removing a carrier part from a carrier with a single operation, and a product removed from a carrier
JP2665870B2 (en) Die for cutting lead of electric parts etc.
CN111716575A (en) Device and method for dividing brittle material substrate
KR100780015B1 (en) Cutting apparatus for semiconductor packages

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP KR

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

AK Designated states

Kind code of ref document: A3

Designated state(s): JP KR

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 2001985776

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 1020037004390

Country of ref document: KR

Ref document number: 2002531476

Country of ref document: JP

WWP Wipo information: published in national office

Ref document number: 2001985776

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1020037004390

Country of ref document: KR

WWW Wipo information: withdrawn in national office

Ref document number: 2001985776

Country of ref document: EP