WO2001099414A1 - Systeme de traitement d'image - Google Patents

Systeme de traitement d'image Download PDF

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Publication number
WO2001099414A1
WO2001099414A1 PCT/CH2001/000389 CH0100389W WO0199414A1 WO 2001099414 A1 WO2001099414 A1 WO 2001099414A1 CH 0100389 W CH0100389 W CH 0100389W WO 0199414 A1 WO0199414 A1 WO 0199414A1
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WO
WIPO (PCT)
Prior art keywords
image
reading unit
memory
written
read
Prior art date
Application number
PCT/CH2001/000389
Other languages
German (de)
English (en)
Inventor
Nikolaus Schibli
Original Assignee
Fastcom Technology S.A.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fastcom Technology S.A. filed Critical Fastcom Technology S.A.
Priority to AU2001265730A priority Critical patent/AU2001265730A1/en
Publication of WO2001099414A1 publication Critical patent/WO2001099414A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof

Definitions

  • the invention relates to a processing system and its use, which allows the image information to be made available to a processor as quickly as possible.
  • an "intelligent camera” works like a sensor that forwards a measurement result from the image information to a central processing unit.
  • Canon Kabushiki Kaisha's US Pat. No. 5,075,788 describes an image readout method with a CCD image sensor in order to classify an image into different zones. A distinction should be made here between where in the picture characters are shown and where there is purely photographic information.
  • a camera system is proposed where the image is stored in a memory and then processed with a computer system.
  • the US Patent No. 5,060,074 from Hitachi Ltd proposes an image reading unit for a video camera which, like in US Pat. No. 5,146,340, allows the image field to be read out at two different speeds. This is done in order to read an interesting image zone faster than the entire image. Afterwards, vibrations of the image caused by the camera user can be balanced. The interesting image zone can be displayed without vertical or horizontal shift.
  • the invention relates to an image processing system consisting of:
  • An image reading unit consisting of an electronic image sensor, one or more AD converters, in order to convert the analog signals read out by the image sensor into digital image data,
  • At least two image memories each image memory being controlled by the image reading unit and by the processor unit and being able to be used for reading and / or writing image data,
  • the image reading unit has a configuration that allows the image reading unit to write a read image to a first image memory and to write a next image to a next image memory; as soon as all image memories are written with an image, the newly captured image is written back into the first image memory;
  • the processor unit has access to the image memory which was last written by the image reading unit and is no longer being written to by the image reading unit.
  • the proposed invention can simultaneously capture an image and read it into an image memory, while the previous image is available to the computing unit for image signal processing.
  • the image reading and processing system consists of an image reading unit, an image signal processing unit and several image memories. With the application of this invention, for example, the clock rates of an image processing system can be increased.
  • the invention relates to the use of an image processing system, characterized in that that the image reading unit writes a read image in a first image memory and writes a next image in a next image memory; as soon as all image memories are written with an image, the newly captured image is written back into the first image memory; At the same time as the image recording, the processor unit has access to the image memory which was last written by the image reading unit and is no longer being written to by the image reading unit.
  • the image processing system is preferably characterized in that the image reading unit binarizes the read-in image in comparison to a predefined threshold value before the image is stored in one of the image memories.
  • Figure 1 Schematic representation of the image reading and processing unit, also called an intelligent camera.
  • Figure 2 Overview of a possible implementation of the electronics for the proposed image reading and processing unit.
  • FIG. 3 Detailed overview of an image reading unit with several readout channels.
  • Figure 4 Representation of the possibility of reading out a partial image with the proposed system.
  • FIG. 1 shows a simplified illustration of an “intelligent camera” 51. It consists of an optical system 52, which is responsible for projecting a desired image zone onto a surface inside the camera.
  • a matrix of light-sensitive elements (also called an image sensor) is located on this surface and creates an image.
  • This image information is digitized and made available to a processor system as an image. This is the task of the image reading unit 53.
  • a processor system is equipped with the necessary peripherals (memory, timer, etc.) to process the image in order to achieve results from it.
  • This part of the “intelligent camera” is the image processing unit 54.
  • the communication unit 55 is responsible for this.
  • the external devices that communicate with the intelligent camera are referred to as “external peripherals” 56.
  • FIG. 2 shows an implementation example.
  • the example given consists of three elements: an image reading unit, the image storage elements and the processor unit.
  • An optics 1.3 is located on the image reading unit, which is responsible for focusing an image on an image sensor 1.
  • An image sensor is a matrix of light-sensitive semiconductor Elements defined.
  • the image sensor 1 can consist of a CCD image sensor (charge coupled device), but also of a CMOS image sensor.
  • the image sensor is scholared with the image with a fixed integration time. Then the image is read out.
  • the horizontal driver 3 is used to push the entire image matrix into the readout register 1.1.
  • the shift register is then read out with the horizontal driver 3, in which one pixel after the other is led from the image matrix to an analog signal processing 4 and is subsequently converted digitally.
  • Analog signal processing 4 is understood to mean, for example, the “correlated double sampling” CDS and also the “automatic gain control” AGC.
  • the conversion of the preprocessed signal is done with the AD converter 5.
  • the control element 6 of the image sensor 1 is now responsible for storing the image information in the one memory.
  • the control element thus generates the entire control signals for the image sensor drivers 2, 3 for the readout register 1.1 for the analog signal processing 4 and for the AD converter 5.
  • the control element can be a processor, but also a programmable gate array (FPGA).
  • the addresses for the respectively selected memory (9), (10) are generated synchronously with the output of the digital pixels on the AD converter 5.
  • the control element 6 looks in the control register 21 into which image memory is to be written.
  • the control register 21 retains the information as to which image memory 9, 10 is not currently being addressed by the processor 13, ie not being used, but also which image memory is to be written by the control element 6.
  • the image memories 9, 10 can be activated cyclically by the processor 13, for example.
  • the image memories can now either be assigned to the processor or to the image reading unit. The assignment is made via the bus switch 12. The addresses and data of an image memory are either routed to the image reading unit (for writing new images to the memory) or to the processor unit (to process the images already read). This Control is made via the control register, which generates these control signals 22.
  • the image data 7 are now written in an image memory 9, 10, the addresses 8 are generated by the control element of the image reading unit 6. If, for example, the image memory 9 is now written by the image reading unit, the image memory 10 can thus be connected to the processor unit.
  • the processor unit can read this image, also copy it to another local memory 20, etc
  • the processor unit can be implemented in different ways.
  • the central element is the processor 13. This can be a microcontroller, but a digital signal processor (DSP) is also possible. This processor generates the addresses in order to read the image memories 9, 10 and the local memory 20.
  • the data bus 16 can also contain image data but also other data (for example for telecommunications).
  • the processor is driven by a clock signal 14. If possible, the clock (14) of the processor and the clock of the image reading unit 23 are the same.
  • the clock of the image reading unit is introduced via the control element of the image reading unit.
  • the control register 21 is written via the processor 13. Information is written therein, such as the desired integration time of the CCD image sensor, the amplification of the analog image signal, the image memory in which the image is to be written, etc.
  • the processor 13 issues an "image request" with all the necessary information Parameters are written into the control register 21.
  • the image reading unit then immediately starts reading in the image with the desired parameters.
  • the processor can calculate with the previously read in images in the image memories and does not have to wait for the new image.
  • Results from The image processing that has been achieved with the processor can be sent as information to another system with the communication processor 18 via a bus 19. This can be, for example, an RS-232 connection or a correct industrial bus such as the CAN bus.
  • FIG. 3 shows a detailed illustration of the image reading unit, which has already been presented in FIG. 2. Another concept for parallelization is presented here.
  • the image data can thus be transferred from the image sensor to the image memory more quickly.
  • the diagram shows an image sensor 31 with the associated vertical 32 and horizontal drivers 33.
  • the image sensor can be reset with the signal 34. This means that the entire image sensor does not have to be read out before the next image can be read in again. This is shown in Figure 4.
  • the clock rate of the image reading can be increased.
  • Each of the readout registers is provided with its own preprocessing unit 36.
  • the preprocessing is an analog signal processing and contains necessary elements such as variable gain called "automatic gain control”, "correlated double sampling” CDS and “sample and hold" element.
  • an AD converter 7 is present which contains the analog pixel values
  • the digital data is passed on to a logic, in order to then store the individual pixels in a frame buffer in parallel as wide data values such as 32-bit or 64-bit.
  • the individual pixels have a width of 8 to 10 bits
  • Reading out the image sensor with all driver elements is controlled by the control element 39.
  • the control element also generates the addresses for storing the digital pixels in a memory and also controls the generation of the wide data words.
  • FIG. 1 The principle of partial reading of the image window is shown in FIG.
  • point A it is shown how an object is shown on the far right on the edge of the picture. Now the entire image window is read out. Only after the entire window has been read out is the image sensor reset and a new image is acquired.
  • point B the same object is on the right in the edge of the picture. However, only 60% of the image is read out, then the image sensor is reset and a new image can be read out. This is possible because in this case the image sensor is read in the direction where the object is.
  • the readout register of the image sensor is immediately to the right of the object and the image is gradually shifted from one column to the next column with the vertical driver into the readout register. This is only possible if the object is on the side where the readout register is located.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Image Input (AREA)

Abstract

L'invention concerne un système de traitement d'image, comprenant : - une unité de lecture d'image constituée d'un capteur d'image électronique et d'un ou de plusieurs convertisseurs analogiques-numériques servant à convertir les signaux analogiques extraits du capteur d'image en données d'image numériques, - un processeur, - ainsi qu'au moins deux mémoires d'image, chaque mémoire d'image étant commandée par l'unité de lecture d'image et par le processeur et pouvant servir à la lecture ou à l'écriture de données d'image. Le système de traitement d'image selon l'invention est caractérisé en ce qu'il présente une configuration permettant à l'unité de lecture d'image d'écrire une image lue dans une première mémoire d'image et d'écrire une image suivante dans une mémoire d'image suivante. Dès que toutes les mémoires d'image contiennent une image, la nouvelle image détectée est écrite à nouveau dans la première mémoire d'image. Simultanément à l'enregistrement d'image, le processeur a accès à la mémoire d'image dans laquelle l'unité de lecture d'image a écrit en dernier et dans laquelle l'unité de lecture d'image n'écrit actuellement plus.
PCT/CH2001/000389 2000-06-23 2001-06-21 Systeme de traitement d'image WO2001099414A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001265730A AU2001265730A1 (en) 2000-06-23 2001-06-21 Image processing system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH12402000 2000-06-23
CH1240/00 2000-06-23

Publications (1)

Publication Number Publication Date
WO2001099414A1 true WO2001099414A1 (fr) 2001-12-27

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AU (1) AU2001265730A1 (fr)
WO (1) WO2001099414A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2915492A1 (de) * 1979-04-17 1980-10-30 Wilfried Dipl Ing Gaube Schaltungsanordnung zum speichern von bildsignalen
EP0527004A1 (fr) * 1991-07-22 1993-02-10 Kabushiki Kaisha Photron Appareil d'enregistrement d'images rapides
WO1998000809A1 (fr) * 1996-06-28 1998-01-08 Hopkins T Eric Systeme d'acquisition d'image

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2915492A1 (de) * 1979-04-17 1980-10-30 Wilfried Dipl Ing Gaube Schaltungsanordnung zum speichern von bildsignalen
EP0527004A1 (fr) * 1991-07-22 1993-02-10 Kabushiki Kaisha Photron Appareil d'enregistrement d'images rapides
WO1998000809A1 (fr) * 1996-06-28 1998-01-08 Hopkins T Eric Systeme d'acquisition d'image

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BRADBEER R: "A MEDIUM RESOLUTION INTELLIGENT VIDEO CAMERA", IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, IEEE INC. NEW YORK, US, vol. 41, no. 3, 1 August 1995 (1995-08-01), pages 573 - 578, XP000539509, ISSN: 0098-3063 *
SMITH J S ET AL: "A HIGH-SPEED IMAGE ACQUISITION SYSTEM FOR ROBOTICS", TRANSACTIONS OF THE INSTITUTE OF MEASUREMENT AND CONTROL, INSTITUTE OF MEASUREMENT AND CONTROL. DORKING, GB, vol. 14, no. 4, 1992, pages 196 - 203, XP000319911, ISSN: 0142-3312 *

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