Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
  • H03J3/00—Continuous tuning
  • H03J3/20—Continuous tuning of single resonant circuit by varying inductance only or capacitance only
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
  • H01F17/00—Fixed inductances of the signal type
  • H01F17/0006—Printed inductances

Definitions

• the present invention relates to a LC tank formed directly on a low resistivity substrate, such as a thin film substrate or a semiconductor substrate. More specifically, the invention relates to a tank formed on a low resistivity substrate, such as silicon, which is compliant for MMIC (Microwave Monolithic Integrated Circuit) production.
• MMIC Microwave Monolithic Integrated Circuit
• LC tanks are used in a wide range of electronic circuits.
• One interesting use for tanks is in resonators, which form essential parts of microwave filters, oscillators etc.
• Some resonators should typically be tuneable, either because the application requires this functionality or in order to compensate for production tolerances.
• the resonant frequency of a LC tank can be given as
• Prior art document US-A-5 173835 shows a tuneable tank comprising a voltage variable capacitor or varactor having at the base substrate a silicon wafer with a high resistivity semiconductor material on top of the substrate.
• An insulating layer of metal oxide having a dielectric constant greater than the dielectric constant of the semiconductor is formed on top of the high resistivity layer and a metal electrode is formed on the insulating layer.
• the losses for a given tank can be expressed by means of the Q-factor, which in a simple case may be regarded as the ratio of the conserved magnetic energy to the losses. Especially losses in the substrate reduce the Q-value of known devices.
• Silicon which has many excellent properties including a relatively low price, is not an ideal substrate material for LC tanks because of its lossy properties ranging in the area of 0,0001 - 20 ⁇ m.
• the relatively low resistance of the material leads to eddy currents being generated in the substrate, which then again lead to losses occurring in the inductor or tank.
• Losses in tanks can be overcome by using semiconductor substrates such as GaAs or other high resistivity substrates having a resistivity p>100 ⁇ m, but these substrate materials are relatively expensive.
• the total losses are given by ohmic resistance to the currents flowing in the strips and the dielectric losses in the surrounding dielectrics, such as the substrate.
• the losses and the overall performance of the inductance depend not only on the geometry and materials involved but also on the way the inductors are coupled in the actual application.
• Fig. 1 shows a known simple loop structure being arranged on a dielectric or semiconductor substrate and having an optional ground plane being provided on the opposite side of the substrate.
• Fig. 2 is a cross-sectional view of the inductor shown on fig. 1.
• Fig. 3 relates to a known meander structure, which requires a ground plane for the return current.
• Fig. 4 is a cross-sectional view of the inductor shown on fig. 3.
• the terminals of the inductors can be coupled in various combinations.
• Fig. 5 , 6 and 7 depicts three main models corresponding to different ways of coupling the inductor and optionally arranging the ground plane for the plane inductors such as those shown in fig. 1 - 4.
• the inductor has a ground plane and is coupled as a two port, that is, the input terminals are formed between the terminal strip and the ground plane and the output port is formed between the terminal relating to the other end of the strip and the terminal of the adjacent ground plane.
• r strip represents the losses in the strips and the losses in the ground plane.
• Fig. 6 shows a one-port configuration, whereby the structure is provided with a ground plane on the backside of the substrate and whereby the output port has been shorted.
• the components correspond to those shown in fig. 5.
• circuit configurations shown on fig. 5 - 7 may be transformed to the more simplified circuit shown on fig. 8.
• R equals Rs, while r equals r substr + r strip .
• slots are provided in the low resistivity substrate under the inductor in order to reduce circumferential currents.
• JP-A-06 224 042 (D7), a planar inductor has been disclosed comprising two magnetic wafers separated by a glass film, one wafer having slots in the shape of a meander, which enables the formation of a copper inductor being formed adjacent the glass film.
• the structure of the inductor according to this document has a set of input terminals being arranged close together.
• the inductor is claimed to provide enhanced high frequency characteristics and a high quality factor value.
• the wafers which are made of nickel-zinc ferrite, have a high resistance factor.
• the inductor does not appear suitable for the microwave range of above 300 MHz and substantial losses in this range are expected.
• the inductor according to D5 requires a complex manufacturing technique, which is incompatible with MMIC manufacture.
• One object of the present invention is to set forth a LC tank, which can be manufactured on a low resistivity substrate without any special preparation of the substrate being needed, the LC tank providing a reduced level of induced currents in the substrate and hence higher Q-values.
• a further object is to accomplish a tuneable tank providing high Q-values at high frequencies.
• Fig. 1 is a side view of a first known simple loop inductor
• Fig. 2 is an upper view of the first known loop inductor
• Fig. 3 and 4 shows a second known meander inductor
• Fig. 5 - 8 disclose known equivalent circuits for inductors in various coupling schemes
• Fig. 9 and 10 relates to a third structure known according to document (D5),
• Fig. 11 and 12 is a schematic illustration of the balancing of substrate currents according to the invention.
• Fig. 13 shows a LC tank comprising a varactor according to a first embodiment of the invention, the drawing showing two strip layers presented in an isometric view and diodes in a symbolic view,
• Fig. 14 shows a cross-section along line A-A of fig. 13,
• Fig. 15 shows a cross-section along line B-B of fig. 13,
• Fig. 16 shows a cross-section along line C-C of fig. 13,
• Fig. 17 shows an equivalent circuit of the tank according to fig. 13
• Fig. 18 shows another embodiment of a LC tank comprising according to the invention
• Fig. 19 shows a third embodiment of a LC tank according to the invention
• Fig. 20 shows a fourth embodiment of a LC tank according to the invention.
• Fig. 21 shows a fifth embodiment of a LC tank comprising according to the invention.
• the Q- factor as set out above, namely as the ratio of the stored average energy to the average loss per time unit, the ratio being multiplied with the circular frequency.
• the stored energy is given by the inductances and capacitances and may be represented as a sum of self-inductances and mutual inductances of the strips.
• the stored energy in the inductance is proportional to where L j is the self inductance of the i-th strip and My is the mutual inductance between strips i and j.
• the mutual inductance is negative. The losses may be given by the resistances shown in the equivalent circuit of fig. 8.
• the substrate currents and hence the losses of the inductor are reduced by arranging the strips in such a way that the currents induced in the substrate balance one another.
• Fig. 12 is a cross sectional schematic representation of an inductor structure relating to a preferred group of inductors according to the invention, whereby the direction of the cur- rents induced in the substrate has been indicated (+ into / • out of the plane of the paper). It is seen that the currents in adjacent strips are of opposite direction.
• the resultant current density is much lower than the current densities relating to the situation where strips are carrying the same current one at a time. This effect takes place because the currents in the substrate generate contra- directional magnetic fields around themselves. The magnetic fields in their turn induce contra-directional currents in the semiconductor substrate as shown in fig. 2. Since these currents are also contra-directional to one another, they partly balance out one another and the resultant substrate current is smaller than the individual substrate currents.
• the strips have identical cross-section, i.e. have the same width w and where the distance b s between them is sufficiently small to optimise the Q value, i.e. where values of first and foremost r substr , r strip , and L but also Rp, Cs, Cp are optimised.
• the inductance L will suffer and the effective resistance r substr will become to small leading to currents leaking between the strips.
• the distance is chosen too high the distance between the induced adjacent magnetic fields will not affect one another, and thus not lead to a reduction of currents in the substrate.
• the strips, 1 are forming at least a first loop, 13, having one or more segments of pair-wise disposed adjacent parallel legs of substantially the same length, being substantially aligned with one another.
• the adjacent strips are being arranged for carrying currents in opposite directions, such that currents induced in the lossy substrate from each respective leg in the segment balance each other.
• the tank 20 comprises four parallel strips 1 and other strips being orthogonal to and connected with the former through corner portions, the strips forming two loops 13 and 14 being symmetrical and connected with one another through a bridge portion 15, formed by a strip in a second strip layer 10.
• the strips 1 have a uniform width.
• Two input terminals 12 are formed as a prolongation of the two inner strips of the four parallel strips.
• the loops are elongate and square shaped.
• the vias are depicted at an oblique angle to bridge portion 15. In reality, the vias are arranged at right angles to the strips.
• the bridge portion 15, comprises vias 8 which connect the strip of the bridge portion with the strips 1 of the respective loops 13 and 14.
• the bridge portion crosses the over- or underlying strip at a right angle.
• the strips 1 and the bridge portion forms the inductive part of the tank 20.
• the balancing depends on the spacing a, b, and c between the strips in the respective loops and the substrate properties.
• aspect ratio defined by the length, d, of the segments having parallel adjacent legs, to the separation distance or segment width, a, b and c.
• Tests show that good values are found where the aspect ratio of the loop is more than 2 to 1 or less than 1 to 2. Even better results are obtained when the aspect ratio is more than 3 to 1 or less than 1 to 3. Experimental tests can be used to estimate where the balancing effect has its optimum.
• the high Q value is also believed to arise from the symmetry of the above structures and the central arrangement of the terminals in relation to the overall inductor structure.
• the substrate 3 comprises a first silicon dioxide layer 4 on top of a second dioxide layer 5, having a total width, i, of 45 ⁇ m thickness.
• the width, W_1, of the strips 1 is 20 ⁇ m.
• the width, W_2, of the strips 11 are advantageously smaller than the width W_1.
• the first and second silicon dioxide layer are so-called lossy substrate layers and have a conductivity of 2,5 ( ⁇ m) -1 and the lower silicon layer, 17, of 360 ⁇ m has a resistivity smaller than 100 Ohm cm .
• a pair of capacitive strips 23 and 24 of length h and extending from bridge portion 15 in layer 11 are formed vertically under the strips 1.
• the capacitive strips 23 and 24 constitute together with the above strips 1 , a shunt capaci- tance, which is dependent on the length h, the dielectric properties of layers 4 and 5 and the height i.
• a pair of back to back coupled varactor diodes 18 and 19 are coupled between the input ports 12.
• the varactor diodes are integrated in the third silicon substrate by a p+ doped area [ please correct and describe..].
• Suitable vias 27 form the connection between a strip 10 and the diodes and the strips 1 through other vias 8.
• a pair of bias leads 16, 17 serve for the connections between a DC bias source, V bias + and V bjas - , and the varactor diodes 18, 19 whereby the capacitive values of the varactor diodes can be regulated.
• the first bias lead 16 connects to a midpoint on the inductor structure, namely on the midpoint of the bridge 15.
• the second bias lead 17 connects to a mid-point between the diodes 18, 19 on strip 10.
• C_var1 and C_var2 represent the tuneable capacitances of varactors 18 and 19 as given by the DC bias voltage
• r is the total resistance constituted by the strip resistance r_strip and the substrate resistance r_substrate to the longitudinal substrate currents
• C_t is the total capacitance represented by the capacitance between the capacitive leads 23 and 24 and the strips 1
• R_shuntp is the parasitic shunt resistance of the lossy substrate.
• the total inductance is constituted by the inductance of the loops 13 and 14 and the parasitic inductance given by strips 8, 15, 16, 23, 24. It includes also the inductive response of the longitudinal substrate currents.
• the desired resonance frequency can be accomplished. Since the capacitor leads 23 and 24 are arranged below the strips 1 of the inductor, the electrical field lines are mainly extending in the low loss dielectric layers 4 and 5, leading to a reduction of losses.
• the low width W_2 of the strips 23 and 24 in relation to the width of the loop strip 1 W_1 leads furthermore to a reduction of current crowding in the strips 1 leading to a more homogenous current distribution in the strips 1 arranged over the capacitive leads 23 and 24, which then again leads to a lower strip resistance in the parts of the associated strips.
• the tank is symmetrical about a line, along the bias leads 16 and 17, ex- tending between the input terminals 12, please also confer fig. 14 - 16.
• the tank according to the invention renders it possible to accomplish very high Q values. Practical tests show that Q-values over 20 can be accomplished for 20 GHz. The tank also provides low noise because of the reduced losses.
• the advantages of the tank according to the invention are fully utilised if the input 12 terminals are coupled differentially, i.e. the input terminals have equal and opposite potentials relative to ground.
• the third substrate layer 6 of the substrate 3 may constitute a ground plane. Also, an additional backside metal layer (not shown) may serve as a ground plane.
• a virtual ground appears at the plane of symmetry (shown in figs. 14-16) on which the DC bias terminals 25 and 26 and the bias leads 16 and 17 are arranged. Since the impedance seen at the bias terminals appear to be zero since the voltage potential is zero, no matching or decoupling networks, such as low pass filters, are required. Thereby, the microwave high frequency and high Q performance is unaffected by the bias circuit.
• a second embodiment of a tank 28 according to the invention has been shown.
• the tank 28 is similar to the tank 20 explained in the foregoing except that varactors have not been provided.
• this embodiment can be used. In practice, it is often difficult to estimate the shunt capaci- tance, but for certain applications the above design may be suitable.
• v In fig. 19 a third embodiment 29 of the tank according to the invention has been shown which is also similar to the tank 20, but according to this embodiment no capacitor leads are provided. For applications where a sufficient capacitance value can be accomplished by the varactor diodes this embodiment may be appropriate,
• a fourth embodiment has been shown providing still higher capacitance values, by providing capacitor leads 23 and 24 which extends along a larger portion of the first and second loops 13 and 14 of the tank. According to this design, the capacitor leads extends from the first bias lead 16 near the first DC terminal 25.
• a fifth embodiment of the tank according to the invention which comprises both varactor diodes 18 and 19 and capacitor leads 23 and 24, but where only a single loop has been provided.
• the invention is not restricted to the substrate / strip configuration defined above.
• the invention would also be applicable to a substrate having several epitaxial layers.
• dielectric films could be provided to the extent that substrate currents would occur in a lossy part of the substrate. As long as currents can potentially be induced in a lossy substrate, the balancing of currents in the lossy part of the sub- strate can be effected according to the principles described above.
• tank structures according to the invention may therefore readily be applied in a wide range of MMIC applications such as balanced amplifiers, mixers, and voltage controlled oscillators and hence redefine the performance of such applications.

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• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Semiconductor Integrated Circuits (AREA)

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Citations (4)

• 2000
  • 2000-05-16 SE SE0001801A patent/SE516361C2/sv not_active IP Right Cessation
• 2001
  • 2001-05-11 WO PCT/SE2001/001045 patent/WO2001088967A1/en not_active Ceased
  • 2001-05-11 AU AU2001258978A patent/AU2001258978A1/en not_active Abandoned

Patent Citations (4)

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