OUTPUT POWER CONTROL OF A TRANSMITTER
TECHNICAL FIELD
This invention relates generally to the control of the output power level of a transmitter, and more specifically, to a power level control system and method that sufficiently maintains a stable output power over a wide range of frequency, temperature and voltage changes.
BACKGROUND OF THE INVENTION
In compliance with industry specifications, analog cellular telephones must conform to one of three operating classes, Class I, II or III and digital cellular telephones must conform to one of four operating classes, Class I, II, III or IV. These classes are differentiated by the nominal effective radiated power ("ERP") of the cellular telephone with respect to a half- wave dipole. In addition, each cellular telephone in a class must be able to operate at one of a plurality of radio frequency ("RF") output power levels. The output power level of the cellular telephone is determined by the cellular system. The cellular system monitors the traffic and the received power levels from the cellular telephones within the system, and then transmits power level setting commands to the cellular telephones. By limiting the output power level of the cellular telephones to that needed for effective communication, the cellular system can minimize the amount of inter-cell interference and hence, maximize the channel capacity within the system. In order to accomplish this, cellular telephones must be capable of accurately maintaining the system-selected output power level within specified tolerances over a wide range of environmental conditions.
In most cases, hardware techniques are utilized within RF transmitters to maintain the output power level at a selected level. Typically these hardware techniques utilize a feedback loop. The feedback loop monitors the current output power level and detects and adjusts for slight changes in the output power level from the selected level. This process consists of detecting the output power level from an RF power amplifier and converting it into a signal having a magnitude which corresponds to the output power level. The magnitude of this signal is then compared to a reference signal which corresponds to the selected level. The difference between the detected signal and the reference signal is called an error detection signal and is used as a feedback control signal to adjust the output power level from the power amplifier to the selected level.
Although hardware techniques for controlling the output power level of a transmitter provide some degree of accuracy, they also have several disadvantages. One of the main disadvantages of the hardware techniques is their vulnerability to temperature fluctuations. In typical hardware techniques, the output power level detection and conversion is accomplished by employment of a diode (or equivalent P-N junction semiconductor) detector. The diode detector converts the detected RF output signal into a DC level which represents the magnitude of the RF output power. The accuracy of this type of detector is limited because the voltage drop across the diode is dependent upon the temperature and the temperature changes can cause the RF output power level to fluctuate.
Various methods have been utilized to overcome this vulnerability of the hardware techniques, namely the effect of temperature fluctuations on the output power level. Various methods can be seen by examining one or more of the following patents: U.S. Pat. No. 4,523,155 to Walczak et al.; U.S. Pat. No. 5,367,268 to Baba; U.S. Pat. No. 4,992,753 to Jenson et al. and U.S. Pat. No. 5,337,020 to Daughtry et al. Thus, there is a need in the art for system and method
for controlling the output power level of a transmitter is such a way that accuracy can be maintained even in the presence of temperature fluctuations.
Another common problem with hardware techniques for controlling the output power level of a transmitter is their vulnerability to frequency fluctuations as the transmitter tunes to different frequencies. The characteristics of a transmitter will vary depending on the frequency at which the transmitter is operating. Thus, a method for controlling the output power of a transmitter may be optimized for one frequency, and be inadequate at another frequency. Thus, there is a need in the art for an output power level controller that sufficiently eliminates the vulnerability due to the changing characteristics of the transmitter across the operating frequencies.
Another common problem with hardware techniques for controlling the output power level of a transmitter is their vulnerability to fluctuations in the supply power voltage. In hand-held, battery powered devices, this vulnerability can result in the output power level of the transmitter falling out of specification as the battery charge is depleted. Thus, there is a need in the art for an output power level controller that sufficiently eliminates the vulnerability due to voltage level changes.
Another common problem with hardware techniques for controlling the output power level of a transmitter is the amount of circuit board real-estate that they require. This disadvantage is further amplified in digital, TDMA or dual mode cellular products, where the output power level control is further complicated by the lack of a constant output envelope. As hand held wireless communication devices become smaller and lighter, the amount of circuit board real-estate available within these products decreases. Thus, circuit board real- estate is a premium and any technique that frees up circuit board space usually results in a cost savings for the product. Thus, there is a need in the art for an output power level controller that makes efficient use of circuit board real-estate.
Fig. 1 is a schematic diagram of a prior art hardware circuit used to control the output power of a frequency modulated ("FM") transmitter. This circuit may be used in transmitting devices such as cellular telephones and trunk radios. A Radio Frequency ("RF") signal to be transmitted is injected into this circuit at a signal input 100 to an Automatic Gain Control Amplifier ("AGC Amp") 105. The AGC Amplified RF signal is then amplified by the Power Amplifier ("PA") 110. The power amplified RF signal is then transmitted via an antenna system (not illustrated) connected at point 120. As the power amplified signal passes through a coupler 115, the magnitude of the signal is detected by diode detector 125. The detected output signal is then input into the negative terminal 132 of an Operational Amplifier ("OP Amp") 130. A direct current ("DC") reference voltage is provided at the input 134 of the OP AMP 130, from a processing unit 135 containing a digital to analog ("D/A") converter. The OP Amp 130 compares the detected output signal at the inverting input 132 with the DC reference voltage at the non-inverting input 134 and measures the difference between the voltages. This difference, or error voltage, is provided to the output 133 of the OP Amp 130 and applied across an output capacitor 140. The voltage stored within the output capacitor 140 is provided to the control input 142 of the AGC Amp 105. In operation, if the detected output signal is too high in comparison to the DC reference voltage, the output of the OP Amp 130 causes the AGC Amp 105 to decrease its amplification of the RF signal. On the other hand, if the detected output signal is too low in comparison to the DC reference voltage, the output of the OP Amp 130 causes the AGC Amp 105 to increase its amplification of the RF signal. In addition, a diode in series with a DC reference voltage may be used to provide temperature compensation.
Fig. 2a is a signal diagram of a typical non-constant wave signal, a π/ DQPSK modulated signal 200. The ϋ/4 DQPSK modulated signal 200 is typical to the signals that appear within a TDMA cellular telephone system. During a portion of the 11/4 DQPSK modulated signal 200, a data burst 215 is
present. Due to the presence of this data burst 215, the prior art hardware circuit illustrated in Fig. 1 is not able to adequately control the output power of a π 4 DQPSK transmitter. This inadequacy arises because the π DQPSK modulated signal 200 does not have a constant envelope as does an FM modulated signal. During the data burst 215, the circuit of Fig. 1 will attempt to track the changing magnitude of the signal 200 during the data burst 215. This will result in fluctuations in the output power level which ultimately distorts the data in the transmitted signal.
Using variations of the hardware circuit illustrated in Fig. 1, at least two techniques have been used to help alleviate the effect of the data burst 215 on output power level control circuit. One technique is to narrow the bandwidth of the feedback loop. Referring again to Fig. 1, the OP Amp 130, the feedback capacitor 145 and output capacitor 140 form an integrator circuit. By increasing the size of the capacitor 140, the response time of the integrator circuit, or the amount of time that it takes the integrator to respond to a change in the input signal, can be slowed down. Slowing the response time down effectively filters out the data burst 215 and prevents the integrator circuit from responding quickly to the ramp-up of a TDMA burst. The slow ramp-up of the burst could mean that the first few symbols of the burst would not be transmitted. Fig. 2b is a signal diagram of a typical non-constant wave signal illustrating the effect of a slow ramp-up time. The first few symbols 225 of the data burst 215 are corrupted.
Fig. 3 is a schematic diagram of a hardware circuit that alleviates the effect of the data burst 215 on output power level control circuit. In this circuit, the integrator has a fast response time and a switch 150 at the output of the OP Amp 130 is used to filter out the effect of the data burst 215. In operation, the switch 150 is initially closed. During the first portion 210 of the π/ DQPSK modulated signal 200, the output capacitor 140 will quickly charge and the integrator will closely follow the π/4 DQPSK modulated signal 200. Once the data burst 215 arrives, the switch 150 is opened thereby filtering out the data burst
215. The capacitor 140 maintains the charge during the data burst 215. Once the data burst 215 is completed, the switch 150 is again closed and the integrator continues to follow the π/4 DQPSK modulated signal 200. This technique is complex because it requires additional hardware components, as well as software control. Thus, there is a need in the art for an output power level controller that effectively operates with both constant and non-constant envelope signals.
Therefore, it is evident that there is a need in the art for a system and a method for controlling the output power of a transmitter that achieves immunity to temperature, frequency band and voltage variations, that minimizes the use of circuit board real-estate, and that operates on both constant and non-constant envelope signals.
SUMMARY OF THE INVENTION
The present invention overcomes the above described problems in the prior art output control techniques by providing a software oriented power level control method that is immune to temperature, frequency, and power supply voltage fluctuations, minimizes the amount of circuit board space required to implement, and is operable with both a constant envelope signal as well as a digital signal.
One exemplary embodiment of the present invention includes a control system for a transmitter. In this embodiment, the control system is operative to control the output level of the transmitter within a particular range. The control system includes a control circuit, a memory device and a processing unit. The control circuit includes a signal input and a control signal output. The memory device is utilized for storing calibration information and a program module.
The calibration information includes a plurality of calibration points. Each of these calibration points includes a frequency point and a control value. The frequency point identifies a frequency that the transmitter can be tuned to and
the control value represents a signal used to set the output level of the transmitter to a certain value.
The calibration points for the calibration information can be determined in a variety of manners. In an exemplary embodiment of the present invention, the calibration points are determined by first measuring the output characteristics the transmitter. The output characteristics are measured by adjusting the transmitter over a frequency range and measuring the output transmit power level. This process results in determining an output level curve for the transmitters. Next, in the exemplary embodiment, substantially linear regions of the output level curve are identified. In other embodiments, the output level curve can be broken down based on some other characteristic other than linearity. Regardless of the method used, the output level and the frequency of each end point of each region of the curve is determined. For each such end point, a calibration value or a control value is measured. The calibration value is a digital value that can be stored in the memory device and represents the input signal level to the output control circuit that is necessary to obtain the output signal level. In an exemplary embodiment, the calibration value may be the input to a digital to analog converter. Finally, the calibration values are stored within the memory device for later use.
The processing unit interfaces with the control circuit and the memory device. In response to instructions within the program module, the processing unit operates to control the output level of the transmitter. In operation, the processor identifies a desired frequency at which to operate the transmitter. The calibration points within the memory device are then examined to select a first and second calibration point. The first calibration point has a frequency component that is less than or equal to the desired frequency. The second calibration point has a frequency component that is greater than or equal to desired frequency. An output value for the desired frequency is then generated based, at least in part, on the first and second calibration points. In one embodiment of the present invention, the
generated output value may also depend on the operating temperature of the transmitter. In this embodiment, separate output level curves may be used for various temperature ranges. Alternatively, offset values may be used based on the temperature range. In another embodiment of the present invention, the generated output value may also depend on output voltage being provided by a power source. In this embodiment, separate output level curves may be used for various voltage ranges. Alternatively, offset values may be used based on the voltage range. In yet another embodiment of the present invention, the generated output level may also depend on a selected power level setting. The characteristics of the transmitter may vary between high and low power level settings. Thus, in this embodiment, separate output level curves may be used for various power level settings. In yet another embodiment of the present invention, the transmitter may operate in multiple modes such as an analog mode or a digital mode. In this embodiment, the generated output power level may depend on the current mode of operation of the transmitter. Finally, in various embodiments of the present invention, the generated output level may be determined in a variety of manners depending on the method used to characterize the output level curve and the calibration points. In the embodiment that characterizes the output level curve by selecting calibration points over linear regions, the output level may be generated by using linear interpolation. In other embodiments, various equations may be used with each equation identifying the characteristics of the output level curve. In other embodiments, a single calibration point in conjunction with an equation may be used to generate the output level.
Other objects, features, and advantages of the present invention will become apparent upon reading the following detailed description of the embodiments of the invention, when taken in conjunction with the accompanying drawings and appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a schematic diagram of a prior art hardware circuit used to control the output power of a transmitter.
Fig. 2a is a signal diagram of a typical non-constant wave signal, a π/4 DQPSK modulated signal.
Fig. 2b is a signal diagram of a typical non-constant wave signal illustrating the effect of a slow ramp-up time.
Fig. 3 is a schematic diagram of a hardware circuit that alleviates the effect of a data burst on the output power level control circuit.
Fig. 4 is a block diagram illustrating a typical transmitter circuit suitable for being controlled by various embodiments of the present invention.
Fig. 5 is a flow diagram illustrating the operation of an exemplary embodiment of the present invention.
Fig. 6 is a signal diagram of a typical characteristic curve obtained through an exemplary process of the present invention.
Fig. 7 is a block diagram illustrating an exemplary environment for various embodiments of the present invention.
DETAILED DESCRIPTION
Referring now to the remaining drawings, in which like numerals refer to like elements throughout the several views, exemplary embodiments of the present invention are described. Throughout the detailed description, reference will be made to the operation of the present invention when embodied within a cellular telephone; however, it should be understood that the present invention may also be utilized in other transmitting products including, but not limited to, trunked radios, cordless telephones, and licensed HAM radios.
Fig. 4 is a block diagram illustrating a typical transmitter circuit suitable for being controlled by various embodiments of the present invention. The transmitter includes an AGC Amp 405 and a PA 410. The AGC Amp 405 includes an input 401 for receiving an RF signal from point 400, and an output 402 for delivering the amplified RF signal to the input 411 of the PA 410. The PA 410 further amplifies the RF signal and provides the amplified signal at the output 412 for delivery to the remainder of the transmitter circuitry at point 420. The AGC Amp 405 also includes a control input 442. The control input 442 is coupled to a power control output 440 of a processing unit 435. The processing unit includes, among other things, a processing unit and memory, either volatile, non-volatile, or both. In one embodiment, a temperature sensor, such as a thermistor 455 may be used to measure the operating temperature of the transmitter. The temperature measurement is provided to the temperature input 456 of the processing unit 435 in either analog or digital form. If the temperature measurement is provided in analog form, the processing unit 435 will convert the analog value to a digital value for storage and/or processing. In another embodiment, a voltage sensor 460 may be used to measure the voltage level of a power supply 470. The voltage measurement is provided to the voltage input 451 of the processing unit 435 in either analog or digital form. If the voltage measurement is provided in analog form, the processing unit 435 will convert the analog value to a digital value for storage and or processing.
In an exemplary embodiment, the power control output 440 provides an analog voltage level to the control input 442 of the AGC Amp 405. The level of this analog signal determines the amplification applied to the RF signal by the AGC Amp 405. The processing unit varies the analog voltage level by writing various digital values into a digital to analog converter included within or external to the processing unit 435. Thus, during operation, the processing unit 435 can operate to pull power values out of memory, cause the power values to be
converted to an analog signal, and then provide this analog signal to the control input 442 of the AGC Amp 405.
Fig. 5 is a flow diagram illustrating the operation of an exemplary embodiment of the present invention. The operation of the illustrated embodiment includes two stages: the manufacturing stage 500 and the operational stage 550. At step 510, the characteristics of the transmitter are determined. During this process, the output power level of the transmitter is set to a fixed value and the transmitter is tuned across the frequency band, or a subset of the frequency band, in which the transmitter is to operate. While tuning the transmitter across the frequency band, the output power level is monitored to determine the characteristics of the transmitter. In one embodiment of the present invention, this process may be repeatedly performed for many different samples of the product; however, a single sample may also be utilized. Among other things, this process results in identifying an accurate characteristic curve for the transmitter.
Fig. 6 is a signal diagram of a typical characteristic curve 600 obtained through the process of step 510. In this embodiment, the operational frequency band ranges from 824 MHz to 849 MHz, a typical cellular telephone frequency band. Over this frequency band, the output power level of the transmitter varies less than 2dB. Once the characteristic curve has been identified, processing continues at step 515.
At step 515 of Fig. 5, calibration points for the transmitter are identified. The calibration points may be selected in a variety of manners. In an exemplary embodiment of the present invention, the calibration points are selected based on linear segments of the characteristic curve. Referring to Fig. 6, five calibration points 610, 620, 630, 640 and 650 have been selected. The curve of the characteristic curve 600 between these points is substantially linear. This aspect of this exemplary embodiment creates the ability, as is described in more detail below, to utilize linear interpolation to identify additional points along the characteristic curve. However, those skilled in the art will understand that various
equations or other representations may be used to perform the process. What is important is that a limited number of sample points are selected and the remainder of the characteristic curve can be accurately generated from these sample points. Once the calibration points have been selected, processing continues at step 520.
At step 520, each of the calibration points are characterized. This process includes identifying the frequency associated with the calibration point, and an output control value necessary to cause the transmitter to transmit within the required output power range. An advantage of the present system is that this process only has to be performed once at the time of manufacturing the unit. The unit would only need to be re-calibrated, if a component is changed. If the transmitter is re-designed with different components, then temperature and voltage would have to be re-characterized. Thus, each calibration point includes data to identify the frequency associated with the calibration point, and the output control value. After the calibration points have been characterized, processing continues at step 525.
At step 525, the data identifying the calibration points (i.e., the frequency and the output control value) are stored into memory. Completing step 525 also completes the processing necessary during the manufacturing stage 500.
At step 555 of the operational stage 550, the product housing the transmitter is in actual operation. If the product is a cellular telephone, during the operational stage 550, the cellular telephone may receive commands to change the power level, the active frequency, or both. In response to receiving such a command, processing continues at step 560.
At step 560, in one embodiment of the present invention, a set of calibration points are selected based on the required power level. This aspect of this embodiment of the present invention can best be described with reference to a multi-mode cellular telephone, (i.e., one that includes two or more of the following technologies: AMPS, TDMA, GSM or any other similar technology). Such a cellular telephone must operate at nine different power levels (PL2 through
PL 10). At PL2, the transmitter is slightly into compression and thus, there is not as much drift in the output voltage level across the frequency band. At PL3 to PL 10, the transmitter is no longer in compression. As a result, in one particular embodiment, two characteristic curves, each having a separate set of calibration points, are actually created, one curve for PL2 and another curve for PL3 through PL 10. Once the correct set of calibration points has been selected, processing continues at step 565.
At step 565, the calibration'points are examined to determine if the active frequency directly corresponds with one of the calibration points. If so, processing continues at step 570. Otherwise processing continues at step 590.
At step 570, the active frequency directly corresponds with one of the calibration points. In this situation, the output level value for the calibration point is read out of memory and processing continues at step 575. At step 590, the active frequency does not directly correspond with one of the calibration points. In this situation, the two calibration points associated with the nearest frequency above and below the active frequency are selected. Processing then continues at step 595. At step 595, the two selected calibration points are used to calculate the output level value for the active frequency. In an exemplary embodiment, this calculation is performed by using linear interpolation between the two calibration points and the active frequency. It should be understood that this is only one possible technique to determine the output level value. In an alternate embodiment, rather than using two calibration points, a single calibration point and an equation representing the characteristics of the curve may be used. Regardless of the method used, the final results of steps 570 and 595 is the output level value. Processing then continues at step 575.
At step 575, temperature compensation may be performed. Temperature compensation involves measuring the current operating temperature of the transmitter and making adjustments to the output level value based on these measurements. In some embodiments, the temperature compensation may also
account for modes of operation and frequency band. In an exemplary embodiment, separate temperature compensation information is created and stored based on the mode of operation (digital or analog cellular), the frequency band (high or low) and whether the temperature is above or below 25 degrees C. Similar to characterizing the transmitter in step 510, the temperature characteristics of the transmitter are identified during the manufacturing stage and then stored into the products memory for use in the operational stage. In this embodiment, step 575 involves identifying the mode of operation, frequency band and current temperature, and then selecting temperature compensation data based on at least these criteria and the current transmission frequency. Once the temperature compensation has been determined, the output level value is either increased or decreased based upon the applicable temperature compensation data. Processing then continues at step 580.
At step 580, supply voltage compensation may be performed. As the voltage level of the supply voltage increases or decreases, the output characteristics of the transmitter vary. The effect of varying supply voltages on the output characteristics can easily be determined during the manufacturing process and the results may then be stored into the memory of the product. In step 580, the level of the supply voltage is measured and then used to identify a voltage compensation value. The output level value is then either increased or decreased based on the voltage compensation value. Processing then continues at step 585.
At step 585, the temperature and voltage compensated output level value is used to adjust the output voltage level of the transmitter. In an exemplary embodiment, this process involves writing the output level value to a digital to analog converter, wherein the output of the digital to analog converter is used to control the output power level. Referring again to Fig. 4, the output of the digital to analog converter would be presented at the control input 442 of the AGC Amp 405.
EXEMPLARY OPERATING ENVIRONMENT
Fig. 7 is a system diagram that illustrates an exemplary environment suitable for implementing various embodiments of the present invention. Fig. 7 and the following discussion provide a general overview of a platform onto which the invention may be integrated or implemented. Although in the context of the exemplary environment the invention will be described as consisting of instructions within a software program being executed by a processing unit, those skilled in the art will understand that portions of the invention, or the entire invention itself may also be implemented by using hardware components, state machines, or a combination of any of these techniques. In addition, a software program implementing an embodiment of the invention may run as a stand-alone program or as a software module, routine, or function call, operating in conjunction with an operating system, another program, system call, interrupt routine, library routine, or the like. The term program module will be used to refer to software programs, routines, functions, macros, data, data structures, or any set of machine readable instructions or object code, or software instructions that can be compiled into such, and executed by a processing unit.
Those skilled in the art will appreciate that the system illustrated in Fig. 1 may take on many forms and may be directed towards performing a variety of functions. Examples of such forms and functions include cellular telephones, radio telephones, portable telephones, two-way pagers, personal computers, handheld devices such a personal data assistants and calculators, consumer electronics, note-book computers, lap-top computers, and a variety of other applications, each of which may serve as an exemplary environment for embodiments of the present invention.
The exemplary system illustrated in Fig. 7 includes a computing device 710 that is made up of various components including, but not limited to a processing unit 712, non- volatile memory 714, volatile memory 716, and a system bus 718 that couples the non- volatile memory 714 and volatile memory 716 to the
processing unit 712. The non-volatile memory 714 may include a variety of memory types including, but not limited to, read only memory (ROM), electronically erasable read only memory (EEROM), electronically erasable and programmable read only memory (EEPROM), electronically programmable read only memory (EPROM), electronically alterable read only memory (EAROM), FLASH memory, bubble memory, and battery backed random access memory (RAM). The non-volatile memory 714 provides storage for power on and reset routines (bootstrap routines) that are invoked upon applying power or resetting the computing device 710. In some configurations the non- volatile memory 714 provides the basic input/output system (BIOS) routines that are utilized to perform the transfer of information between elements within the various components of the computing device 710.
The volatile memory 716 may include, but is not limited to, a variety of memory types and devices including, but not limited to, random access memory (RAM), dynamic random access memory (DRAM), FLASH memory, EEPROM, bubble memory, registers, or the like. The volatile memory 716 provides temporary storage for routines, modules, functions, macros, data etc. that are being or may be executed by, or are being accessed or modified by the processing unit 712. In general, the distinction between non- volatile memory 714 and volatile memory 716 is that when power is removed from the computing device 710 and then reapplied, the contents of the non- volatile memory 714 remain in tact, whereas the contents of the volatile memory 716 are lost, corrupted, or erased.
The computing device 710 may access one or more external display devices 730 such as a CRT monitor, LCD panel, LED panel, electro-luminescent panel, or other display device, for the purpose of providing information or computing results to a user. In some embodiments, the external display device 730 may actually be incorporated into the product itself. The processing unit 712 interfaces to each display device 730 through a video interface 720 coupled to the processing unit 710 over the system bus 718.
The computing device 710 may send output information, in addition to the display 730, to one or more output devices 732 such as a speaker, modem, printer, plotter, facsimile machine, RF or infrared transmitter, computer or any other of a variety of devices that can be controlled by the computing device 710. The processing unit 712 interfaces to each output device 732 through an output interface 722 coupled to the processing unit 712 over the system bus 718. The output interface may include one or more of a variety of interfaces, including but not limited to, an RS-232 serial port interface or other serial port interface, a parallel port interface, a universal serial bus (USB), an optical interface such as infrared or IRDA, an RF or wireless interface such as Bluetooth, or other interface.
The computing device 710 may receive input or commands from one or more input devices 734 such as a keyboard, pointing device, mouse, modem, RF or infrared receiver, microphone, joystick, track ball, light pen, game pad, scanner, camera, computer or the like. The processing unit 712 interfaces to each input device 734 through an input interface 724 coupled to the processing unit 712 over the system bus 718. The input interface may include one or more of a variety of interfaces, including but not limited to, an RS-232 serial port interface or other serial port interface, a parallel port interface, a universal serial bus (USB), an optical interface such as infrared or IrDA, an RF or wireless interface such as Bluetooth, or other interface.
It will be appreciated that program modules implementing various embodiments of the present invention may be may be stored in the non- volatile memory 714, the volatile memory 716, or in a remote memory storage device accessible through the output interface 722 and the input interface 724. The program modules may include an operating system, application programs, other program modules, and program data. The processing unit 712 may access various portions of the program modules in response to the various instructions contained therein, as well as under the direction of events occurring or being received over the input interface 724.
The computing device 710 may transmit signals to, or receive signals from, one or more communications systems 736 such as a cellular network, RF network, computer network, cable network, optical network or the like. The processing unit 712 interfaces to each communications system 736 through a transmitter 726 and a receiver 728, both coupled to the processing unit 712 over the system bus 718. The transmitter 726 and the receiver 728 may include one or more of a variety of transmission techniques such as a radio frequency interface (AM, FM, PSK, QPSK, TDMA, CDMA, Bluetooth or other technique) or an optical interface such as infrared or IrDA.
CONCLUSION
Thus, the present invention provides a software based method to accurately control the output power level of a transmitter. Rather than utilizing hardware components to monitor the output level of the transmitter, the present invention operates to determine the output characteristic curve of the transmitter. Selected frequency points of the output characteristic curve are identified and the frequency, along with the control value required to obtain a desired output level, are stored within the memory of a device embodying the present invention. The present invention operates to control the output level of the transmitter at any particular frequency by using control values for frequencies immediately above and below the particular frequency to determine a control value for the particular frequency. The present invention provides a level of immunity to temperature and voltage supply variations by adjusting the control values to compensate for such. Because the use of a feedback loop and an integrator is eliminated, the present invention is suitable to operate with both constant and non-constant envelope signals. In addition, the elimination of the feedback loop and the integrator frees up additional circuit board space.
While this invention has been described in detail with particular reference to preferred embodiments thereof, it will be understood that variations
and modifications can be effected within the scope of the invention as defined in the appended claims.