CN109660219B - Calibration circuit, method, device, equipment and storage medium for power amplifier - Google Patents
Calibration circuit, method, device, equipment and storage medium for power amplifier Download PDFInfo
- Publication number
- CN109660219B CN109660219B CN201811495608.0A CN201811495608A CN109660219B CN 109660219 B CN109660219 B CN 109660219B CN 201811495608 A CN201811495608 A CN 201811495608A CN 109660219 B CN109660219 B CN 109660219B
- Authority
- CN
- China
- Prior art keywords
- current
- power amplifier
- preset range
- range value
- gate voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
- H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The application discloses a calibration circuit, a method, a device, equipment and a storage medium of a power amplifier, wherein the method comprises the following steps: turning off the radio frequency modulation signal of the power amplifier; calibrating the quiescent current of the power amplifier by adjusting the gate voltage of the power amplifier; turning on a radio frequency modulation signal of the power amplifier; the output power of the power amplifier is calibrated by adjusting the input power of the power amplifier. The method eliminates the influence of other components on current detection, realizes automatic calibration of static current and output power, and improves calibration accuracy.
Description
Technical Field
The present application relates generally to the field of communication devices, and in particular, to a calibration circuit, method, apparatus, device and storage medium for a power amplifier.
Background
At present, unmanned aerial vehicle communication technology is continuously developed along with the progress of using mode and information technology, in order to realize remote communication of unmanned aerial vehicle and ground basic station, high-power transmitter is the essential equipment of machine-mounted radio station and ground basic station, and it generally includes MOSFET device power amplifier, because the big that leads to its performance to influence of possible grid turn-on voltage discrete type in the manufacturing process of MOSFET device power amplifier, adopts adjustable grid voltage to realize the calibration of static operating point in the in-service use.
In the prior art, the calibration of the current and the power of the MOSFET device power amplifier is generally realized through a programmable power supply, an upper computer, an MCU (Microcontroller Unit; abbreviated as a micro control unit) and the like, and the specific process is that the upper computer reads the current value Ia displayed on the programmable power supply, and reads the current value Ib again through adjusting the gate voltage, and the gate voltage is adjusted again according to the difference value between Ib and Ia so as to finish the calibration of the power amplifier.
However, due to consumption of other components in the circuit to be calibrated in different working modes, fluctuation of sampling current is caused, so that the calibration accuracy of the current is not high, and other additional test equipment is needed for calibrating the output power, so that the calibration cost is high and the process is complex.
Disclosure of Invention
In view of the foregoing drawbacks or shortcomings of the prior art, it is desirable to provide a calibration circuit, method, apparatus, device, and storage medium for a power amplifier that enables accurate calibration of the power amplifier and real-time monitoring of the performance of the power amplifier.
In a first aspect, the present invention provides a calibration circuit for a power amplifier, the calibration circuit comprising: the micro control unit MCU, the power amplifier, the current sampling detection resistor and the current detection chip, wherein:
The drain electrode input end of the power amplifier is connected with one end of the current sampling detection resistor, the gate electrode input end of the power amplifier is connected with the digital-to-analog conversion interface of the MCU, the output end of the current detection chip is connected with the analog-to-digital conversion interface of the MCU, and the input end of the current detection chip is connected with two ends of the current sampling detection resistor.
In a second aspect, the present invention provides a method of calibrating a power amplifier, the method comprising:
turning off the radio frequency modulation signal of the power amplifier;
calibrating the quiescent current of the power amplifier by adjusting the gate voltage of the power amplifier;
turning on a radio frequency modulation signal of the power amplifier;
the output power of the power amplifier is calibrated by adjusting the input power of the power amplifier.
In one embodiment, the calibrating the quiescent current of the power amplifier by adjusting the gate voltage of the power amplifier includes:
circularly executing a first appointed operation until a first static current of the power amplifier is within a first preset range value;
The first specifying operation includes:
determining a first quiescent current according to a first current gate voltage of the power amplifier; when the first specified operation is executed for the first time, the first current gate voltage is an initial gate voltage, and when the first specified operation is not executed for the first time, the first current gate voltage is an adjusted first gate voltage obtained when the first specified operation is executed for the previous time;
judging whether the first static current is in a first preset range value or not;
when the first quiescent current is not in the first preset range value, the first current grid voltage is regulated to obtain a regulated first grid voltage, and the next first appointed operation is controlled;
when the first quiescent current is within a first preset range value, control does not enter the next first specified operation.
In one embodiment, determining the first quiescent current according to a first present gate voltage of the power amplifier comprises:
obtaining the output voltage of the current detection chip; the output voltage and the first current gate voltage are positively correlated;
Determining a first quiescent current of the power amplifier according to the formula Ids = Vout/(Gain Rsense); where Ids is the first quiescent current of the power amplifier, vout is the output voltage of the current detection chip, gain is the Gain of the current detection chip, and Rsense is the resistance value of the current sampling detection resistor.
In one embodiment, when the first quiescent current is not within the first preset range value, the current gate voltage value is adjusted to obtain an adjusted first gate voltage, including:
when the first static current is larger than the maximum value of the first preset range value, reducing the first current grid voltage by a first preset step length;
and when the first static current is smaller than the minimum value of the first preset range value, increasing the first current grid voltage by the first preset step length.
In one embodiment, the loop performs a first specified operation until after the first quiescent current of the power amplifier is within a first preset range value, the method further comprising:
circularly executing a second designated operation until a second quiescent current of the power amplifier is within a second preset range value; wherein:
The second specifying operation includes:
determining a second quiescent current according to the second present gate voltage of the power amplifier; the second current gate voltage is the adjusted first gate voltage when the second specified operation is performed for the first time, and the second current gate voltage is the adjusted second gate voltage when the second specified operation is not performed for the first time;
judging whether the second static current is in the second preset range value or not; the maximum value in the second preset range value is smaller than the maximum value in the first preset range value; the minimum value in the second preset range value is larger than the minimum value in the first preset range value;
when the second quiescent current is not in the second preset range value, the second current grid voltage is regulated to obtain a regulated second grid voltage, and the next second designated operation is controlled;
when the second quiescent current is within the second preset range value, control does not enter the next second designated operation.
In one embodiment, when the second quiescent current is not within the second preset range value, the adjusting the second current gate voltage to obtain an adjusted second gate voltage includes:
When the second quiescent current is greater than the maximum value of the second preset range value, reducing the second current gate voltage by the second preset step size; the second preset step length is smaller than the first preset step length;
and when the second static current is smaller than the minimum value of the second preset range value, increasing the second current grid voltage by the second preset step length.
In one embodiment, calibrating the output power of the power amplifier by adjusting the input power of the power amplifier includes:
circularly executing a third appointed operation until the dynamic current of the power amplifier is within a third preset range value;
the third specifying operation includes:
determining a dynamic current according to the current input power of the power amplifier; when the third specified operation is executed for the first time, the current input power is the initial input power, and when the third operation is not executed for the first time, the current input power is the adjusted input power obtained when the third specified operation is executed for the previous time;
judging whether the dynamic current is in a third preset range value or not;
when the dynamic current is not in a third preset range value, regulating the current input power to obtain regulated input power, and controlling to enter a next third appointed operation;
When the dynamic current is within a third preset threshold range, control does not enter the next third designated operation.
In one embodiment, when the dynamic current is not within a third preset range value, the current input power is adjusted to obtain an adjusted input power, which includes:
when the dynamic current is larger than the maximum value of the third preset range value, the current input power is reduced by the third preset step length;
and when the dynamic current is smaller than the minimum value of the third preset range value, increasing the current input power by the third preset step length.
In one embodiment, the method further comprises:
determining an adjusted second gate voltage and the adjusted input power;
determining a present dynamic current of the power amplifier based on the second gate voltage and the adjusted input power;
judging whether the current dynamic current is in a fourth preset range value or not;
and when the current dynamic current is not in the fourth preset range, adjusting the second grid voltage to zero, and turning off the radio frequency modulation signal.
In a third aspect, an embodiment of the present application provides an apparatus for calibrating an amplifier, the apparatus comprising:
A shutdown module configured to shut down the radio frequency modulated signal of the power amplifier;
a current calibration module configured to calibrate a quiescent current of the power amplifier by adjusting a gate voltage of the power amplifier;
the starting module is configured to start the radio frequency modulation signal of the power amplifier;
and the power calibration module is configured to calibrate the output power of the power amplifier by adjusting the input power of the power amplifier.
In a fourth aspect, an embodiment of the present application provides an apparatus, including a memory and a processor, where the memory stores a computer program, and the processor implements the method for calibrating a power amplifier described above when executing the computer program.
In a fifth aspect, an embodiment of the present application provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the above-mentioned power amplifier calibration method.
The calibration circuit, the method, the device, the equipment and the storage medium of the power amplifier, provided by the embodiment of the application, are used for closing the radio frequency modulation signal of the power amplifier, calibrating the static current of the power amplifier by adjusting the grid voltage of the power amplifier, starting the radio frequency modulation signal of the power amplifier, and calibrating the output power of the power amplifier by adjusting the input power of the power amplifier. According to the technical scheme, the influence of other current consumption devices in the calibration circuit on current detection can be eliminated, so that the calibration accuracy of the quiescent current can be improved, and the calibration of the quiescent current and the output power of the power amplifier can be realized at the same time without additional testing equipment, so that the calibration process is simpler and more convenient.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the accompanying drawings in which:
FIG. 1 is a schematic diagram of a calibration circuit of a prior art power amplifier;
FIG. 2 is a flow chart of a calibration method of a power amplifier in the prior art;
fig. 3 is a schematic structural diagram of a calibration circuit of a power amplifier according to an embodiment of the present application;
fig. 4 is a flowchart illustrating a method for calibrating a power amplifier according to an embodiment of the present application;
FIG. 5 is a schematic diagram showing a relationship between drain current and gate voltage of a power amplifier according to an embodiment of the present application;
fig. 6 is a flow chart of a method for calibrating coarse adjustment of quiescent current of a power amplifier according to an embodiment of the present application;
fig. 7 is a flowchart illustrating a method for calibrating an acquiring quiescent current of a power amplifier according to an embodiment of the present application;
fig. 8 is a flowchart illustrating a method for calibrating a quiescent current fine tuning of a power amplifier according to an embodiment of the present application;
fig. 9 is a flowchart illustrating a method for calibrating output power of a power amplifier according to an embodiment of the present application;
Fig. 10 is a schematic flow chart of state monitoring and protection of a power amplifier according to an embodiment of the present application;
fig. 11 is a schematic structural diagram of a calibration device of a power amplifier according to an embodiment of the present application;
fig. 12 is a schematic structural diagram of a computer device according to an embodiment of the present application.
Detailed Description
The application is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be noted that, for convenience of description, only the portions related to the application are shown in the drawings.
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.
As mentioned in the background art, referring to fig. 1, the calibration circuit includes a power amplifier 10 and an MCU30, wherein a programmable power supply 20 is connected with a motherboard to be calibrated where the power amplifier 10 is located, a gate input end of the power amplifier 10 is connected with one end of the MCU30, and the other end of the MCU30 is connected with an upper computer 40, so as to implement serial communication. The calibration of the power amplifier is generally realized by adopting a programmable power supply to be matched with an upper computer and an MCU, wherein the programmable power supply is a standard power supply with stronger purpose, and the microcomputer technology is adopted to control the magnitude of current provided by the power supply to a circuit in real time; the upper computer is a computer capable of directly sending control commands, can adopt serial communication, sends commands to the MCU to realize communication, and realizes bidirectional communication between the General-Purpose IO ports and the program-controlled power supply through GPIO (General-Purpose IO ports for short). The specific calibration process can be shown in fig. 2, the gate voltage of the power amplifier is set to zero, the whole current value of the main board to be calibrated is collected through the programmable power supply and recorded as Ia, the Ia is sent to the upper computer, the output voltage of the digital-to-analog converter in the MCU is regulated through the control of the upper computer, the corresponding whole current value is recorded as Ib, whether the difference value is within a preset range value or not is judged according to the difference value of the Ib and the Ia, if the difference value is not within the preset range value, the digital-to-analog converter in the MCU is controlled by the upper computer to increase or decrease the gate voltage in a preset step length, as shown in fig. 2, the preset range is 240-260 mA, the preset step length is 0.05v, and therefore the calibration of the static current of the power amplifier is achieved, and the calibration of the output power of the power amplifier is achieved through devices such as a spectrometer.
However, in the prior art, when the quiescent current is calibrated, the current sampling value of the quiescent current contains the current consumption of other components in the circuit to be calibrated, and the other components are in different working modes to cause larger fluctuation of the sampling current, so that the current calibration precision is not high, and in the output power calibration process, other additional test equipment is needed, so that the calibration cost is high and the calibration process is complex.
In view of the above-mentioned drawbacks of the prior art, the present application provides a calibration method for a power amplifier, which eliminates the influence of other current consuming devices in a calibration circuit on current detection without using a calculation mode of difference between current sampling values, directly adjusts gate voltage to calibrate quiescent current of the power amplifier, adjusts input power of the power amplifier to calibrate output power, and avoids using other test equipment.
Fig. 3 is a schematic structural diagram of a calibration circuit of a power amplifier according to an embodiment of the present application, as shown in fig. 3, the circuit to be calibrated includes a micro control unit MCU30, a power amplifier 10, a current sampling detection resistor 60 and a current detection chip 50, wherein a drain input end of the power amplifier 10 is connected to one end of the current sampling detection resistor 60, a gate input end of the power amplifier 10 is connected to a digital-to-analog conversion interface (DAC) of the MCU30, an output end of the current detection chip 50 is connected to an analog-to-digital conversion interface (ADC) of the MCU30, and an input end of the current detection chip 50 is connected to two ends of the current sampling detection resistor 60.
Specifically, the current detection chip 50 may be a voltage output chip MAX44284, the input end of which is connected to two ends of the current sampling resistor 60, and may be used to detect the drain current of the power amplifier 10, and the output voltage is proportional to the voltage drop of the current sampling resistor, so as to obtain the output voltage of the current detection chip 50, convert the analog signal into the digital signal through the analog-to-digital conversion interface in the MCU30, collect the output voltage of the current detection chip 50, and convert the digital signal into the analog signal through the digital-to-analog conversion interface of the MCU30 during the calibration process, and because of the positive correlation between the static current and the gate voltage, the calibration of the static current of the power amplifier 10 may be achieved by adjusting the gate voltage.
Optionally, the analog-to-digital conversion interface may be 16 bits or 12 bits, where when the analog-to-digital conversion interface is 16 bits, the current detection resolution is 1.26 milliamp (mA), and the current detection resolutions corresponding to different bit widths are different, so that the more the bit widths are, the greater the current detection resolution is, so that the current detection is more accurate; also, the digital-to-analog conversion interface may be 16 bits or 12 bits, wherein when the digital-to-analog conversion interface is 12 bits, the gate voltage detection resolution is 0.8mA.
Fig. 4 is a flow chart of a calibration method of a power amplifier according to an embodiment of the present invention, as shown in fig. 4, the method includes:
s101, turning off the radio frequency modulation signal of the power amplifier.
S102, calibrating the quiescent current of the power amplifier by adjusting the grid voltage of the power amplifier.
In general, a modulation transmitter modulates an audio signal and a high-frequency carrier wave into a modulation wave so that the frequency of the high-frequency carrier wave changes with the audio signal, amplifies the generated high-frequency signal by a power amplifier, excites the high-frequency signal, and outputs the signal to an antenna by power amplification and a series of impedance matching. The static current of the power amplifier cannot meet the normal working requirement of the power amplifier due to the deviation of the manufacturing process, and the grid voltage can be adjusted by closing the radio frequency modulation signal, so that the static current of the power amplifier is calibrated.
Specifically, there is a positive correlation between the drain current and the gate voltage of the power amplifier, as shown in fig. 5, where the current consumed by the power amplifier is a static current when the radio frequency modulation signal is turned off, and the current consumed by the power amplifier is a dynamic current when the radio frequency modulation signal is turned on, and optionally, the gate voltage can be controlled and adjusted through the digital-to-analog conversion interface of the MCU, so as to implement calibration of the static current of the power amplifier.
S103, turning on a radio frequency modulation signal of the power amplifier.
S104, adjusting the input power of the power amplifier to calibrate the output power of the power amplifier.
Specifically, after the static current calibration is performed on the power amplifier, the radio frequency modulation signal of the power amplifier can be started, so that the power amplifier outputs dynamic current, and the dynamic current is in a preset range by adjusting the input power of the power amplifier, so that the calibration of the output power of the power amplifier is realized.
According to the calibration method of the power amplifier, the radio frequency modulation signal of the power amplifier is turned off, the static current of the power amplifier is calibrated by adjusting the grid voltage of the power amplifier, the radio frequency modulation signal of the power amplifier is turned on, and the output power of the power amplifier is calibrated by adjusting the input power of the power amplifier. According to the technical scheme, the influence of other current consumption devices in the calibration circuit on current detection can be eliminated, so that the calibration accuracy of the quiescent current can be improved, and the calibration of the quiescent current and the output power of the power amplifier can be realized at the same time without additional testing equipment, so that the calibration process is simpler and more convenient.
Fig. 6 is a schematic flow chart of coarse tuning calibration of quiescent current of a power amplifier according to an embodiment of the present invention, and as shown in fig. 6, the method includes:
circularly executing a first appointed operation until the first static current of the power amplifier is within a first preset range value; the first specifying operation includes:
s201, determining a first static current according to a first current grid voltage of a power amplifier; the method comprises the steps that when a first appointed operation is executed for the first time, a first current grid voltage is an initial grid voltage, and when the first appointed operation is not executed for the first time, the first current grid voltage is an adjusted first grid voltage obtained when the first appointed operation is executed for the last time;
alternatively, as an implementation manner of determining the first quiescent current, it may include:
s301, obtaining output voltage of a current detection chip; the output voltage is positively correlated with the current gate voltage.
S302, determining a first quiescent current of the power amplifier according to the formula ids=vout/(Gain). Where Ids is the first quiescent current of the power amplifier, vout is the output voltage of the current detection chip, gain is the Gain of the current detection chip, and Rsense is the resistance value of the current sampling detection resistor.
Specifically, during the process of calibrating the quiescent current, the output voltage of the current detection chip may be collected through an analog-to-digital conversion interface in the MCU, and after the output voltage of the current detection chip is obtained, the first quiescent current of the power amplifier may be determined according to the formula ids=vout/(gain×rsense), where in this embodiment, optionally, the Gain gain=50 of the current detection chip and the resistance value rsense=40mΩ of the current sampling detection resistor. It should be noted that, since the output voltage of the current detection chip is proportional to the first quiescent current, and the first quiescent current of the power amplifier is positively correlated with the first present gate voltage, the output voltage of the current detection chip is positively correlated with the first present gate voltage.
S202, judging whether the first static current is in a first preset range value or not;
and S203, when the first static current is not in the first preset range value, adjusting the first current grid voltage to obtain an adjusted first grid voltage, and returning to continue to execute the step 201.
Specifically, when the first quiescent current is not within the first preset range value, the adjusted first gate voltage may be obtained by increasing or decreasing the current gate voltage value, where the first current gate voltage is decreased by a first preset step size when the first quiescent current is greater than a maximum value of the first preset range value, and increased by the first preset step size when the first quiescent current is less than a minimum value of the first preset range value.
S204, when the first static current is within a first preset range value, the process is ended.
Specifically, when calibration is started, the radio frequency modulation signal is turned off, a first static current is determined according to an initial grid voltage of the power amplifier, whether the first static current is in a first preset range value is judged, if the first static current is not in the first preset range value, the adjusted first grid voltage is obtained by adjusting a first current grid voltage value, and if the first static current is in the first preset range value, coarse adjustment of the power amplifier is completed.
It should be noted that, the calibration process in the embodiment of the present application may be divided into coarse adjustment and fine adjustment, where the adjustment range during coarse adjustment is large, the precision is small, and the adjustment range during fine adjustment is small, and the precision is high. The first specified operation is a process of coarse tuning the quiescent current, and the first preset range is a preset range set when coarse tuning the quiescent current.
Specifically, when the quiescent current of the power amplifier is within the first preset range, the coarse adjustment of the quiescent current is completed, and if the quiescent current is more accurate, the quiescent current needs to be finely adjusted.
Fig. 8 is a schematic diagram of a process for fine-tuning and calibrating a quiescent current according to an embodiment of the present application. The method comprises the following steps:
circularly executing a second designated operation until the static current of the power amplifier is within a second preset range value; wherein: the second specifying operation includes:
s401, determining a second static current according to a second current grid voltage of the power amplifier; the second current gate voltage is the adjusted first gate voltage when the second designating operation is performed for the first time, and the second current gate voltage is the adjusted second gate voltage when the second designating operation is not performed for the first time.
The process of determining the second quiescent current is the same as the implementation process of determining the first quiescent current, and will not be described herein.
S402, judging whether the second static current is in a second preset range value or not;
the second preset range value is a preset range value set during fine adjustment of the quiescent current, so that the maximum value in the second preset range value is required to be smaller than the maximum value in the first preset range value, and the minimum value in the second preset range value is required to be larger than the minimum value in the first preset range value.
S403, when the second static current is not in the second preset range value, the current grid voltage is regulated to obtain a regulated second grid voltage, and the step 401 is carried out again;
Specifically, when the second quiescent current is not within the second preset range value, the adjusted second gate voltage may be obtained by increasing or decreasing the second current gate voltage, when the second quiescent current is greater than the maximum value of the second preset range value, the second current gate voltage is decreased by a second preset step size, and when the second quiescent current is less than the minimum value of the second preset range value, the second current gate voltage is increased by the second preset step size.
Wherein the second preset step size should be smaller than the first preset step size.
S404, when the second static current is within a second preset range value, the process is ended.
For example, when the quiescent current of the power amplifier is specifically calibrated, the initial gate voltage may be set to 1.3V, the normal quiescent current of the power amplifier is 250mA, the convergence range of the quiescent current at the time of coarse adjustment is 240-260 mA, the step value at the time of adjustment of the gate voltage is 0.05, the convergence range of the quiescent current at the time of fine adjustment is 248-252 mA, the step value at the time of adjustment of the gate voltage is 0.01, that is, the first preset range value is 240-260 mA, the first preset step size is 0.05, the second preset range value is 248-252 mA, and the second preset step size is 0.01. By adjusting the gate voltage, the static current is smaller in discrete form, and the static current is more approximate to 250mA.
For example, in the adjustment process, the radio frequency modulation signal is turned off first, the gate voltage is input to the power amplifier by 1.3V, the output voltage of the current detection chip is collected through the analog-to-digital conversion interface, and the quiescent current is determined according to the formula ids=vout/(gain=rsense), wherein the current detection chip gain=50, the current sampling resistance rsense=40mΩ, the quiescent current is compared with 260mA, if the quiescent current is greater than 260mA, the adjustment gate voltage is controlled to be reduced by 0.05V, if the quiescent current is less than 260mA, the quiescent current is compared with 240mA, if the quiescent current is greater than 240mA, the continuous coarse adjustment is not needed, and if the quiescent current is less than 240mA, the adjustment gate voltage is controlled to be increased by 0.05V. Similarly, the fine adjustment process is consistent with the coarse adjustment process, and the step of the grid voltage is smaller than that of the coarse adjustment process, so that the static current is converged at 248-252 mA, and the calibration of the static current of the power amplifier is realized.
The method for calibrating the quiescent current of the power amplifier provided by the embodiment comprises a coarse adjustment process and a fine adjustment process for the quiescent current, so that the calibrated quiescent current is more accurate.
Fig. 9 is a schematic flow chart of calibrating output power of a power amplifier according to an embodiment of the present invention. As shown in fig. 9, the method includes:
Circularly executing a third appointed operation until the dynamic current of the power amplifier is within a third preset range value; the third specifying operation includes:
s501, determining dynamic current according to the current input power of the power amplifier; when the third specified operation is executed for the first time, the current input power is the initial input power, and when the third operation is not executed for the first time, the current input power is the adjusted input power obtained when the third specified operation is executed for the previous time.
S502, judging whether the dynamic current is in a third preset range value.
S503, adjusting the current input power to obtain the adjusted input power, and returning to S501.
Specifically, after the static current calibration process of the power amplifier is completed, a radio frequency adjustment signal is input to the power amplifier to obtain a dynamic current, for example, 15dBm of power can be input to the power amplifier, the dynamic current is compared with a third preset range value, the current input power is adjusted to enable the dynamic current to be converged in the third preset range value, and when the dynamic current is not in the third preset range value, the current input power is adjusted to obtain the adjusted input power; when the dynamic current is within the third preset range value, the output power calibration of the power amplifier is completed. Alternatively, the output power may be made to be within a third preset range value by increasing or decreasing the input power by a third step size.
For example, if the normal output power range of the power amplifier is 1.8-1.85 w, according to the test experience value, the corresponding dynamic current range is 700-720 mA, the obtained dynamic current is compared with 720mA, if the dynamic current is larger than 720mA, the input power value is reduced by 0.1dB, if the current value is smaller than 700mA, the input power is increased by 0.1dB, so that the dynamic current is converged at 700-720 mA, and the output power calibration of the power amplifier is completed.
The calibration method of the power amplifier provided by the embodiment can realize the calibration of the output power of the power amplifier without additional testing equipment, and the implementation process is simple and convenient.
Fig. 10 is a schematic diagram of a state monitoring and protection process of a power amplifier according to an embodiment of the present invention. As shown in fig. 10, the method includes:
s601, determining an adjusted second grid voltage and an adjusted input power;
s602, determining the current dynamic current of the power amplifier according to the second grid voltage and the regulated input power;
s603, judging whether the current dynamic current is in a fourth preset range value or not;
s604, when the current dynamic current is not in the fourth preset range, the second grid voltage is adjusted to be zero, and the radio frequency modulation signal is turned off.
Specifically, when the power amplifier works, the power amplifier can be monitored in real time to determine whether the power amplifier is in a normal state, through the calibration of the static current and the output power of the power amplifier, the adjusted second grid voltage and the adjusted input power are determined, so that the current dynamic current of the power amplifier is obtained, whether the current dynamic current is in a fourth preset range value is determined, wherein the fourth preset range is a threshold range of the power amplifier in a safe working state, and when the current dynamic current is greater than the maximum value in the fourth preset range or less than the minimum value in the fourth preset range value, the second grid voltage is adjusted to be zero, and the radio frequency modulation signal is turned off, so that the power amplifier stops working.
It should be noted that, in the actual working process of the power amplifier, the power amplifier may be abnormal or damaged due to no connection of the antenna or lack of load.
According to the calibration method of the power amplifier, the current dynamic current is detected in real time, so that the power amplifier can be automatically turned off under abnormal conditions, safe use of the power amplifier is guaranteed, and the power amplifier can be protected in time.
It should be noted that although the operations of the method of the present invention are depicted in the drawings in a particular order, this does not require or imply that the operations must be performed in that particular order or that all of the illustrated operations be performed in order to achieve desirable results. Rather, the steps depicted in the flowcharts may change the order of execution. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step to perform, and/or one step decomposed into multiple steps to perform.
Fig. 11 is a schematic structural diagram of a calibration device for a power amplifier according to an embodiment of the present invention. As shown in fig. 11, the apparatus may implement the method as shown in fig. 4 to 10, and the apparatus may include:
a shut down module 10 configured to shut down the radio frequency modulated signal of the power amplifier;
a current calibration module 20 configured to calibrate a quiescent current of the power amplifier by adjusting a gate voltage of the power amplifier;
an opening module 30 configured to open the radio frequency modulation signal of the power amplifier;
a power calibration module 40 configured to calibrate the output power of the power amplifier by adjusting the input power of the power amplifier.
Preferably, the current calibration module 20 may be specifically configured to:
circularly executing a first appointed operation until a first static current of the power amplifier is within a first preset range value; wherein, the liquid crystal display device comprises a liquid crystal display device,
the first specifying operation includes:
determining a first quiescent current according to a first current gate voltage of the power amplifier; when the first specified operation is executed for the first time, the first current gate voltage is an initial gate voltage, and when the first specified operation is not executed for the first time, the first current gate voltage is an adjusted first gate voltage obtained when the first specified operation is executed for the previous time;
judging whether the first static current is in a first preset range value or not;
when the first quiescent current is not in the first preset range value, the first current grid voltage is regulated to obtain a regulated first grid voltage, and the next first appointed operation is controlled;
when the first quiescent current is within a first preset range value, control does not enter the next first specified operation.
Preferably, the current calibration module 20 is specifically configured to, when determining the first quiescent current according to the first present gate voltage of the power amplifier:
Obtaining the output voltage of the current detection chip; the output voltage and the first current gate voltage are positively correlated; determining a first quiescent current of the power amplifier according to the formula Ids = Vout/(Gain Rsense); where Ids is the first quiescent current of the power amplifier, vout is the output voltage of the current detection chip, gain is the Gain of the current detection chip, and Rsense is the resistance value of the current sampling detection resistor.
Preferably, the current calibration module 20 adjusts the current gate voltage value when the first quiescent current is not within the first preset range value, and is specifically configured to:
when the first static current is larger than the maximum value of the first preset range value, reducing the first current grid voltage by a first preset step length; and when the first static current is smaller than the minimum value of the first preset range value, increasing the first current grid voltage by the first preset step length.
Optionally, the apparatus may further include:
a current recalibration module 50 for: circularly executing a second designated operation until a second quiescent current of the power amplifier is within a second preset range value; wherein:
The second specifying operation includes:
determining a second quiescent current according to a second current gate voltage of the power amplifier; the second current gate voltage is the adjusted first gate voltage when the second specified operation is performed for the first time, and the second current gate voltage is the adjusted second gate voltage when the second specified operation is not performed for the first time;
judging whether the second static current is in the second preset range value or not; the maximum value in the second preset range value is smaller than the maximum value in the first preset range value; the minimum value in the second preset range value is larger than the minimum value in the first preset range value;
when the second quiescent current is not in the second preset range value, the second current grid voltage is regulated to obtain a regulated second grid voltage, and the next second designated operation is controlled;
when the second quiescent current is within the second preset range value, control does not enter the next second designated operation.
Preferably, the current recalibration module 50 is configured to adjust the second current gate voltage when the second quiescent current is not within the second preset range value, and is specifically configured to:
When the second quiescent current is greater than the maximum value of the second preset range value, reducing the second current gate voltage by the second preset step size; the second preset step length is smaller than the first preset step length; and when the second static current is smaller than the minimum value of the second preset range value, increasing the second current grid voltage by the second preset step length.
Alternatively, the power calibration module 40 may be configured to:
circularly executing a third appointed operation until the dynamic current of the power amplifier is within a third preset range value; wherein, the liquid crystal display device comprises a liquid crystal display device,
the third specifying operation includes:
determining a dynamic current according to the current input power of the power amplifier; when the third specified operation is executed for the first time, the current input power is the initial input power, and when the third operation is not executed for the first time, the current input power is the adjusted input power obtained when the third specified operation is executed for the previous time.
Judging whether the dynamic current is in a third preset range value or not;
when the dynamic current is not in a third preset range value, the input power is regulated to obtain regulated input power, and the next third appointed operation is controlled to be performed;
When the dynamic current is within a third preset threshold range, control does not enter the next third designated operation.
Preferably, the power calibration module 40 is configured to adjust the current input power when the dynamic current is not within the third preset range value, and is specifically configured to:
when the dynamic current is larger than the maximum value of the third preset range value, the current input power is reduced by the third preset step length; and when the dynamic current is smaller than the minimum value of the third preset range value, increasing the current input power by the third preset step length.
Optionally, the apparatus may further include: a monitoring module 60, the monitoring module 60 comprising:
a first determining unit 601, configured to determine the adjusted second gate voltage and the adjusted input power;
a second determining unit 602, configured to determine a present dynamic current of the power amplifier according to the second gate voltage and the adjusted input power;
a judging unit 603, configured to judge whether the current dynamic current is within a fourth preset range value;
and an adjusting unit 604, configured to adjust the second gate voltage to zero and turn off the radio frequency modulation signal when the current dynamic current is not within the fourth preset range.
The calibration device for a power amplifier provided in this embodiment may implement the embodiments of the method described above, and its implementation principle and technical effects are similar, and will not be described herein again.
Fig. 12 is a schematic structural diagram of a computer device according to an embodiment of the present application. As shown in fig. 12, a schematic diagram of a computer system 500 suitable for use in implementing a terminal device or server of an embodiment of the present application is shown.
As shown in fig. 12, the computer system 500 includes a Central Processing Unit (CPU) 501, which can perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 502 or a program loaded from a storage section 508 into a Random Access Memory (RAM) 503. In the RAM503, various programs and data required for the operation of the system 500 are also stored. The CPU501, ROM502, and RAM603 are connected to each other through a bus 504. An input/output (I/O) interface 506 is also connected to bus 504.
The following components are connected to the I/O interface 505: an input section 506 including a keyboard, a mouse, and the like; an output portion 507 including a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker, and the like; a storage portion 508 including a hard disk and the like; and a communication section 509 including a network interface card such as a LAN card, a modem, or the like. The communication section 509 performs communication processing via a network such as the internet. The drive 510 is also connected to the I/O interface 506 as needed. A removable medium 511 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 510 as needed so that a computer program read therefrom is mounted into the storage section 508 as needed.
In particular, the processes described above with reference to fig. 4-10 may be implemented as computer software programs in accordance with embodiments of the present disclosure. For example, embodiments of the present disclosure include a computer program product comprising a computer program tangibly embodied on a machine-readable medium, the computer program comprising program code for performing the methods of fig. 4-10. In such an embodiment, the computer program may be downloaded and installed from a network via the communication portion 509, and/or installed from the removable media 511.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units or modules involved in the embodiments of the present application may be implemented in software or in hardware. The described units or modules may also be provided in a processor, for example, as: a processor includes a shutdown module, a current calibration module, an on module, and a power calibration module. The names of these units or modules do not in any way constitute a limitation of the unit or module itself, for example, a current calibration module may also be described as "for calibrating the quiescent current of the power amplifier by adjusting the gate voltage of the power amplifier".
As another aspect, the present application also provides a computer-readable storage medium, which may be a computer-readable storage medium contained in the foregoing apparatus in the foregoing embodiment; or may be a computer-readable storage medium, alone, that is not assembled into a device. The computer readable storage medium stores one or more programs for use by one or more processors in performing the calibration method of the power amplifier described in the present application.
In summary, the calibration circuit, method, device, apparatus and readable storage medium for a power amplifier according to the embodiments of the present application shut down a radio frequency modulation signal of the power amplifier, calibrate a quiescent current of the power amplifier by adjusting a gate voltage of the power amplifier, and start up the radio frequency modulation signal of the power amplifier, and calibrate an output power of the power amplifier by adjusting an input power of the power amplifier. According to the technical scheme, the influence of other current consumption devices in the calibration circuit on current detection can be eliminated, so that the calibration accuracy of the quiescent current can be improved, and the calibration of the quiescent current and the output power of the power amplifier can be realized at the same time without additional testing equipment, so that the calibration process is simpler and more convenient.
The above description is only illustrative of the preferred embodiments of the present application and of the principles of the technology employed. It will be appreciated by persons skilled in the art that the scope of the application referred to in the present application is not limited to the specific combinations of the technical features described above, but also covers other technical features formed by any combination of the technical features described above or their equivalents without departing from the inventive concept. Such as the above-mentioned features and the technical features disclosed in the present application (but not limited to) having similar functions are replaced with each other.
Claims (12)
1. A calibration circuit for a power amplifier, the calibration circuit comprising: the micro control unit MCU, the power amplifier, the current sampling detection resistor and the current detection chip, wherein,
the drain electrode input end of the power amplifier is connected with one end of the current sampling detection resistor, the gate electrode input end of the power amplifier is connected with the digital-to-analog conversion interface of the MCU, the output end of the current detection chip is connected with the analog-to-digital conversion interface of the MCU, and the input end of the current detection chip is connected with two ends of the current sampling detection resistor;
the MCU is used for: circularly executing a first appointed operation until a first static current of the power amplifier is within a first preset range value;
the first specifying operation includes:
determining a first quiescent current according to a first current gate voltage of the power amplifier; when the first specified operation is executed for the first time, the first current gate voltage is an initial gate voltage, and when the first specified operation is not executed for the first time, the first current gate voltage is an adjusted first gate voltage obtained when the first specified operation is executed for the previous time;
Judging whether the first static current is in a first preset range value or not;
when the first quiescent current is not in the first preset range value, the first current grid voltage is regulated to obtain a regulated first grid voltage, and the next first appointed operation is controlled;
when the first quiescent current is within a first preset range value, control does not enter the next first specified operation.
2. A method of calibrating a power amplifier implemented based on the calibration circuit of claim 1, the method comprising:
turning off the radio frequency modulation signal of the power amplifier;
adjusting the grid voltage of the power amplifier, and calibrating the quiescent current of the power amplifier;
turning on a radio frequency modulation signal of the power amplifier;
adjusting the input power of the power amplifier, and calibrating the output power of the power amplifier;
wherein the adjusting the gate voltage of the power amplifier, calibrating the quiescent current of the power amplifier, comprises:
circularly executing a first appointed operation until a first static current of the power amplifier is within a first preset range value;
The first specifying operation includes:
determining a first quiescent current according to a first current gate voltage of the power amplifier; when the first specified operation is executed for the first time, the first current gate voltage is an initial gate voltage, and when the first specified operation is not executed for the first time, the first current gate voltage is an adjusted first gate voltage obtained when the first specified operation is executed for the previous time;
judging whether the first static current is in a first preset range value or not;
when the first quiescent current is not in the first preset range value, the first current grid voltage is regulated to obtain a regulated first grid voltage, and the next first appointed operation is controlled;
when the first quiescent current is within a first preset range value, control does not enter the next first specified operation.
3. The method of calibrating a power amplifier according to claim 2, determining the first quiescent current from a first present gate voltage of the power amplifier, comprising:
obtaining the output voltage of the current detection chip; the output voltage and the first current gate voltage are positively correlated;
Determining a first quiescent current of the power amplifier according to the formula Ids = Vout/(Gain Rsense); where Ids is the first quiescent current of the power amplifier, vout is the output voltage of the current detection chip, gain is the Gain of the current detection chip, and Rsense is the resistance value of the current sampling detection resistor.
4. The method of calibrating a power amplifier according to claim 2, wherein adjusting the first present gate voltage when the first quiescent current is not within the first preset range of values, comprises:
when the first static current is larger than the maximum value of the first preset range value, reducing the first current grid voltage by a first preset step length;
and when the first static current is smaller than the minimum value of the first preset range value, increasing the first current grid voltage by the first preset step length.
5. The method of calibrating a power amplifier according to claim 4, wherein the cycling is performed a first prescribed operation until after a first quiescent current of the power amplifier is within a first preset range of values, the method further comprising:
Circularly executing a second designated operation until a second quiescent current of the power amplifier is within a second preset range value; wherein, the liquid crystal display device comprises a liquid crystal display device,
the second specifying operation includes:
determining a second quiescent current according to a second current gate voltage of the power amplifier; the second current gate voltage is the adjusted first gate voltage when the second specified operation is performed for the first time, and the second current gate voltage is the adjusted second gate voltage when the second specified operation is not performed for the first time;
judging whether the second static current is in the second preset range value or not; the maximum value in the second preset range value is smaller than the maximum value in the first preset range value; the minimum value in the second preset range value is larger than the minimum value in the first preset range value;
when the second quiescent current is not in the second preset range value, the second current grid voltage is regulated to obtain a regulated second grid voltage, and the next second designated operation is controlled;
when the second quiescent current is within the second preset range value, control does not enter the next second designated operation.
6. The method of calibrating a power amplifier according to claim 5, wherein adjusting the second present gate voltage when the second quiescent current is not within the second preset range of values, comprises:
when the second static current is larger than the maximum value of the second preset range value, reducing the second current grid voltage by a second preset step length; the second preset step length is smaller than the first preset step length;
and when the second static current is smaller than the minimum value of the second preset range value, increasing the second current grid voltage by the second preset step length.
7. The method of calibrating a power amplifier according to claim 2, wherein calibrating the output power of the power amplifier by adjusting the input power of the power amplifier comprises:
circularly executing a third appointed operation until the dynamic current of the power amplifier is within a third preset range value;
the third specifying operation includes:
determining a dynamic current according to the current input power of the power amplifier; when the third specified operation is executed for the first time, the current input power is the initial input power, and when the third specified operation is not executed for the first time, the current input power is the adjusted input power obtained when the third specified operation is executed for the previous time;
Judging whether the dynamic current is in a third preset range value or not;
when the dynamic current is not in a third preset range value, regulating the current input power to obtain regulated input power, and controlling to enter a next third appointed operation;
when the dynamic current is within a third preset threshold range, control does not enter the next third designated operation.
8. The method of calibrating a power amplifier according to claim 7, wherein adjusting the present input power when the dynamic current is not within a third preset range value, comprises:
when the dynamic current is larger than the maximum value of the third preset range value, the current input power is reduced by a third preset step length;
and when the dynamic current is smaller than the minimum value of the third preset range value, increasing the current input power by the third preset step length.
9. The method of calibrating a power amplifier according to claim 4, further comprising:
determining an adjusted second gate voltage and the adjusted input power;
determining a present dynamic current of the power amplifier based on the second gate voltage and the adjusted input power;
Judging whether the current dynamic current is in a fourth preset range value or not;
and when the current dynamic current is not in the fourth preset range, adjusting the second grid voltage to zero, and turning off the radio frequency modulation signal.
10. A calibration apparatus for a power amplifier, the apparatus comprising:
a shutdown module configured to shut down the radio frequency modulated signal of the power amplifier;
a current calibration module configured to calibrate a quiescent current of the power amplifier by adjusting a gate voltage of the power amplifier;
the starting module is configured to start the radio frequency modulation signal of the power amplifier;
a power calibration module configured to calibrate an output power of the power amplifier by adjusting an input power of the power amplifier;
the current calibration module is specifically configured to: circularly executing a first appointed operation until a first static current of the power amplifier is within a first preset range value;
the first specifying operation includes:
determining a first quiescent current according to a first current gate voltage of the power amplifier; when the first specified operation is executed for the first time, the first current gate voltage is an initial gate voltage, and when the first specified operation is not executed for the first time, the first current gate voltage is an adjusted first gate voltage obtained when the first specified operation is executed for the previous time;
Judging whether the first static current is in a first preset range value or not;
when the first quiescent current is not in the first preset range value, the first current grid voltage is regulated to obtain a regulated first grid voltage, and the next first appointed operation is controlled;
when the first quiescent current is within a first preset range value, control does not enter the next first specified operation.
11. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the method of any of claims 2-9 when executing the computer program.
12. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the method of any of claims 2-9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811495608.0A CN109660219B (en) | 2018-12-07 | 2018-12-07 | Calibration circuit, method, device, equipment and storage medium for power amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811495608.0A CN109660219B (en) | 2018-12-07 | 2018-12-07 | Calibration circuit, method, device, equipment and storage medium for power amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109660219A CN109660219A (en) | 2019-04-19 |
| CN109660219B true CN109660219B (en) | 2023-10-03 |
Family
ID=66113039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811495608.0A Active CN109660219B (en) | 2018-12-07 | 2018-12-07 | Calibration circuit, method, device, equipment and storage medium for power amplifier |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109660219B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111867174B (en) * | 2019-04-29 | 2022-12-20 | 青岛海尔智能技术研发有限公司 | Power control method of radio frequency heating module and radio frequency heating device |
| CN110728338B (en) * | 2019-09-26 | 2023-05-02 | 北京智博晟源科技有限公司 | RFID reader-writer system and power calibration method |
| CN111239483A (en) * | 2020-03-17 | 2020-06-05 | 长沙景嘉微电子股份有限公司 | Power calibration system and calibration method of radio frequency power amplifier module |
| CN113517867A (en) * | 2021-04-23 | 2021-10-19 | 广州安波通信科技有限公司 | Microwave amplifier output power detection system, detection chip and detection method |
| CN114094949A (en) * | 2021-11-12 | 2022-02-25 | 中国电子科技集团公司第二十九研究所 | Universal amplifier initialization circuit, device and method |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103744010A (en) * | 2013-12-26 | 2014-04-23 | 中国电子科技集团公司第三十六研究所 | An automatic testing system and an automatic testing method of a continuous wave radio frequency power amplifier |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6891438B2 (en) * | 2002-12-12 | 2005-05-10 | Northrop Grumman Corporation | Adaptive active bias compensation technique for power amplifiers |
| US7433658B1 (en) * | 2003-09-30 | 2008-10-07 | Marvell International Ltd. | System and method for controlling true output power of a transmitter |
| WO2012109227A2 (en) * | 2011-02-07 | 2012-08-16 | Rf Micro Devices, Inc. | Group delay calibration method for power amplifier envelope tracking |
| WO2014110187A1 (en) * | 2013-01-08 | 2014-07-17 | Aviat Networks, Inc. | Systems and methods for biasing amplifiers with adaptive closed loop control |
| US10003309B2 (en) * | 2014-04-23 | 2018-06-19 | Telefonaktiebolaget Lm Ericsson (Publ) | Adaptive self-bias |
| CN106443123A (en) * | 2016-08-29 | 2017-02-22 | 武汉邮电科学研究院 | Power amplifier quiescent operating point measurement method and system for mobile communication |
-
2018
- 2018-12-07 CN CN201811495608.0A patent/CN109660219B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103744010A (en) * | 2013-12-26 | 2014-04-23 | 中国电子科技集团公司第三十六研究所 | An automatic testing system and an automatic testing method of a continuous wave radio frequency power amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109660219A (en) | 2019-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109660219B (en) | Calibration circuit, method, device, equipment and storage medium for power amplifier | |
| US4924191A (en) | Amplifier having digital bias control apparatus | |
| US9641146B2 (en) | Apparatus and method for detecting radio frequency power | |
| CN101621810A (en) | Received signal strength indication detector and method for calibrating received signal strength indication | |
| CN110289821B (en) | Radio frequency signal output power control circuit, method and device adapting to working condition environment | |
| US8912851B2 (en) | Apparatus and method for providing amplifier linearity information | |
| US20110136449A1 (en) | Testing System and Power Calibration Method Thereof | |
| CN107181300B (en) | Charge protector, the method and apparatus for calibrating charging equipment | |
| US20130082687A1 (en) | Transmitter calibration system | |
| US20140055082A1 (en) | Charging current calibration | |
| CN111537861B (en) | Ripple rejection ratio testing device | |
| CN110244812B (en) | Bias control method and device for avalanche photodiode and storage medium | |
| US8897401B2 (en) | AGC maintaining analog peak value based on peak-to-average ratio | |
| CN108184009B (en) | Power calibration method and device and computer readable storage device | |
| CN103746720B (en) | Wireless communication module method of adjustment | |
| CN106972837B (en) | A kind of method and device for realizing gain control | |
| EP1708358A2 (en) | Mobile communications terminal having driving voltage control apparatus and method thereof | |
| WO2001084741A2 (en) | Output power control of a transmitter | |
| US9407227B2 (en) | Regulation of an amplification apparatus | |
| US7859334B2 (en) | Hybrid power control for a power amplifier | |
| CN112994807A (en) | Automatic calibration system and method for signal source | |
| CN109765573B (en) | Detection device and method for antenna feed system of satellite time synchronization equipment | |
| CN111398668A (en) | Measuring circuit and device | |
| JP6481398B2 (en) | Detector and communication device | |
| CN216670608U (en) | Self-adaptive voltage power control circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20210716 Address after: 518063 5th floor, block B, building 1, software industry base, Yuehai street, Nanshan District, Shenzhen City, Guangdong Province Applicant after: Fengyi Technology (Shenzhen) Co.,Ltd. Address before: 518061 Intersection of Xuefu Road (south) and Baishi Road (east) in Nanshan District, Shenzhen City, Guangdong Province, 6-13 floors, Block B, Shenzhen Software Industry Base Applicant before: SF TECHNOLOGY Co.,Ltd. |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |