WO2001065344A3 - Method and apparatus for providing power to a microprocessor with integrated thermal and EMI management - Google Patents

Method and apparatus for providing power to a microprocessor with integrated thermal and EMI management Download PDF

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Publication number
WO2001065344A3
WO2001065344A3 PCT/US2001/005067 US0105067W WO0165344A3 WO 2001065344 A3 WO2001065344 A3 WO 2001065344A3 US 0105067 W US0105067 W US 0105067W WO 0165344 A3 WO0165344 A3 WO 0165344A3
Authority
WO
WIPO (PCT)
Prior art keywords
microprocessor
circuit board
integrated thermal
providing power
component
Prior art date
Application number
PCT/US2001/005067
Other languages
French (fr)
Other versions
WO2001065344A2 (en
WO2001065344B1 (en
Inventor
Joseph Ted Ii Dibene
David Hartke
James Hjerpe Kaskade
Carl E Hoge
Original Assignee
Incep Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Incep Technologies Inc filed Critical Incep Technologies Inc
Priority to JP2001563974A priority Critical patent/JP2003529921A/en
Priority to EP01944108A priority patent/EP1256263A2/en
Priority to MXPA02008042A priority patent/MXPA02008042A/en
Priority to AU2001266551A priority patent/AU2001266551A1/en
Priority to CA002400568A priority patent/CA2400568A1/en
Publication of WO2001065344A2 publication Critical patent/WO2001065344A2/en
Publication of WO2001065344A3 publication Critical patent/WO2001065344A3/en
Publication of WO2001065344B1 publication Critical patent/WO2001065344B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/427—Cooling by change of state, e.g. use of heat pipes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/181—Enclosures
    • G06F1/182—Enclosures with special features, e.g. for use in industrial environments; grounding or shielding against radio frequency interference [RFI] or electromagnetical interference [EMI]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G06F1/189—Power distribution
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/02—Arrangements of circuit components or wiring on supporting structure
    • H05K7/10—Plug-in assemblages of components, e.g. IC sockets
    • H05K7/1092—Plug-in assemblages of components, e.g. IC sockets with built-in components, e.g. intelligent sockets
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/1031—Surface mounted metallic connector elements
    • H05K2201/10318—Surface mounted metallic pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10325—Sockets, i.e. female type connectors comprising metallic connector elements integrated in, or bonded to a common dielectric support
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10598—Means for fastening a component, a casing or a heat sink whereby a pressure is exerted on the component towards the PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10704—Pin grid array [PGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2018—Presence of a frame in a printed circuit or printed circuit assembly
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other

Abstract

A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.
PCT/US2001/005067 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management WO2001065344A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001563974A JP2003529921A (en) 2000-02-18 2001-02-16 Method and apparatus for powering a microprocessor with integrated thermal and EMI management
EP01944108A EP1256263A2 (en) 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management
MXPA02008042A MXPA02008042A (en) 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management.
AU2001266551A AU2001266551A1 (en) 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management
CA002400568A CA2400568A1 (en) 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management

Applications Claiming Priority (12)

Application Number Priority Date Filing Date Title
US18347400P 2000-02-18 2000-02-18
US60/183,474 2000-02-18
US18676900P 2000-03-03 2000-03-03
US60/186,769 2000-03-03
US18777700P 2000-03-08 2000-03-08
US60/187,777 2000-03-08
US19605900P 2000-04-10 2000-04-10
US60/196,059 2000-04-10
US21981300P 2000-07-21 2000-07-21
US60/219,813 2000-07-21
US23297100P 2000-09-14 2000-09-14
US60/232,971 2000-09-14

Publications (3)

Publication Number Publication Date
WO2001065344A2 WO2001065344A2 (en) 2001-09-07
WO2001065344A3 true WO2001065344A3 (en) 2002-04-25
WO2001065344B1 WO2001065344B1 (en) 2002-06-27

Family

ID=27558742

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/005067 WO2001065344A2 (en) 2000-02-18 2001-02-16 Method and apparatus for providing power to a microprocessor with integrated thermal and emi management

Country Status (8)

Country Link
EP (1) EP1256263A2 (en)
JP (1) JP2003529921A (en)
KR (1) KR100699094B1 (en)
CN (1) CN1419803A (en)
AU (1) AU2001266551A1 (en)
CA (1) CA2400568A1 (en)
MX (1) MXPA02008042A (en)
WO (1) WO2001065344A2 (en)

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US20030214800A1 (en) 1999-07-15 2003-11-20 Dibene Joseph Ted System and method for processor power delivery and thermal management
US6801431B2 (en) 1999-07-15 2004-10-05 Incep Technologies, Inc. Integrated power delivery and cooling system for high power microprocessors
DE10107839A1 (en) 2001-02-16 2002-09-05 Philips Corp Intellectual Pty Arrangement with an integrated circuit mounted on a carrier and a power supply assembly
US6888235B2 (en) * 2001-09-26 2005-05-03 Molex Incorporated Power delivery system for integrated circuits utilizing discrete capacitors
WO2003073251A2 (en) * 2002-02-25 2003-09-04 Molex Incorporated Power delivery to base of processor
US6940724B2 (en) * 2003-04-24 2005-09-06 Power-One Limited DC-DC converter implemented in a land grid array package
US6979784B1 (en) 2003-10-17 2005-12-27 Advanced Micro Devices, Inc. Component power interface board
US7091586B2 (en) * 2003-11-04 2006-08-15 Intel Corporation Detachable on package voltage regulation module
US7149086B2 (en) * 2004-12-10 2006-12-12 Intel Corporation Systems to cool multiple electrical components
KR100724916B1 (en) * 2006-01-02 2007-06-04 삼성전자주식회사 Electronic circuit package
SG135074A1 (en) 2006-02-28 2007-09-28 Micron Technology Inc Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
CN102026481A (en) * 2009-09-18 2011-04-20 仁宝电脑工业股份有限公司 Superimposition structure for circuit board
US9128123B2 (en) * 2011-06-03 2015-09-08 Taiwan Semiconductor Manufacturing Company, Ltd. Interposer test structures and methods
CN102569223B (en) * 2012-01-11 2016-09-14 华为技术有限公司 A kind of power device insulated heat radiation structure and circuit board, power-supply device
JP6104602B2 (en) * 2012-12-26 2017-03-29 株式会社東芝 Electronics
US9519319B2 (en) * 2014-03-14 2016-12-13 Sandisk Technologies Llc Self-supporting thermal tube structure for electronic assemblies
FR3036917B1 (en) * 2015-05-28 2018-11-02 IFP Energies Nouvelles ELECTRONIC DEVICE COMPRISING A PRINTED CIRCUIT BOARD WITH IMPROVED COOLING.
CN106332499A (en) * 2015-06-26 2017-01-11 台达电子工业股份有限公司 Assembled structure for chip power supply, and electronic device

Citations (8)

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US4742385A (en) * 1985-08-07 1988-05-03 Nec Corporation Multichip package having outer and inner power supply means
US4982311A (en) * 1987-09-29 1991-01-01 Bull S.A. Package for very large scale integrated circuit
FR2722334A1 (en) * 1994-07-06 1996-01-12 Barbin Jean Philippe Support for integrated circuit e.g. processor incorporating voltage converter
EP0717443A1 (en) * 1994-07-04 1996-06-19 Matsushita Electric Industrial Co., Ltd. Integrated circuit device
US5980267A (en) * 1996-06-28 1999-11-09 Intel Corporation Connector scheme for a power pod power delivery system
US6018465A (en) * 1996-12-31 2000-01-25 Intel Corporation Apparatus for mounting a chip package to a chassis of a computer
WO2001006821A1 (en) * 1999-07-15 2001-01-25 Incep Technologies, Inc. Encapsulated packaging in between 2 pcbs
WO2001033927A1 (en) * 1999-11-02 2001-05-10 Incep Technologies, Inc. Inter-circuit encapsulated packaging for power delivery

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4742385A (en) * 1985-08-07 1988-05-03 Nec Corporation Multichip package having outer and inner power supply means
US4982311A (en) * 1987-09-29 1991-01-01 Bull S.A. Package for very large scale integrated circuit
EP0717443A1 (en) * 1994-07-04 1996-06-19 Matsushita Electric Industrial Co., Ltd. Integrated circuit device
FR2722334A1 (en) * 1994-07-06 1996-01-12 Barbin Jean Philippe Support for integrated circuit e.g. processor incorporating voltage converter
US5980267A (en) * 1996-06-28 1999-11-09 Intel Corporation Connector scheme for a power pod power delivery system
US6018465A (en) * 1996-12-31 2000-01-25 Intel Corporation Apparatus for mounting a chip package to a chassis of a computer
WO2001006821A1 (en) * 1999-07-15 2001-01-25 Incep Technologies, Inc. Encapsulated packaging in between 2 pcbs
WO2001033927A1 (en) * 1999-11-02 2001-05-10 Incep Technologies, Inc. Inter-circuit encapsulated packaging for power delivery

Also Published As

Publication number Publication date
AU2001266551A1 (en) 2001-09-12
EP1256263A2 (en) 2002-11-13
JP2003529921A (en) 2003-10-07
WO2001065344A2 (en) 2001-09-07
KR20020092961A (en) 2002-12-12
KR100699094B1 (en) 2007-03-21
CN1419803A (en) 2003-05-21
WO2001065344B1 (en) 2002-06-27
CA2400568A1 (en) 2001-09-07
MXPA02008042A (en) 2004-09-06

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