KR100699094B1 - Modular circuit board assembly and method of assembling the same - Google Patents

Abstract

A microprocessor packaging architecture is disclosed that uses a modular circuit board assembly that provides integrated thermal and electromagnetic interference (EMI) while simultaneously powering the microprocessor. The modular circuit board assembly includes a substrate on which the component is mounted, a circuit board comprising a circuit for powering the component, and at least one conductive interconnect device configured to couple the circuit to the component and positioned between the substrate and the circuit board.

EMI, Power Supplies, Microprocessors, Modular Circuit Board Assemblies, Packaging

Description

Modular Circuit Board Assembly and How to Assemble it {MODULAR CIRCUIT BOARD ASSEMBLY AND METHOD OF ASSEMBLING THE SAME}

TECHNICAL FIELD The present invention relates to electronic systems, and more particularly to systems for powering components such as processors while providing an integrated approach for controlling thermal dissipation and electromagnetic interference (EMI), Ie a modular circuit board assembly and a method of assembling the same.

Related Applications Cross-Referenced

This application claims the advantages of the following US provisional patent applications, which are incorporated herein by reference:

Application No. 60 / 183,474, "Power / thermal direct attribution with INCEP technology", Joseph T. DiBene II and David H. Hartke, filed February 20, 2000;

Application No. 60 / 186,769, "THERMACEP Spring Beam", Joseph T. DiBene II and David H. Hartke, filed March 31, 2000;

Application No. 60 / 187,777, “Next-Generation Packaging for EMI Suppression, Power Delivery, and Heat Loss Using Inter-Circuit Encapsulated Packaging Technology”, Joseph T. DiBene II and David H. Hartke, filed 2000.3.8;

Application No. 60 / 196,059, "EMI Frame with Thermal Interface Material and Power Feedthrough of Diamond Cohesive Mixture", Joseph T. DiBene II and David H. Hartke, filed April 10, 2000;

Application No. 60 / 219,813, "High Current Microprocessor Power Delivery System", Joseph T. DiBene II, filed 2000.7.21;

Application No. 60 / 232,971, "Integrated Power Distribution and Semiconductor Packaging", Joseph T. DiBene II and James J. Hjerpe, filed September 9, 2000;

In addition, this application is related to concurrently assigned concurrent continuing applications, which are incorporated herein by reference:

Application No. 09 / 353,428, "Inter-Circuit Encapsulated Packaging", Joseph T. DiBene II and David H. Hartke, filed July 7, 1999;

Appl. No. 09 / 432,878, "In-Circuit Encapsulated Packaging for Power Delivery," Joseph T. DiBene II and David H. Hartke, filed Jan. 1, 1999;

Application No. 09 / 727,016, “EMI Suppression Using Inter-Circuit Encapsulated Packaging Technology”, Joseph T. DiBene II and David H. Hartke, filed Nov. 28, 2000;

For high-performance desktops or high-end workstations / servers, high-speed microprocessor packaging must be designed to provide less and less form-factor. The combination of minimum form factor and user performance requirements while increasing reliability and productivity suggests significant challenges in the areas of power distribution, thermal management, and electromagnetic interference (EMI) suppression.

To increase reliability and reduce heat loss requirements, next-generation processors that operate with reduced voltages and higher currents have been designed, but unfortunately created many design problems.

First, the reduced operating voltage of the processor places greater demands on the conduction paths and power regulation circuits that provide power to the processor. In general, the processor requires a supply voltage regulation within 10% of its nominal value. To account for impedance variation in the path from the power supply to the processor itself, greater demands are placed on the power regulation circuit, which typically requires that the supply voltage be adjusted within 5% of the nominal value.

Lower operating voltages also led engineers to move away from centralized power designs, designing distributed power supply schemes, where power moves to where high voltages and low currents are needed, and the processor requires close power regulation circuitry. Is converted to low voltage and high current power.

Although it is possible to place the power regulation circuit in the processor package itself, such a design is due to the physical size of the nonadjustable components (eg capacitors, inductors) within the power regulation circuit, and the addition of components is detrimental to processor reliability. Difficult to perform because it can be effective. Such designs also place additional requirements for testing assemblies and processor packages.

)를 생성할 수 있다.Even more negative is the transient currents resulting from the changing demands of the processor itself. Processor computing requirements vary over time, and power saving techniques such as clock gating and sleeping mode operation, and higher clock speeds create transients in the power supply. Such power fluctuations require changes to hundreds of amplifiers within a few nanoseconds. The resulting surge currents between the processor and the power regulation circuits are unacceptable spikes (e.g.,

) Can be created.

1 compares a typical transient response 102 at an interface between a voltage regulator and a processor and compares the response to a nominal 104 and a minimum 106 supply voltage. It can be seen that the transient interface voltage includes an initial spike and a more sustained voltage drop 110 that should not drop below an acceptable margin 108 above the minimum supply voltage. In order to maintain the supply voltage within acceptable limits 104 and 106 and to reduce the change in power supplied to the processor, the power and ground planes, power bias and ground bias, and capacitor pads are Designed to secure inductance power transfer path

2 is a diagram illustrating an example of a distributed power supply system 200. The power supply system 200 includes a motherboard 202 having a power supply unit 206 such as a DC / DC voltage regulator mounted thereon. Motherboard 202 includes a plurality of signal traces including a first signal trace having a high voltage / low current (HV / LC) power signal 204 (eg, which may be supplied by a wire). It is provided. The power supply unit 206 receives the HV / LC power signal and provides a regulated high current / low voltage (HC / LV) signal 210 provided to the second signal trace of the motherboard 202 via an electrical circuit comprising the component 208. Convert it to

The socket 214 is electrically coupled to the motherboard 202 via a first electrical connection 212, such as a ball grid array (BGA). The socket 214 includes an internal electrical connection electrically coupled between the socket 214 and a power regulating module 218 to feed the HC / LV signal to the pin 216. Similarly, power regulation module 218 is electrically coupled to substrate 222 via a second electrical connection 220, such as a BGA. The processor (eg, die) 226 is electrically coupled to the substrate 222 via a third electrical connection 224. The HC / LV signal is provided to the processor via the circuit path described above. As described above, a distributed power system as shown in FIG. 1 still produces an unacceptable impedance that causes a voltage drop in the power distribution path.

In order to obtain a reasonable margin as shown in FIG. 1, surge current decouples throughout the power distribution subsystem including the power conditioning module 218, the motherboard, the processor die package, and the top of the die itself. It is controlled by placing a decoupling capacitor and other components. This not only increases cost but also consumes critical silicon area, chip package and board area. Moreover, for microprocessors operating above 200 MHz, the only capacitors available are very similar to on-die capacitors or dies. On-die capacitors are common for PC-grade processors.

In addition, the demand for improved performance and increased functional integration on smaller processor dies has led to higher heat-flux concentrations in certain areas of the processor die. In some cases, the resulting surface energy density approaches an uncontrollable level. Processor reliability depends exponentially on the operating temperature of the die junction. A temperature drop of 10-15 degrees Celsius can double the processor life. Thermal control provides some of the biggest obstacles currently seen in further processor miniaturization and processor speed increase.

In addition, thermal control must take into account near-voltage regulator efficiency. The 130W (watt), 85% efficient voltage regulator dissipates more than 20W heat. This makes it more difficult to position the voltage regulator close to the CPU as the thermal control structures for each component collide.

Electromagnetic interference (EMI) is also a problem. In a typical computer system, processor 226 is by far the largest source of electromagnetic energy. Including radiation radiated and conducted radiation in the source (processor package) makes the system design more advantageous to the computer OEM. Due to generations requiring higher levels of harmonization, Federal Communications Commission (FCC) regulations require emission testing above the lower of 5 times the processor clock frequency or 40 GHz.

The main component of EMI is the radiated electromagnetic wave that decreases with increasing frequency. EMI control, typically performed at the chassis level rather than at the component level, is typically accomplished by reducing the openings size of the system, effectively blocking electromagnetic waves. However, the use of smaller apertures poses thermal control issues due to reduced airflow.

Another way to reduce EMI is to ground any heat sink. Noise coupled from the processor package to the heatsink will cause the heatsink to act as an antenna and radiate that noise again. However, it is generally not possible to ground the heatsink through the processor package. In addition, although grounding the heatsink reduces EMI, this technique is generally insufficient to meet EMI requirements and generally requires additional shielding.

What is needed is an integrated processor packaging technology that provides the processor with high current / low voltage without sacrificing external capacitors to account for path inductance, and satisfactorily controls thermal and EMI emissions while providing the required form factor. The present invention satisfies the above needs.

In order to meet the above needs, the present invention proposes a modular circuit board assembly and a method of making the same.                 

The modular circuit board assembly includes a substrate having a component mounted thereon, a circuit board including a circuit for supplying power to the component, and positioned between the substrate and the circuit board to electrically couple the circuit to the component. At least one conductive interconnect device for the device.

According to one embodiment of the invention, which is particularly suitable for use with interposer board construction, the circuit board comprises a Voltage Regulation Module (VRM) and comprises a plurality of non-compressible conduction standoffs. A compressible conductive standoff is used to mount the circuit board on the processor board.

The above embodiment provides a modular package, where mechanical standoffs serve many functions as follows. First, it provides an inductance path directly to the processor instead of the higher inductance path through the substrate, sockets and other elements shown in FIG. Second, it provides a proper z-axis (usually vertical) physical relationship between the board and the circuit board. The modular assembly can be plugged into a socket on the motherboard and all pins of the socket can be used as signal pins instead of power pins. It also allows the processor to be easily detached from the motherboard and, if desired, even during power up.

This embodiment also provides the advantage of allowing a strong, heat-consistent, mechanical interface to heat sinks or other thermal dissipation devices. Compressible or other compliant interfaces can be used to control the physical thermal connection between the processor as well as circuit boards, VRM components, and other components on the circuit board. These interfaces can provide compression thermal coupling for the thermal interface of microprocessors that can be adapted to a wide range of operating requirements.

In a second embodiment, particularly suitable for use in organic land grid array (OLGA) based structures that may or may not use interposer boards, the conductive interconnect device is concentric located around the component. ) Conductive spring device. This embodiment does not require an intervening board, which makes it more compact, easier to manufacture and lower in cost. In addition, the top surface of the VRM circuit board and the processor are substantially coplanar, allowing for a better side for physical thermal mating with the heatsink. The spring action provided by the conductive interconnect device provides low-inductance electrical connection and flexible mechanical spring force, controlling the thermal mechanical interface between the heatsink, processor, and VRM board. Do it. Another advantage of this embodiment is that no screws are needed to make the electromechanical connection between the VRM board and the substrate. Instead, mechanical connections can be made using spring fingers and similar devices. Moreover, the spring finger can be applied at the last stage of assembly.

The present invention differs from the general microprocessor packaging architecture in that it uses a symbiotic relationship between components of the architecture to meet all the critical off-chip requirements that affect the performance and reliability of the microprocessor. It includes other architectures. This architecture uses low-cost coaxial interconnects and is a self-contained, physically detachable power delivery module that can be connected to intervening boards, OLGA, CLGA, or other area array packages. It physically integrates the high current delivery capability of the coaxial connection to a custom designed power regulator to provide a delivery module.

The heat dissipation requirements of the microprocessor and power regulator are both met by using an integrated heatsink that provides a path of thermal power loss for both sources of heat.

According to one embodiment, the integrated architecture is electrically coupled with an electrically conductive frame, associated assembly, and heatsink and incorporates microprocessors, power delivery modules, and other circuitry to minimize EMI in the package rather than the chassis. Include hardware.

Compared to conventional power delivery, thermal power loss and EMI reduction methods, the present invention increases the volume form factor efficiency of the microprocessor. At the same time, signal integrity / performance, productivity, reliability and cost effectiveness are also improved. This architecture includes interleaved boards, OLGA, CLGA, Flip-Chip Pin Grid Array (FC-PGA), and Flip Chip Ball Grid Array (FC-BGA), as well as other electronic circuit boards and bare chips. It is suitable for the generation of three-dimensional solutions for microprocessor and electronics configurations pre-packaged or pre-connected.

This architecture provides a packaging solution that includes custom-designed modules, interconnects, and component hardware that are physically separable but interconnectable and coupled to form accessible modules or packages that can be coupled to microelectronics or other electronic circuits. Allows direct attachment of the substrate with or without a closed lid. The electronic circuit includes but is not limited to a multi-chip module. The architecture is a custom-designed and integrated cavity package format that may be configured to function as a test socket, and is extensible by direct chip attachment of a microprocessor or microcircuit.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the corresponding parts as a whole will be described with reference to the drawings described by like reference numerals.

1 is a diagram illustrating a typical transient response at the interface between a voltage regulator and a processor;

2 is a diagram illustrating an example of a distributed power system;

3 is a diagram illustrating a typical microprocessor or electronic circuit package;

4 is a diagram illustrating a circuit board;

5 is a diagram illustrating the coupling element of FIGS. 3 and 4;

6A is a diagram illustrating one embodiment of a power regulation module in accordance with one embodiment of the present invention;

6B is a diagram illustrating an assembly in which conductive standoffs are connected to a circuit board through plated through holes;

7 is a diagram illustrating a substrate assembly;

8 is a diagram illustrating a modular circuit board assembly;

9 is a diagram illustrating an assembled modular circuit board assembly;

10 is a diagram illustrating an integrated heatsink system;

11A is a diagram illustrating an integrated heatsink system located above a modular circuit board assembly.

11B is a diagram illustrating an integrated heatsink system connected to a modular circuit board assembly.

12 is a diagram illustrating an integrated i-PAK structure with an electrically conductive frame to minimize EMI.

13 is a diagram showing the shape of a second embodiment of a power transfer module;

14 is a diagram illustrating a perspective view of a conductive interconnect device;

15 is a diagram showing the edges of a power regulator and a transfer module to which a conductive interconnect device is attached;

16 is a diagram illustrating a second embodiment of the substrate assembly;

17 is a diagram illustrating a power regulator module positioned and aligned over the substrate assembly;                 

18 is a diagram illustrating a substrate assembly and a power regulator module.

19 is a diagram illustrating one embodiment of an integrated thermal power loss system;

20 is a diagram illustrating one embodiment of the present invention including an integrated thermal power loss system, a power regulator and a substrate assembly.

21A and 21B are diagrams illustrating the assembly of FIG. 20 further modified to minimize EMI.

FIG. 22 is a diagram illustrating an embodiment of a Monolitic Enabling Module (MoEM); FIG.

23A-23D are diagrams illustrating one embodiment of a method for electrically coupling a microprocessor circuit to a substrate;

24 is a diagram illustrating an integrated thermal power loss module;

25 is a diagram illustrating the use of an integrated thermal power loss module with a monolithic enabling module.

FIG. 26 is a diagram illustrating modification of an integrated thermal power loss module and a monolithic enabling module with an EMI reduction frame assembly; FIG.

27 is a diagram illustrating a portion of a conductive interconnect device according to another embodiment;

FIG. 28 is a diagram further illustrating a second portion of a conductive interconnect device with split-wedge washers and screw fasteners; FIG.

29 is a diagram illustrating an assembled conductive interconnect device;

30 is a diagram illustrating a further embodiment of a conductive interconnect device;

FIG. 31 is a diagram showing a cross sectional view showing an implementation of the embodiment of the conductive interconnect device shown in FIG. 30; FIG.

32 is a diagram illustrating steps of an exemplary method used to practice one embodiment of the present invention; And

Figure 33 is a diagram showing the steps of an exemplary method used to practice another embodiment of the present invention.

In the following description, reference is made to the accompanying drawings, which form a part of the specification, in which several embodiments of the invention are shown as a means of explanation. Other embodiments may be used, and structural changes may be made without departing from the scope of the present invention.

i-PAK Architecture

3 is a diagram illustrating a typical microprocessor or electronic circuit package 300. Lead 304, which is usually made of copper or other high thermal conductivity material, is bonded to substrate 302 using an adhesive or metallurgical connection at junction 306. Also bonded to the substrate 302 is a microprocessor or electronic circuit 310. The connection between the substrate and the processor 310 connects solder balls (bumps), also known as C-4 (controlled collapse chip connection) or "flip-chip". Can be made using. The physical gap between the substrate 302 and the processor 310 is filled by a polymer composite called an underfill (or referred to as an "underfill"). The underfill adds mechanical strength to the junction formed between the substrate 302 and the processor 310 and encapsulates the processor 310 in a manner similar to a liquid encapsulant or a mold compound. Function. The space between the back of the processor and the bottom of the lid 304 is filled by a thermal grease known as Thermal Interface Material-1 (TIM-1). TIM-1 provides a thermal power dissipation path from the backside of processor 310 to the inner surface of lid 304. The outer surface of the lid 304 is coated with a thermal grease 312 known as TIM-2. The bottom of the substrate 302 includes an array of metal pads 314 that are electrically connected to the solder balls of the processor 310. Substrate 302 may be an inorganic substrate, also known as a ceramic land grid array (CLGA), an organic land grid array (OLGA), or a built-up multilayer (BUM). Can be. The substrate provides an electrical connection to the microprocessor.

4 is a diagram illustrating a circuit board 402 having an array of metal pins 404 on the bottom. The pin 404 is connected to the upper surface of the circuit board through an internal bias. The surface mount socket 406 makes and receives an electrical connection between the pin 404 and the array of solder balls 408.

5 illustrates the components shown in FIGS. 3 and 4 that are connected and stacked together and placed on the motherboard 502.

As noted above, the microprocessor normally draws power from a power regulation module (eg, a power regulator and / or a DC / DC converter) that is positioned at a distance from the microprocessor via a circuit path on the motherboard 502. . Power transfer from the power regulator through the motherboard 502 to the surface mount socket 406, through the pins 404 to the circuit board 402, through the metal pad 314 and finally to the C-4. The connection proceeds to the electronic circuit 310. This route provides long passages through multiple connections that can compromise signal integrity and cause high electrical impedance. Hundreds of power delivery connections (pins) may also need to provide high current to the microprocessor or electronics 310. This design places constraints on the multilayer substrate 302 because power must pass through many different layers before reaching the processor circuit 310 itself.

6A is a diagram illustrating one embodiment of a power regulation module 600 of the present invention. The power regulation module 600 includes a circuit board 602. Circuit board 602 includes power regulation, regulation, or supply circuitry, which is configured to power a power dissipating element, such as a processor (not shown in FIG. 6). Circuit board 602 may include components such as components 608A and 608B (hereafter collectively referred to as component 608), which may be part of a power regulation circuit or for the purpose of accommodating other functionality. have. Thermal bias 606 is disposed within circuit board 602 to provide an electrical passage from the first or bottom surface 614A of circuit board 602 to the second or top surface 614B of circuit board 602. Thus, thermal bias 606 provides an electrical pathway for components 608 from bottom surface 614A of the circuit board to top surface 614B of the circuit board 602 and from layer to layer within the circuit board 602. Thermal bias 606 also provides a thermal coupling 608 to allow heat to be transferred from the first side 614A of the circuit board to the second side 614B of the circuit board.

In one embodiment, the circuit board 602 also includes an aperture 604 through which the processor is placed on the assembly. In addition, the circuit board 602 includes one or more plating-through holes 610 (eg, copper-plating). In one embodiment, the plated through hole 610 lies symmetrically around the opening 604 near the opening 604. One or more circuit board conducting surfaces 616A and 616B (eg, pads) may be disposed over the surface of the circuit board 602 around the plated through holes 610. In addition, one or more conductive interconnect devices 612A and 612B may be arranged to be in physical contact with conductive pads 616A and 616B, thus providing an electrical pathway away from circuit board 602.

In one embodiment, the circuit board conductive surface 616 includes a circuit board first conductive surface 616A and a circuit board second conductive surface 616B, and the conductive interconnect device 612 is separated by a dielectric portion 612C. First portion 612A and second portion 612B. When conductive interconnect device 612 is coupled to circuit board 602, first portion 612A is electrically coupled to circuit board first conductive surface 616A, and second portion 612B is circuit board second. Is electrically coupled to the conducting surface 616B. In one embodiment, the conductive interconnect device is a conductive standoff or spacer.

Conductive interconnect device 612 has a dual purpose. First, it provides a mechanical coupling between the circuit board 602 and the substrate 302 and provides a sufficient distance between the circuit board 602 and the substrate 302. In addition, the conductive interconnect device 612 is configured to not only separate the circuit board 602 and the substrate 302, but also secure the circuit board 602 and the substrate 302 together with a suitable attachment device. Another function provided by the conductive interconnect device 612 is to provide one or more conductive passages from the circuit board 602 to the substrate 302. Typically, two conducting passages are provided and include a first conducting passage for the power signal and a second conducting passage for ground.

The coaxial arrangement as disclosed in the first portion 612A of the conductive standoff and the second portion 612B of the conductive standoff allows for very low inductance electrical connection between the circuit board 602 and the substrate 302. If desired, a plurality of two piece coaxial conductive connections may be used (eg, at each corner of processor 310). Additional examples of conductive interconnect devices 612 will be described below.

6B is a diagram illustrating an assembly in which conductive standoffs 612 are connected to circuit board 602 through plating-through holes 610.

7 is a diagram illustrating a substrate assembly 700 of the present invention. The substrate assembly 700 is similar to the substrate assembly described with reference to FIGS. 3-5, but with the important differences described herein. This substrate assembly 700 is part of an integrated architecture, hereinafter sometimes referred to as the i-PAK architecture. In this embodiment, the area of the substrate is enlarged relative to the size of the substrate 302 of FIG. 5 to accommodate the array of plated through holes 704 and fins 706.

The first (top) face of the substrate 702 includes a second conductive face 708B and a first conductive face 708A similar to the conductive face 616 overlying the bottom face 614A of the circuit board 602. . Internal power and ground planes in the built up layer of the substrate 702 are connected to pads for solder bump (C-4) connections of the microprocessor 310. Since power is supplied directly to the conducting surface 708A of the substrate 702 and then to other components within the substrate 702, many of the power pin connections required in the configurations shown in FIGS. 3-5 can be eliminated. However, a portion of the substrate 702 region may be lost due to the region assigned to the plated through hole 704.

8 is a diagram illustrating a modular circuit board assembly 800 that includes a power regulation / delivery module 600 and a substrate assembly 700. Fasteners 802 are mechanically and electrically connected to the modular circuit board assembly 800 to the substrate assembly 700.

9 shows an assembled modular circuit board assembly 800.

10 is a diagram illustrating an integrated heatsink system 1000 for an integrated architecture for the i-PAK modular circuit board assembly 800. Heatsink system 1000 includes thermally conductive and compressible interface material 1002, such as TIM-2 heat transfer grease, high thermally conductive spacer plate 1004 that fits precisely into cutout 604, large planar heatsink 1006, and Another thermally conductive and compressible interface material 1008, such as thermal grease. The spacer plate 1004 is connected to the heat sink 1006, and is thermally connected to the heat sink 1006 using the plate 1010.

11A is a diagram illustrating an integrated heatsink system 1000 positioned over the modular circuit board assembly 800.

11B is a diagram illustrating an integrated heatsink system 1000 after connecting the heatsink system 1000 to the modular circuit board assembly 800. This integrated i-PAK architecture connects a thermal power loss path from the top of the microprocessor lead 304, through the TIM-2 1002, through the spacer plate 1004 to the bottom of the heat sink 1006. It is also the face of the power regulation module 600 that is connected to the heat sink 1006 via another suitable interface or heat transfer grease 1008. In this example, the bottom surface of the heat sink 1006 is substantially flat and contacts both the top surface of the circuit board 602 and the spacer plate 1104 (or the top surface of the lid 304 if no spacer plate is required). You should know that

11B also describes how the modular circuit board assembly 800 can be coupled to the integrated heatsink system 1000. The heat sink 1006 or plate 1010 may include an indentation 1106, in which a fixing device 1102 is inserted and fixed. The fixing device 1102 is coupled to the expansion member 1104. The expansion member 1104 is coupled to the second fixing device 1108.

FIG. 12 is a diagram illustrating the coupling of an electrically conductive frame 1202 substantially surrounding the processor 310 and physically connected to the integrated heatsink 1006. The frame 1202 is a three-dimensional enclosure when connected to a heatsink 1006 and substantially connected to a stiffener board 1206 or motherboard and secured together by fastener springs 1204. It captures electromagnetic waves generated by associated circuits, power regulators, and microprocessors at package level instead of chassis level. Frame 1202 is also electrically coupled to integrated heatsink 1000. This combination (e.g., an integrated i-PAK architecture) provides the high current low voltage power, includes EMI at the package level, and includes all of the requirements to increase reliability within the form factor and cost constraints described above. Solve as many problems at the same time. Also illustrated is a socket 1208, which connects the motherboard to pins and then to the processor 310.

Micro i-PAK Architecture

The invention can be practiced in other embodiments that can achieve many of the benefits of the i-PAK architecture, which is implemented in smaller packages.

FIG. 13 is a diagram illustrating a bottom surface 614A of another embodiment of a power transfer module 1300. The power transfer module 1300 includes a power transfer module circuit board 1310. A portion (preferably central) of the power transfer module circuit board 1310 includes an opening 1302 and conducting surfaces 1306 and 1304. In the illustrated example, the conducting surface is a concentric metal ring. The conducting surfaces 1306 and 1304 are connected to ground and power in the transfer module and the regulator. As shown, conducting surfaces 1306 and 1304 provide circuit board first conducting surface 616A and circuit board second conducting surface 616B, respectively, in that they provide a path for providing power and ground to processor 310, respectively. Function very similarly).

Many through holes 1308 may be located near conducting surfaces 1306 and 1304 to couple the power delivery module 1300 to components of the architecture. In another example, such a connection can be made by the use of a clamp, clip, or other device, and no through holes are required.

14 is a diagram illustrating a perspective view of a second embodiment of a conductive interconnect device 1400. This second embodiment of a conductive interconnect device is described by two features. First, unlike the embodiment described above, this embodiment of the conductive interconnect device surrounds the component. Secondly, unlike the embodiment described above, this embodiment of the conductive interconnect device makes use of the compressibility in the z (vertical) axis between the power transfer module 1300 and the associated circuit and substrate to make electrical connections.

In one embodiment, conductive standoff device 1400 includes a first conductive standoff portion 1402 and a second conductive standoff portion 1404. In the illustrated embodiment, the first conductive standoff portion 1402 and the second conductive standoff portion 1404 are arranged concentrically. In the illustrated example, conductive interconnect device 1400 includes a plurality of compressive conductive springs (eg, microsprings). The plurality of compressive conduction springs may include a first (internal) plurality of compressive conduction springs 1402 and a second (outer) plurality of compressive conduction springs 1404.

The first conductive standoff portion 1402 and the second conductive standoff portion 1404 are aligned with the conducting surfaces 1306 and 1304 of the power transfer module circuit board 602, respectively, and are electrically connected. This can be accomplished by many methods, including conventional soldering, reflow soldering, bonding, and friction techniques.

The embodiment shown in FIG. 14 merely illustrates one example of a conductive interconnect device. In addition, examples of other conductive interconnect devices are possible and are within the scope of the present invention, especially those that comprise contact or substantially surround the component through compressibility along the z-axis.

FIG. 15 shows a power regulator and transmission module 602 having a plurality of inner compressible springs 1402 and a plurality of outer compressible springs 1404 attached to the bottom surface of power transfer module 602 at conducting surfaces 1304 and 1306. It is a figure which shows an edge. In addition, two of the through holes 1308 in the power delivery module are shown. This through hole 1308 is used for screw type connections but does not require other connections including clips, clamps or fasteners.

FIG. 16 is a diagram illustrating an example of a substrate assembly 1600 for use with a power regulator and transfer module circuit board 602 having compressible springs 1402 and 1404. Substrate assembly 1600 may be a BUM or CLGA substrate or the like. Unlike the substrate assembly 700 illustrated in FIG. 7, the substrate 1600 illustrated in FIG. 16 does not include package leads 304 or heat grease 312 (TIM-2). Also unlike the substrate assembly 700 illustrated in FIG. 7, the substrate illustrated in FIG. 16 includes two exactly sized substantially nonconductive standoffs 1604A and 1604B.

In one embodiment, non-conductive standoff 1604 includes a first portion 1604A coupled to substrate 1602 near processor 1606 and a second portion 1604B extending from substrate 1602. Include. The processor 1606 is electrically coupled to the substrate 1602. This is done by C-4 connections 1608 to an array of metal pads (not shown) on the top surface of the substrate 1602. Underfill 1610 encapsulates processor 1606. The conductive pin 1612 is electrically connected to the substrate 1602 and to the metal pad, the C-4 connection, and the processor 1606 through a circuit passage within the substrate 1602.

Two (or more) conducting surfaces 1616 and 1614 are positioned on the top surface 1620 of the substrate 1602. Conductive surfaces 1616 and 1614 are provided for electrical contact between conductive standoff member 1400 (and thus circuit board 602) and substrate 1602. In one example, conductive surfaces 1616 and 1614 are concentric metal window frame regions and are well-fitted in position, size and shape relative to conductive surfaces 1306 and 1304. The inner frame region or ring 1614 is configured to receive the inner compressive spring 1402 and the outer frame region or ring 1616 is the outer compressive spring when the circuit board 1310 is aligned and paired with the substrate assembly 1600. Electrical contact with 1404.

16 also illustrates a through hole 1618 passed through in alignment with a hole 1302 on the circuit board 1310. These holes are used to connect the circuit board 1310 and the substrate assembly 1600, but are not necessary for other connection techniques, including techniques using clips, clamps or fasteners, etc., but are not limited to such other connection techniques. .

FIG. 17 is a diagram illustrating power regulator module 1300 (shown in FIG. 15) positioned and aligned over substrate assembly 1600. Cutout 1302 edges in circuit board 1310 are aligned with standoff 1604. The standoff 1604 includes a first portion 1604A or a shoulder, which may allow the inner compression spring 1402 and the outer compression spring 1404 to contact the floor (and thus potentially the power regulator module 1300). And to prevent unwanted contact between the bottom surface and the top surface of the substrate assembly 1600, the circuit board 1602, or components thereon. The standoff 1604 also includes a second portion that is heightened such that when the power regulator module 1300 is mounted on the substrate assembly, the top surface is positioned substantially coplanar with the top surface of the power regulator module 1300. 1604B), providing a substantially flat surface that includes a heat sink such as a heat sink if necessary.

FIG. 18 is a diagram illustrating that a power regulation and transfer module 1300 is installed on the substrate assembly 1600 following FIG. 17. Conductive surfaces 1614 and 1616 on substrate 1602 are aligned and in physical contact with each of inner compression spring 1402 and outer compression spring 1404. Fasteners, including clips, pins, clamps or other mechanical bonds, are used to connect the power transfer module 1300 to the substrate assembly 1600. 18 illustrates an embodiment in which openings 1308 and 1618 are aligned together to form a space into which fasteners are inserted to secure circuit board 1310 and substrate 1602 together. FIG. 18 also shows an embodiment where the circuit board 1310 includes an opening 1802 for receiving a circuit board fastener 1804. The adaptation member 1806 is coupled to the circuit board 1310 through fasteners 1804.

In one embodiment, the top surface of the standoff 1604 protrudes slightly above the top surface of the power transfer module 1300. Stentoff 1604 is a shoulder portion for other connections, such as solder balls, extruded metal pads, short metal posts, etc., if necessary, where the microspring can support the weight of the power regulation module so that the spring does not touch the floor. It may be formed without 1604A.

19 is a diagram illustrating an embodiment of an integrated thermal power loss system 1900 for use with a micro i-PAK architecture. Integrated heatsink 1902 is thermally coupled to high thermally conductive spacer plate 1904 to form a monolithic unit. In some cases where the thickness of the microprocessor silicon 1606 is close to the thickness of the power transfer module circuit board 1310, the spacer plate 1904 is not needed. Thermal grease 1906 (ie, TIM-1) is in physical contact with the bottom of the spacer plate or with the bottom of the heat sink 1092 when the spacer plate 1904 is not used. The second heat transfer grease 1908 contacts the bottom surface of the heatsink 1902 away from the spacer plate 1904 or the TIM-1 1906 when the spacer plate 1904 is not used. In the illustrated embodiment, the alignment fastener 1910 is secured in the groove 1912. Although not required in practicing the invention, the grooves 1912 provide a gap in the integrated heatsink 1902. Other embodiments are also possible in which fasteners are used that are coplanar with the bottom surface of integrated heat sink 1902 or have head portions designed to fit into specially designed grooves 1912. Fasteners 1910 are installed through openings or holes 1618 and 1308 as described below.

20 is a diagram illustrating the following micro i-PAK architecture shape after attaching an integrated thermal power loss system to the substrate 1602 and the power conditioning and delivery module 1300. The top surface of the microprocessor 1606 is in physical contact with the heat transfer grease 1906 abutting the spacer plate 1904 (if necessary). The base of the integrated heat sink 1902 is in contact with the top surface 1912 of the non-conductor standoff 1604. Insulator standoff 1604 absorbs the weight of heatsink 1902 and spacer plate 1904, or is otherwise mechanically formed on C-4 connections 1608 by integrated thermal power loss system 1900. It is intended to remove stress. The thermal grease 1908 is adapted to fill the gap between the circuit board 1310 and the heat sink 1902 to provide a thermal power loss path from the power conditioning and delivery module to the integrated heat sink 1902. The fastener 1910 may protrude into the groove 1912 located in the heat sink 1902. The nut or similar device 2002 is secured to the fixing device 1910 to bind the substrate 1602 and the circuit board 1310 into one and to align the heat sink, circuit board 1310, and the substrate 1602. Heatsink 1902 includes a groove 2004, which receives a fastener 1804 and attaches the heatsink to circuit board 1310 by circuit board 1310 (thus an alignment fastener and nut 2002). To be fixed).

FIG. 21A shows an extension of the integrated architecture used in the micro i-PAK architecture for incorporating a frame assembly resulting in a reduction in EMI 2102. FIG. EMI frame 2102 is mechanically connected to integral heatsink 1902 through fasteners 1804, including enclosures having the shape of accompanying hardware, microprocessors or electronic circuits, power conditioning and delivery modules, and coupling components. It is intended to form an electrically conductive stiffener board or motherboard that forms a three-dimensional envelope for use in the process. Clip 2104 may be used to mechanically couple heatsink 1902 to the rest of the assembly. This shape allows for EMI suppression at the package level rather than at the chassis level, especially in the micro eyepack.

21B illustrates a modified embodiment of an integrated architecture in which the integrated heatsink 1902 is coupled to the rest of the assembly through the clip 2104 alone. Different combinations of screws, dowels, clips, etc. can be used to align and secure the elements of the integrated assembly.

Regardless of the method used, when the fastener is properly tightened or positioned, the bottom surface of the circuit board 1310 is placed on the shoulder 1604A of the standoff 1604 so that the second conductive standoff portion 1404 and the first conductive stand are Each of the off portions 1402 allows for a precise electrical connection between the conducting surfaces 1304 and 1306 and the conducting surfaces 1616 and 1614.

The electrical connection between the power transfer module 1300 shown in FIG. 18 and the substrate 1602 having a microprocessor or electronic circuit can take various forms and need not be limited to spring connections such as fasteners. Such connections include, but are not limited to, solder joints, mechanical joints or diffusion joints. For example, a dielectric adhesive layer may be applied to either lead fabric circuit board 1310 or substrate 1602 to machine between the two sides in a manner similar to that used for underfill in solder bump (C-4) protection. It is supposed to give strength.

A third embodiment of the integrated architecture is described by the Monolithic Enabling Module (MoEM). MoEM is an extension of the micro i-PAK architecture. MoEM provides a monolithic package that employs in-package voltage regulation (IPVR) directly on the substrate, allowing for shape line inspection prior to the attachment of a microprocessor or electronic circuit.

22 is a diagram illustrating an embodiment of a MoEM 2200. The MoEM includes a substrate 2202 and an IPVR module 2204, both of which have a permanent shape that is electrically and mechanically connected to each other. An array, typically but not limited to, that is shaped like a metal pin 2206, is located at the bottom of the substrate 2202, and is located at the center of the top surface of the substrate 2202 through the substrate 2204. It is intended to form an electrical path up to, but not limited to, an array of pads 2208. The metal pad 2208 portion is a power and ground connection electrically connected to the IVPR module 2204 through the metal surface of the substrate 2202. Standoff 2214 is positioned on the top surface of substrate 2202 so as to protrude slightly over the surface of IVPR module 2204.

The array of metal pads 2208 is permanently coupled to the microprocessor 2210 and the input / output of the microprocessor or electronic circuit 2210 taking the form of an array of solder bumps 2212 that form an input / output connection for the electronic circuit. It is intended to correspond with the output footprint. Each solder bump of the array of solder bumps 2212 is arranged in electrical contact with each metal pad 2208.

In another embodiment of the present invention with respect to the MoEM 2200, the array of metal pads 2208 may be shaped like a micro socket pin that engages a solder bump 2212 array of microprocessors or electronic circuits 2210. . The MoEM 2200 may thus function as a test socket for the microprocessor 2210 or as a package that the microprocessor may not be permanently attached to the MoEM 2200 so that it can be mechanically removed.

23A-23D are diagrams illustrating one embodiment of a method of attaching a microprocessor or electronic circuit 2210 into a substrate 2202 when not in the shape of an inspection socket.

In FIG. 23A, microprocessor 2210 is positioned over a cavity formed by substrate 2202 and standoff 2214.

In FIG. 23B, the microprocessor 2210 is positioned on the array of metal pads 2208 such that the solder bumps 2212 are in physical contact with the metal pads 2208. After installation, solder bumps 2212 and pads 2208 make metallurgical connections using C-4, a reflow soldering method.

After the solder reflow step, FIG. 23C illustrates the state of the underfill portion where the dielectric filler is filled with a thermoset or thermoplastic resin filled.

FIG. 23D is a diagram showing the completed connection after the underfill portion is cured, such as 2304.

24 is a diagram illustrating an integrated thermal power loss module 2400. Module 2400 includes an integrated heat sink 2402, a thermal grease such as TIM-1 2404 and a second thermal grease 2406. Alignment pins or screws 2408 are attached to integrated heatsink 2402 in a gluing, brazing, or other manner.

25 is a diagram illustrating attaching an integrated heatsink 2402 with heat grease 2404 and 2406 to the MoEM 2200. The base of the integrated heatsink 2402 is positioned vertically by the standoff 2214. The thermal grease, TMI-1 2404, is in direct contact with the back of the microprocessor or electronic circuit 2210 to form a direct thermal power loss path to the integrated heat sink 2402. The top surface of the IVPR module 2204 is adapted to directly contact the heat transfer grease 2406 to form a thermal power loss path from the top surface to the integrated heat sink. Because the vertical standoff 2214 supports the integrated heatsink 2402, the minimum compressive force acts on the solder bump connections 2212 by the weight of the heatsink 2402. If the substrate 2204 is significantly thicker than a microprocessor or electronic circuit, a high thermal conductivity spacer plate (not shown) is physically and mechanically attached to the integrated heat sink 2402 to the thermal grease (TIM-1) 2404. It may take a shape to contact.

FIG. 26 is a diagram illustrating an extension of an integrated architecture for MoEM incorporating an EMI reduction frame assembly 2602. EMI frame 2602 is electrically and mechanically connected to integrated heatsink 2402, which can be configured as hardware used together, and a three-dimensional envelope used in coupling components of a microprocessor or electronic circuit. And to form an electrically conductive stiffener board.

Embodiments of Other Conductive Standoffs

FIG. 27 is a diagram illustrating another embodiment of a conductive interconnect device 2700 similar to that disclosed in FIG. 6 with element 612. In this embodiment, the power supply pins 2702 are connected to the substrate 2704 via connection elements such as solder or press pins 2706 that are electrically connected to the inter-plane 2708 of the substrate 2704. Is mounted. Solder or press pins 2706 are electrically and mechanically connected to the plated through holes 2710. Dielectric insulator 2712 isolates power supply pin 2702 from ground portion 2718. The hollow central portion 2716 of the power supply pin 2702 is spirally wound so that the screw is engaged. Moreover, tapered upper portion 2714 is configured to enable electrical bond attachment.

FIG. 28 is a diagram illustrating a split wedge washer and screw fastener structure for use with the structural standoff device illustrated in FIG. 27. Split wedge washer 2802 includes a lip portion 2804 in which a circuit board is contacted toward a substrate 2704. The wedge portion 2806 includes a taper portion 2806 that is substantially fit with the data portion 2714 of the power supply pin 2702. The divider 2808 is adapted to expand and compress the washer 2802 along the peripheral axis so that the mating tapered portions are pressed together as the screw 2810 is inserted into the central portion 2716.

FIG. 29 is a diagram showing that the device of FIG. 28 is attached to the structure shown in FIG. 29 and is integrated with a circuit board 2902, for example, having a power regulation circuit. The split wedge washer 2802 is electrically connected to the plated through hole 2906 side of the circuit board 2902 by spreading the tapered portion 2806 of the washer 2802 outward so as to be pressed against the inner surface of the plated through hole 2906. Mechanically engaged.

At the same time, screw fastener 2810 pulls washer 2802 against circuit board 2902 and pulls ground portion 2718 against circuit board to press circuit board 2902 toward substrate 2704. An inter-power plane 2904 is electrically attached to the plated through holes 2906 that are connected for powering out on the circuit board. Furthermore, ground pad 2908 is electrically attached to bottom pad 2910 of circuit board 2902 to complete the electrical circuit through a bias that is electrically coupled to a ground plane on circuit board 2902.

30 illustrates a low inductance conductive 'frame' standoff sub-assembly 3000. The sheet metal frame is bent and joined at one corner to form the outer ground frame 3002 with the solder tab 3010 permanently mounted on the circuit board (either the INCC board or the main board). Dielectric material, such as dielectric tape 3006, is attached to this structure as an insulator. Inner frame 3004 is fabricated in a similar manner to outer frame 3002 but allows current to flow (eg, from the positive terminal of the power supply) to power components. A mounting hole 3008 is provided to be mounted on one side of the assembly to allow mechanical and electrical connections. The structure's size and current paths for electrical interconnection result in very low inductance resulting in a low voltage drop between the power supply and the load placed on the low frequency switching application.

31 is a diagram illustrating a cross-sectional view illustrating one embodiment of a low inductance frame standoff sub-assembly 3000. In this embodiment, the processor 3110 is electrically coupled to the substrate 3112, which is electrically coupled to the interface board 3102, and the interface board is coupled to the main board 3104. The connection of power and ground is from the circuit board 3108 to the interface board 3102 by the inner 3004 and outer 3002 frame members, and through the board 3112 to the processor. The interface board 3102 eliminates the need to install power directly to the motherboard, which leads to an improvement in the route performance and price competitiveness of the motherboard.

32 is a diagram illustrating the steps of an exemplary method used to practice one embodiment of the present invention. At least one conductive interconnect device is mounted 3202 between a substrate having components mounted thereon and a circuit board having a power supply circuit. The electrically conductive surface on the substrate is electrically coupled with the electrically conductive surface on the circuit board through the conductive interconnect device as shown in block 3204.

33 is a diagram showing the steps of an exemplary method used to practice another embodiment of the present invention. The first power supply circuit signal is received 3302 in a power supply circuit installed on the circuit board. The second power signal is generated 3304 from the first power signal. In one embodiment, the first power signal is a high voltage / low current signal and the second power signal is a low voltage / high current signal. In yet another embodiment, the second power signal is an adjusted or adjusted correction signal of the first power signal. The second power signal is supplied 3306 from the power supply circuit to a component on the substrate via at least one conductive interconnect device that mechanically couples the circuit board to the substrate.

The following is the conclusion of the description of the preferred embodiment of the present invention. The present invention discloses a three-dimensional interconnect architecture for use in electronic circuits such as microprocessors, which provides power delivery, thermal power loss, electromagnetic interference (EMI) reduction, signal integrity / performance, productivity, reliability, economics, and It covers form factor optimization.

The above description of the preferred embodiment of the present invention is for the purpose of illustration and description only. It is also not intended to be exhaustive or to limit the precisely disclosed form. Many modifications and variations are possible in light of the above teaching. The scope of the invention is not limited by the detailed description of the invention, but rather by the appended claims. The above specification, examples and materials provide a complete description of the production and use of the invention according to its configuration. Various embodiments of the invention can be made without departing from the spirit and scope of the invention, which is in the scope of the following claims.

Claims (110)

A substrate having a component mounted thereon; A circuit board comprising a power supply circuit for supplying a power signal to the component; At least one conductive interconnect device, positioned between the substrate and the circuit board, for electrically coupling the circuit to the component; The circuit board comprises a circuit board first conducting surface and a circuit board second conducting surface; The substrate comprises a substrate first conductive surface and a substrate second conductive surface; The at least one conductive interconnect device includes a first portion located between the circuit board first conductive surface and the substrate first conductive surface, and a second portion located between the circuit board second conductive surface and the substrate second conductive surface. A modular circuit board assembly comprising a portion. A substrate having a component mounted thereon; A circuit board including a power supply circuit for supplying power to the component; At least one conductive interconnect device, positioned between the substrate and the circuit board, for physically detachable and electrically coupling the circuit board to the substrate; The substrate is communicatively coupled to a plurality of signal conductors located on the side of the substrate opposite the circuit board; Substantially all of the power supplied to the substrate is provided by the at least one conductive interconnect device. The method of claim 2, And the component is located between the circuit board and the substrate. The method according to claim 1 or 3, Wherein said component is a power dissipating element and said circuit is a power conditioning circuit. The method of claim 4, wherein And the power loss device is a processor. The method according to claim 1 or 3, The circuit board comprises a circuit board first conductive surface and the substrate comprises a substrate first conductive surface; The at least one conductive interconnect device is positioned between the circuit board first conductive surface and the substrate first conductive surface and is in electrical contact with the circuit board first conductive surface and the substrate first conductive surface. . The method of claim 3, wherein The circuit board includes a circuit board first conductive surface and a circuit board second conductive surface; The substrate comprises a substrate first conductive surface and a substrate second conductive surface; The at least one conductive interconnect device includes a first portion located between the circuit board first conductive surface and the substrate first conductive surface, and a second portion located between the circuit board second conductive surface and the substrate second conductive surface. A modular circuit board assembly comprising a portion. The method according to claim 1 or 7, And the first portion of the conductive interconnect device is located inside the second portion of the conductive interconnect device. The method of claim 8, And the first portion of the conductive interconnect device is substantially coaxial with the second portion of the conductive interconnect device. The method according to claim 1 or 3, And the conductive interconnect device comprises a first portion and a second portion. The method of claim 10, And the first portion of the conductive interconnect device is located inside the second portion of the conductive interconnect device. The method of claim 11, And the first portion of the conductive interconnect device is disposed substantially coaxially with the second portion of the conductive interconnect device. The method of claim 12, And a dielectric region between the first portion of the conductive interconnect device and the second portion of the conductive interconnect device. The method of claim 13, And the first portion of the conductive interconnect device and the second portion of the conductive interconnect device are substantially cylindrical. The method of claim 14, And the first portion of the conductive interconnect device comprises a press pin. The method of claim 15, And the first portion of the conductive interconnect device comprises a hollow portion for receiving a holding device. The method of claim 15, And a first portion of the conductive interconnect device comprises a tapered top portion. The method of claim 17, And a washer positioned between the securing device and the tapered top portion, wherein the washer substantially defines a first tapered surface mating to the tapered top portion of the first portion of the conductive interconnect device. A modular circuit board assembly comprising: The method of claim 18, The washer further comprises a split section. The method of claim 10, And wherein the first portion supplies power from the circuit to the component, and the second portion grounds at least a portion of the circuit board to at least a portion of the substrate. The method according to claim 1 or 3, And the circuit board first conducting surface comprises a plated through hole. The method of claim 10, And the circuit board second conducting surface comprises a trace. The method according to claim 1 or 3, And a plurality of conductive interconnect devices, wherein the plurality of conductive interconnect devices are located close to the periphery of the power dissipation element and simultaneously located between the circuit board and the substrate. The method of claim 5, wherein The substrate is communicatively coupled to a plurality of pins, the pins are communicatively coupled to a computer motherboard, and the plurality of pins do not include pins that provide power to the component. Modular circuit board assembly. The method of claim 5, Wherein all power supplied to the processor is provided through at least one conductive interconnect device. The method according to claim 1 or 3, The component comprises a top surface in a first plane; And wherein said circuit board comprises a top surface in a second plane substantially coplanar with said first plane. The method of claim 26, And further comprising a heat dissipating device having a substantially flat surface thermally coupled to the component and the circuit board, wherein the flat surface of the heat dissipating device is substantially coplanar with the first and second planes. And a modular circuit board assembly. The method according to claim 1 or 3, And a heat dissipating device having a substantially flat surface thermally coupled to the component and the circuit board. The method of claim 28, And the circuit board is located between the heat dissipation device and the substrate. The method of claim 28, And the circuit board includes a heat transfer portion for transferring heat from the component to the heat dissipation device. The method of claim 27, And wherein the circuit board comprises an aperture formed therein to receive the component, thereby providing an outer surface of the component that is substantially coplanar with the surface of the circuit board. The method of claim 26, And a conductive frame substantially surrounding the component, wherein the conductive frame is electrically coupled to a conductive plane located on a side of the substrate opposite the heat dissipation device and the heat dissipation device. Modular circuit board assembly. The method according to claim 1 or 3, Wherein said circuit comprises a power delivery module for converting a low current high voltage signal into a low voltage high current signal. The method of claim 33, wherein And the low current high voltage signal is supplied to the power transfer module via a power source. The method according to claim 1 or 3, And the conductive interconnect device substantially surrounds the component. The method according to claim 1 or 3, And the conductive interconnect device comprises at least one compressive conductive spring that electrically couples the circuit to the component. The method of claim 36, The circuit board comprises a circuit board first conductive surface and the substrate comprises a substrate first conductive surface; And the conductive interconnect device is positioned between the circuit board first conductive surface and the substrate first conductive surface and in electrical contact with the circuit board first conductive surface and the substrate first conductive surface. The method of claim 36, The circuit board comprises a circuit board first conducting surface and a circuit board second conducting surface; The substrate comprises a substrate first conductive surface and a substrate second conductive surface; Wherein the conductive interconnect device comprises a first portion located between the circuit board first conductive surface and the substrate first conductive surface, and a second portion located between the circuit board second conductive surface and the substrate second conductive surface. Modular circuit board assembly. The method of claim 38, The first portion includes a first plurality of compressive conduction springs electrically coupling the circuit to the component, and the second portion is a second plurality of compressive conduction electrically coupling the component to ground. A modular circuit board assembly comprising a spring. The method of claim 38, And the first portion is concentric with the second portion. The method of claim 38, And the first portion is close to the outer periphery of the component. The method of claim 38, Wherein the first portion provides power from the circuit to the component and the second portion grounds at least a portion of the circuit board to at least a portion of the substrate. The method of claim 38, And wherein said circuit board first conducting surface and said circuit board second conducting surface are concentric traces. The method of claim 38, And the substrate first conductive surface and the substrate second conductive surface are concentric rings. The method of claim 38, The circuit board further comprising an aperture, the modular circuit board assembly receiving the component through the opening. The method of claim 45, And at least one or more substantially non-conductive standoffs positioned between the component and the circuit board. The method of claim 46, And wherein said substantially non-conductive standoff is further disposed adjacent said component and adjacent said circuit board opening. The method of claim 47, The first portion includes a first plurality of compressive conduction springs electrically coupling the circuit to the component, and the second portion is a second plurality of compressive conduction electrically coupling the component to ground. A spring; And the substantially non-conductive standoff includes a shoulder portion near the substrate, the shoulder portion being formed to separate the circuit board from the substrate. 49. The method of claim 48 wherein And a heat dissipating device having a substantially flat surface thermally coupled to the component and the circuit board. The method of claim 49, The component comprises a top surface in a first plane; The circuit board comprises a top surface in a second plane that is substantially coplanar with the first plane; And the planar face of the heat dissipation device is substantially coplanar with the first and second planes. The method according to claim 1 or 3, And wherein at least one conductive interconnect device is a standoff. The method according to claim 1 or 3, And wherein the at least one conductive interconnect device is a spacer. The method according to claim 1 or 3, And the conductive interconnect device is compressible. Positioning a processor having a plurality of first contacts in a cavity formed by a substrate having a substantially non-conductive standoff and a plurality of second contacts, such that at least a portion of the first contacts is located in the second contact. Adjoining at least a portion of the; Forming a metallurgical connection between the portion of the first contact and the portion of the second contact; Applying an underfill to the cavity; And Curing the underfill portion Assembly method of a modular circuit board assembly comprising a. The method of claim 54, wherein Forming the metallurgical connection comprises reflow soldering the first contact portion to the second contact portion. The method of claim 54, wherein And wherein the underfill portion is a thermoplastic resin. A method of providing a power signal to a component, the method comprising: Receiving a first power signal into a power circuit on a circuit board; Generating a second power signal from the first power signal in the power circuit; Supplying the second power signal from the power supply circuit to the component on the substrate through at least one conductive interconnect device that mechanically couples the circuit board and the substrate. A method for providing a power signal to a component comprising a. The method of claim 57, Supplying a ground to the component from the power circuit through a second connection device. The method of claim 57, The conductive interconnect device comprises a first portion of the conductive interface device and a second portion of the conductive interface device; Supplying a power signal from the power supply circuit to the component via the conductive interface device comprises supplying a power signal from the power supply circuit to the component through the first portion of the conductive interface device. Way. The method of claim 59, Supplying ground from the power supply circuit to the component through a second portion of the conductive interface device. Mounting at least one conductive interconnect device between a substrate on which the component is mounted and a circuit board having a power circuit; And In electrically coupling the conductive surface on the substrate to the conductive surface on the circuit board through the conductive interconnect device, the conductive surface on the substrate is electrically coupled to the component and the conductive surface on the circuit board is Electrically coupled to the circuit Assembly method of a modular circuit board assembly comprising a. delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete

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