WO2001052424A1 - Procede de protection d'erreurs lors de la transmission d'un flux de bits d'information - Google Patents

Procede de protection d'erreurs lors de la transmission d'un flux de bits d'information Download PDF

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Publication number
WO2001052424A1
WO2001052424A1 PCT/DE2001/000022 DE0100022W WO0152424A1 WO 2001052424 A1 WO2001052424 A1 WO 2001052424A1 DE 0100022 W DE0100022 W DE 0100022W WO 0152424 A1 WO0152424 A1 WO 0152424A1
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WIPO (PCT)
Prior art keywords
code
bits
bit stream
data bit
data
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PCT/DE2001/000022
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German (de)
English (en)
Inventor
Wen Xu
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Siemens Aktiengesellschaft
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Publication of WO2001052424A1 publication Critical patent/WO2001052424A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/353—Adaptation to the channel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • H03M13/235—Encoding of convolutional codes, e.g. methods or arrangements for parallel or block-wise encoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3994—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using state pinning or decision forcing, i.e. the decoded sequence is forced through a particular trellis state or a particular set of trellis states or a particular decoded symbol
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4123—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing the return to a predetermined state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0066—Parallel concatenated codes

Definitions

  • the invention relates to a method for error protection in the transmission of a data bit stream in a digital message transmission system, in which : in the case of channel coding, the data bit stream is coded in blocks using a recursive convolutional code. It also relates to a device for performing the method and a device for decoding a data bit stream transmitted using the method.
  • Such methods and devices are used, among other things, for the transmission of signals, such as data, voice, audio or video signals.
  • signals such as data, voice, audio or video signals.
  • An example of an area of application is in particular voice transmission in mobile radio networks.
  • a source encoder in this case a language encoder, broken down into various parameters by which temporal language sections can be described. These real-valued speech parameters are then quantized and thus represented by a certain bit combination. The speech parameter coded digitally in this way is then forwarded.
  • source-coded parameters or also source-coded coefficients, which are then passed on.
  • Other data signals to be transmitted e.g. SMS signals in the GSM standard are usually already available in digital form.
  • Convolutional codes are often used in the transmission systems to generate the redundant information during channel coding.
  • code bits are generated from the information bits in such a way that, according to certain rules specified by so-called generator or code polynomials, each information bit is linked to certain other information-carrying bits arranged within the data bit stream.
  • generator or code polynomials In terms of circuitry, these rules specified by the code polynomials are usually implemented by means of a shift register with several delays connected in series and a binary addition of the bits located at the inputs or outputs of the delays at a particular point in time. The number of delays in the shift register is referred to as the so-called “memory” m of the code.
  • Various links can be used to generate several different code bit streams from one primary information bit stream.
  • Code bit streams is the so-called "rate" of the code.
  • a code with rate 1/2 accordingly generates two code bit streams v 1 (1) v 2 ⁇ 1) v 3 (1) from an information bit stream u ⁇ u 2 u 3 ... . and V ⁇ ⁇ 2) v 2 (2) v 3 (2) ...
  • These code bit streams become a common bit stream in the form V ⁇ 1) v ⁇ (2> v 2 (1) v 2 (2) . .. which is then transmitted over the channel, two code bits are output in the transmitted bit stream for each information bit of the incoming bit stream.
  • the code is terminated.
  • the aim of the termination is that the shift register of the encoder is in a known state after the transmission of a block, for example is reset to "0".
  • a trellis diagram of a convolutional code consists of branches (state transitions) and nodes, with several branches at each node
  • a node represents a state of the memory of the convolutional code, and the termination of the code at the end of a data block has the advantage that the path in the corresponding trellis diagram ends in a previously known state.
  • Encoders themselves are generated in order to terminate the shift register or the code to “0”.
  • the tail bits generated in this way are therefore not only dependent on the final state of the shift register but also on the code itself and are therefore not known before the encoding of the entire information bits.
  • FIG. 1 A schematic block diagram of an encoder working with a recursive convolutional code, which is terminated at the end of each data block, is shown in FIG. This is an example of a classic method for terminating a so-called RSC (recursive systematic convolutional) code.
  • RSC codes are already used in GSM AMR channel coding and also as component codes in turbo codes.
  • the associated shift register has three delays D1, D2, D3.
  • the information bit stream ui u 2 u 3 ... arriving at input 1 is here passed to the encoder via switch 2 and looped through line 3 to a first output 14 without change.
  • the first code bit stream v * . (1) v 2 ⁇ v 3 (1) ... therefore corresponds to that incoming information bit stream ui u 2 u 3 ....
  • the code is thus a so-called "systematic code" since the incoming information bits are contained identically in the outgoing data bit stream.
  • the incoming bit stream u ⁇ u 2 u 3 ... is passed through the shift register consisting of the three delays Dl, D2, D3, the respective bit at the input and output of each delay Dl, D2, D3 via the data paths 5, 6, 7, 8, 9 is tapped and fed to the binary adders 10, 11, 12, whereby the code is generated according to the desired rule.
  • the code ⁇ (2) v 2 ⁇ 2) v 3 (2) ... encoded according to the specified rule is present.
  • the individual bits of the two code bit streams Ui u 2 L_ 3 ... and V ⁇ ⁇ 2) v 2 (2) v 3 (2> ... are placed one after the other in a series converter 16 as desired.
  • the code Since two outgoing bits are generated for each incoming bit in the RSC code shown, the code has a rate 1/2.
  • a disadvantage of such a termination of recursive codes is that the information bits ui u 2 u 3 ... and the tail bits ti, t 2 , t not only have to be specially treated during coding, but also require separate handling during decoding is.
  • tail-biting Another method for the uniform protection of information bits within a data block is the so-called “tail-biting”, which is described, for example, in the article “Binary unequal error-protection block codes formed from convolutional codes by generalized tail-biting” by H. Ma in the journal “ IEEE Trans. Information Theory ", vol. 32, pp. 776-786, 1986.
  • an endless chain is formed from the data blocks in a certain way, in which the start bits of a data block are used in a certain way as” tail bits "
  • this method does not require additional tail bits, quite a lot of effort is required to encode and decode the information bits.
  • This object is achieved in that a predetermined number of known tail bits are appended to the end of the respective data block in order to protect the information-carrying bits located in the end area of the data blocks from the channel coding. Because the code is recursive, these tail bits generally do not lead to termination. This means that the code is normally not terminated, since at the end of the decoding the code is generally in an undefined state, depending on the respective code and on the respective information bits of the data block. It has surprisingly been found that this termination can be dispensed with by using known bits as tail bits, without this leading to an increase in the bit error rate for the bits of the data block located in the end region.
  • the alternative method according to the invention has the significant advantage that the information bits and the tail bits are treated uniformly by the encoder and decoder, so that it is no longer necessary to distinguish the information bits and tail bits in the encoder and decoder. Therefore, it is particularly possible, depending on the requirement, for. B. with regard to the performance of the transmission channel, also use more or fewer tail bits without changing the coding or decoding method.
  • the method therefore allows a very quick adaptation to the different transmission options, for example to the available channel rate and the current transmission quality of the respective channel.
  • a number of tail bits which are below the memory m of the code can also be used.
  • the procedure can be used for all recursive codes for which a termination was previously necessary.
  • the method offers particular advantages when using a systematic code in which the information bits are also transmitted as code bits. Since the tail bits are known, they do not have to be transmitted, which can reduce the amount of data.
  • These systematic recursive codes include e.g. B. the RSC or turbo code already mentioned.
  • the code bits are punctured after the proposed method has been applied.
  • decoding methods such as source-controlled channel decoding can be used, the maximum (absolute) apriori knowledge, for example the log-likelihood ratio in the case of the so-called apri-viterbi algorithm, being set on the reception side for the known bits ,
  • a corresponding device for carrying out the method has a channel encoder for recursively encoding a data bit stream divided into data blocks and means for appending a predetermined number of known tail bits to the end of the respective data block.
  • a device which preferably has source-controlled channel decoding, in particular for executing an Apri-Viterbi algorithm or MAP algorithm, and a storage device with a database for the values of the log-likelihood ratio for has the known tail bits.
  • a common coding and decoding device can also be used, which can be used both at the transmitter and at the receiver.
  • Such a combination device preferably also has a source-controlled channel decoder, in particular for executing an Apri-Viterbi algorithm or MAP algorithm.
  • the proposed method and devices for the error-protected transmission of the source signals mentioned at the outset are of particular practical importance. They are therefore particularly suitable for use in mobile radio systems.
  • FIG. 1 is a schematic block diagram of a RSC code according to the classical, in the prior 'art known methods with a termination of the code by the
  • FIG. 2 is a schematic block diagram of the same RSC as in Figure 1, but when using the inventive method;
  • FIG. 3 shows an example for the encoding and decoding of a block of N information bits X x with three tail bits “0”;
  • the essential difference according to the invention from the classic method is that at the end of a block of information-carrying bits Xi x 2 ... x N the tail bits ti, t 2 , t 3 are not recursively generated, as shown in FIG. 1, via the feedback line 15 are, but a predetermined number of "0" bits are added (for example via switch 2) as known tail bits. These "0" bits then pass through the shift register as end values and, unlike the tail bits generated in the conventional recursive method, lead t 2 t 3 x usually not to terminate the shift register. This means that the state of the shift register, and thus also a possible random "0" setting of the register, is not known after the coding of a data block has ended.
  • the incoming information bits xi x 2 • • • N are forwarded via the data line 3 to the output 14 of the encoder and there by means of the in-series converter 16 with the code bits zi at the output 13 z 2 ... z N z N + ⁇ z N +3 z N +3 interleaved into a common output bit stream, which is transmitted over the channel.
  • Trellis diagram can be used. This means that paths with which the known tail bits are incorrectly decoded are discarded.
  • the a priori "L values" values of the log-likelihood ratio
  • the a priori "L values" values of the log-likelihood ratio
  • the Apri Viterbi algorithm channel decoder according to DE 42 24 214 C2 was used for the decoding.
  • the bit error rate BER is plotted in the diagram above the respective bit number, only the last 80 bits of the block being shown in each case. As can clearly be seen, it works
  • Curve IX corresponds to coding without the insertion of tail bits, i. H. without any termination.
  • the bit error rate at the end of a data block rises up to a factor of 50 compared to the average bit error rate in the middle area of the data block due to the abort.
  • curve I shows that in the case of coding with classic termination, with m tail bits generated recursively in the encoder, the bit error rate in the end region of the error block can even be reduced below the average bit error rate.
  • curve III to VIII lying between the two curves each originate from simulations during coding with the method according to the invention, with different numbers of known tail bits being appended.
  • 14 tail bits were used for curve III, 12 tail bits for curve IV, 10 tail bits for curve V, 6 tail bits for curve VI, 4 tail bits for curve VII, and 2 tail bits for curve VIII.
  • 12 known tail bits curve IV are sufficient to protect the information bits at the end of the data block against transmission errors as well as the information bits at other positions.
  • Another advantage is that a further reduction or increase in the number of tail bits used is possible without any problems during operation, so that a quick adaptation to the performance of the transmission channel can take place in each case.

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)

Abstract

L'invention concerne un procédé de protection d'erreurs s'utilisant lors de la transmission d'un flux de bits d'information dans un système numérique de transmission de messages, selon lequel lors d'un codage de canal, le flux de bits d'information est codé par blocs, à l'aide d'un code de convolution. Afin de protéger les bits porteurs d'information qui se trouvent dans la zone terminale d'un bloc de données, un nombre prédéfini de bits d'extrémité connus au préalable sont joints à l'extrémité de chacun des blocs de données.
PCT/DE2001/000022 2000-01-13 2001-01-05 Procede de protection d'erreurs lors de la transmission d'un flux de bits d'information WO2001052424A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2000101147 DE10001147A1 (de) 2000-01-13 2000-01-13 Verfahren zum Fehlerschutz bei der Übertragung eines Datenbitstroms
DE10001147.0 2000-01-13

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1755228A1 (fr) * 2004-05-27 2007-02-21 Matsushita Electric Industrial Co., Ltd. Appareil de décodage viterbi et méthode de décodage viterbi

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Publication number Priority date Publication date Assignee Title
DE19520987A1 (de) * 1995-06-08 1996-12-12 Siemens Ag Verfahren zur Terminierung des Trellis bei rekursiven systematischen Faltungscodes
US5721745A (en) * 1996-04-19 1998-02-24 General Electric Company Parallel concatenated tail-biting convolutional code and decoder therefor
WO1999055011A1 (fr) * 1998-04-18 1999-10-28 Samsung Electronics Co., Ltd. Dispositif et procede de codage de canal pour systeme de communication
WO1999065148A1 (fr) * 1998-06-05 1999-12-16 Samsung Electronics Co., Ltd. Dispositif de codage de canal et methode d'adaptation de debit
US6014411A (en) * 1998-10-29 2000-01-11 The Aerospace Corporation Repetitive turbo coding communication method
WO2000035136A1 (fr) * 1998-12-07 2000-06-15 Telefonaktiebolaget Lm Ericsson (Publ) Technique de correction d'erreur anticipative a poinçonnement multiple

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Publication number Priority date Publication date Assignee Title
DE19520987A1 (de) * 1995-06-08 1996-12-12 Siemens Ag Verfahren zur Terminierung des Trellis bei rekursiven systematischen Faltungscodes
US5721745A (en) * 1996-04-19 1998-02-24 General Electric Company Parallel concatenated tail-biting convolutional code and decoder therefor
WO1999055011A1 (fr) * 1998-04-18 1999-10-28 Samsung Electronics Co., Ltd. Dispositif et procede de codage de canal pour systeme de communication
WO1999065148A1 (fr) * 1998-06-05 1999-12-16 Samsung Electronics Co., Ltd. Dispositif de codage de canal et methode d'adaptation de debit
US6014411A (en) * 1998-10-29 2000-01-11 The Aerospace Corporation Repetitive turbo coding communication method
WO2000035136A1 (fr) * 1998-12-07 2000-06-15 Telefonaktiebolaget Lm Ericsson (Publ) Technique de correction d'erreur anticipative a poinçonnement multiple

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Title
COX R V ET AL: "AN EFFICIENT ADAPTIVE CIRCULAR VITERBI ALGORITHM FOR DECODING GENERALIZED TAILBITING CONVOLUTIONAL CODES", IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY,IEEE INC. NEW YORK,US, vol. 43, no. 1, 1 February 1994 (1994-02-01), pages 57 - 68, XP000450947, ISSN: 0018-9545 *
WANG Y -P E ET AL: "To bite or not to bite-a study of tail bits versus tail-biting", IEEE INTERNATIONAL SYMPOSIUM ON PERSONAL, INDOOR AND MOBILE RADIO COMMUNICATIONS,XX,XX, vol. 2, no. 2, 15 October 1996 (1996-10-15), pages 317 - 321, XP002110573 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1755228A1 (fr) * 2004-05-27 2007-02-21 Matsushita Electric Industrial Co., Ltd. Appareil de décodage viterbi et méthode de décodage viterbi
EP1755228A4 (fr) * 2004-05-27 2008-04-16 Matsushita Electric Ind Co Ltd Appareil de décodage viterbi et méthode de décodage viterbi
US7861146B2 (en) 2004-05-27 2010-12-28 Panasonic Corporation Viterbi decoding apparatus and Viterbi decoding method

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