WO2001027976A1

WO2001027976A1 - Semiconductor device processing and sorting apparatus and method of handling

Info

Publication number: WO2001027976A1
Application number: PCT/RU1999/000380
Authority: WO
Inventors: Vladimir Nikolaevich Davydov; Alexandr Dmitrievich Kudryashov; Alexei Nikolaevich Bogachev
Original assignee: Vladimir Nikolaevich Davydov; Kudryashov Alexandr Dmitrievic; Alexei Nikolaevich Bogachev
Priority date: 1999-10-13
Filing date: 1999-10-13
Publication date: 2001-04-19
Also published as: AU3084500A

Abstract

The present invention relates to a semiconductor device processing and sorting apparatus in which a plurality of semiconductor devices is tested simultaneously. According to the present invention the apparatus comprises inclined guideways for guiding the semiconductor devices, each inclined guideway having a sliding surface for sliding semiconductor devices therealong by gravitation, the semiconductor devices being arranged on the guideway so that their smallest dimension is transverse to the sliding surface, the inclined guideways including an input guideway for guiding semiconductor devices into the apparatus; testing guideways for guiding semiconductor devices to predetermined testing positions, said testing guideways being spaced in the direction transverse to their sliding surface; and sorting guideways for guiding semiconductor devices of different sort groups into respective containers; a loading means for placing a container of a plurality of containers for semiconductor devices in a position for unloading the semiconductor devices from a container into the input guideway; a distributing means for distributing the semiconductor devices from the input guideway to the testing guideways; a testing means for simultaneously testing a plurality of semiconductor devices at predetermined testing positions; a sorting means for receiving the tested semiconductor devices from the testing guideways and moving each tested semiconductor device according to its test results to a respective sorting guideway; and a discharge means for placing a container of a plurality of containers for semiconductor devices in a position for loading semiconductor devices of each sort group into the respective container. The apparatus has a very high throughput, an improved soak chamber, accelerated sorting facilities and multiple sort output while occupying a reduced floor space.

Description

SEMICONDUCTOR DEVICE PROCESSING AND SORTING APPARATUS AND METHOD OF HANDLING

Technical field The present invention relates generally to a semiconductor device processing and sorting apparatus (commonly called handler) for receiving semiconductor devices to be tested, bringing them to a predetermined temperature, transporting semiconductor devices to a test station where they are brought into electrical contact with sockets of the test head of the testing apparatus, followed by carrying the tested semiconductor devices out of the testing station, sorting them out into conforming (pass) and non-conforming (failure or defective) articles on the basis of the test results and discharging them from the apparatus in suitable containers.

The present invention is applicable in particular, though not exclusively, for test analysis of semiconductor devices having different package configuration, including dual-in-line packaged integrated circuits (DIPs), surface mounted devices (SMD) and other types of integrated circuits, or semiconductor devices. Background of the Invention

In the semiconductor industry the semiconductor devices or electronic components are tested after each step of its fabrication by applying test signals of a predetermined pattern to the semiconductor devices to be tested. Many of the testing systems for measuring electrical characteristics of semiconductor devices to be tested by applying signals of a test signal of a predetermined pattern to the devices comprises a semiconductor device handling (processing and sorting) apparatus (commonly called handler) integrally connected thereto for receiving, bringing to a predetermined temperature, and transporting semiconductor devices to a test station where they are brought into electrical contact with sockets of the test head of the testing apparatus, followed by carrying the tested semiconductor devices out of the testing station, sorting them out into conforming (pass) and non- conforming (failure or defective) articles on the basis of the test results and discharging from the apparatus in suitable containers. In the foregoing disclosure the present invention will be described by taking semiconductor integrated circuits (as will be referred to as IC hereinafter) typical of semiconductor devices by example for the convenience of explanation. The term "semiconductor device processing and sorting apparatus" (or, IC processing and sorting apparatus) as used herein generally means both the semiconductor device handler (or, IC handler) and the semiconductor device handler having a testing apparatus (or, IC testing apparatus) connected thereto.

In many cases the speed of operation of the handler's is the limiting factor governing the rate of the testing performed. While the tester can cycle devices at a high speed, the speed of loading, contacting and unloading devices often limits the overall throughput of the testing apparatus, due to small capacity of loading and unloading means, testing manipulators, and sorting devices.

To increase the speed of processing, in recent years the IC testing apparatus has integrated therewith a handler called "forced horizontal transporting system" capable of picking up ICs and transporting the picked up ICs to any desired location by the use of X-Y direction transport means. However, handlers of this type require a large amount of expensive positioning equipment and thus are usually expensive and low in throughputs.

In many known handlers of the "gravity feed" type, the semiconductor devices are caused to slide within the apparatus along inclined guideways under the influence of gravity, by their own weight, to undergo a test (see, for example, US 4,781 ,494). Thus, the need for transport mechanisms is reduced or eliminated, allowing to simplify the construction of the handler and to manufacture ICs cheaper at higher throughputs. However, with an increased number of IC to be tested simultaneously with an enhanced speed of the IC testers, in the semiconductor device testing apparatus having incorporated therein a handler of the gravity-feed type, it has been difficult to provide a loading and unloading means of a sufficient capacity and adequate speed.

Also, a limiting factor of the present handling technologies is the sorting operation involving transporting of the tested ICs along narrow paths that often may cause stoppage and prevents from achieving high speed of sorting. Slow transportation and imperfect switching mechanisms prevents from installing multiple output sorting devices. It shall be mentioned that a typical sorting device has at most an 8-sort programmable output that is insufficient in many applications requiring multiple output production types.

At present, various high speed gravity feed handlers are known, such as those produced by Micro Component Technology Corporation (see, e.g. US 4,645,402, or US 4,579,527), to provide cheaper and speedy IC processing by using automatic loading and/or unloading pick-and-place apparatuses in conjunction with gravity feed test means which allow to increase the tester speed significantly. However, it is still restricted in throughput values which amounts to 14,400 devices per hour due to the following problems.

One problem related to contemporary gravity-feed handlers is providing a predetermined temperature of testing for each IC which enters a test zone. The ICs to be tested are subjected to an elevated or lowered temperature depending on the type of the specific integrated circuit and the test conditions. Thus, many known handlers include thermostat means for adjusting the temperature of the semiconductor devices to the test requirements. As a rule, the trend to increase the speed and throughput of a handler causes a technological requirement of reducing the test path of a semiconductor device flow. However, a certain "soak" period is necessary for each semiconductor device to reach the desired temperature level. This conflict may be resolved as suggested in US 5,287,294 by providing a linear input tray of a sufficient length which functions as a temperature chamber. However, in this case a linear handler should have large dimensions with its height being about 3 meters and tube feed position more than 2 meters high, i.e. beyond the reach of the operator. Moreover, the necessity of thermo-insulating of an input tray imposes limitations on its capacity and, thus, limits the throughput of the testing system.

Still another problem of the present handling technologies is the use of the batch operated tester devices which require frequent reloading. Typically, during reloading, the tester is out of work that causes the decrease of IC throughput. One way of increasing the throughput of handlers of the above type is to increase the number of testing guideways and consequently the testing positions. Thus, a greater plurality of semiconductor devices may be tested simultaneously. This way of increasing the throughput was employed by Sato, et al. (see US patent 4,760,924). The handler disclosed in this patent comprises inclined guideways for guiding ICs moved therealong by gravitation, the guideways including an input guideway, testing guideways, and sorting guideways; loading means for loading ICs by extracting them from a container and moving to the input guideway; distributing means for distributing ICs from the input guideway to the testing guideways; testing means for simultaneously testing a plurality of ICs at predetermined testing positions; sorting means for dividing ICs according to their test results into at least two groups by moving each tested semiconductor devices to a desired sorting guideway; and discharge means for placing the ICs of each group into a respective container. Also, this handler includes heating means for heating the semiconductor devices according to the test requirements.

However, the known approach to increase the number of electronic devices tested simultaneously may decrease but not avoid undesirable downtimes of the tester. Also, it shall be noted that integrated circuits are generally rectangular, boxlike devices of plastic or ceramic with a row of pins extending downward along two or more sides, one dimension, namely, the thickness of the box, being much smaller than the other two. During processing and handling the ICs are typically transported in a lengthwise direction that prevents from reducing ICs path greatly and constitutes on of the important disadvantages of the present gravity feed technologies.

It shall also be noted that the distribution and sorting means of the known apparatus are arranged laterally to the direction in which the semiconductor devices are fed from the input guideway that requires additional direction changing mechanisms. Also, the sorting means typically provides not more than two sort groups, and rarely up to eight sort groups that is insufficient for the current manufacturing technologies.

Still another problem is the fully automatic transport path that makes it difficult to perform maintenance operations in many handlers due to inaccessibility of the components under test during transportation and may also cause serious downtimes of the testing apparatus.

Thus, the requirement of high throughput of testing apparatuses, on the one hand, and the limitations of the present technology, on the other hand, necessitates the development of an improved handler, both operator-friendly and providing high- speed testing in temperature controlled environment.

Disclosure of the invention

It is an object of the present invention to solve the above described problems at least partially by providing a semiconductor device processing and sorting apparatus which has a very high throughput. It is also an object of the present invention to provide a processing and sorting apparatus having an improved soak chamber which is capable of bringing semiconductor devices to a preselected temperature while occupying a reduced amount of space.

Another object of this invention is to provide a semiconductor device processing and sorting apparatus having accelerated sorting facilities and multiple sort output.

Still another object of this invention is to provide a semiconductor device processing and sorting apparatus which does not take much space and which is relatively cheap and easily-maintained, reliable and convenient to operate. Still another object of the invention is to provide a high-speed method of handling semiconductor devices under test.

The proposed processing and sorting apparatus (herein also called handler) can be used for parallel testing of 64 or even 128 components and sorting them into

24, 48 or even up to 50 groups. Significant advantages of the invention are its high throughput (of up to 40,000 units per hour), extended period of autonomous (without any operator intervention) work, the overall dimensions and unit arrangement allowing the operator to reload the handler easily. There are also other advantages of the handling system that will be apparent from the following detailed disclosure of the invention accompanied with drawings. In accordance with one aspect of the present invention, the semiconductor device processing and sorting apparatus in which a plurality of semiconductor devices is tested simultaneously comprises: inclined guideways for guiding the electronic components, each inclined guideway comprising a sliding surface for sliding semiconductor devices therealong by gravitation, the semiconductor devices being oriented so that their smallest dimension is transverse to the sliding surface; the inclined guideways including an input guideway, testing guideways, and sorting guideways, said testing guideways being spaced in the direction transverse to their sliding surface; a loading means for loading the semiconductor devices by extracting them from a container and moving to the input guideway; a distributing means for distributing the semiconductor devices from the input guideway to the testing guideways; a testing means for simultaneously testing a plurality of semiconductor devices at predetermined testing positions on the testing guideways; a sorting means for receiving the tested semiconductor devices from the testing guideways and moving each tested integrated circuit according to its test results to a desired sorting guideway; and a discharge means for placing the semiconductor devices of each group into the respective container. Preferably, the loading means includes a container manipulator for moving the container in a position for loading ICs. Typically, containers are tube-like containers carrying from 8 to 16 semiconductor devices, e.g. ICs, semiconductor chips, packaged parts, etc. When containers are supplied in cassettes, the loading means preferably further includes a cassette manipulator for moving the cassette in a position for taking one of the containers by the container manipulator. With this loading system, after the operator has loaded the cassettes at the loading means, the apparatus operates in a completely automatic manner until all the cassettes are empty. Thus, with the apparatus of the invention, the period of unattended operation is substantially extended. Typically, the processes of distribution and sorting include moving the ICs from one guideway to another. In the prior art handler the testing guideways are spaced in the direction parallel to their sliding surface; therefore the movement between the guideways, for example, from a common input guideway to a one of a plurality of test guideways, is performed in the same direction, i.e. laterally. Thus, an integrated circuit shall pass at least a distance corresponding to its width, or the width of the guideway, to get from one guideway to another. In view of large amounts of the handled ICs, this relatively large distance to be passed by each integrated circuit results in substantial decrease of the overall throughput of the apparatus. On the contrary, according to the present invention, the testing guideways are spaced in the direction transverse to their sliding surface. Therefore, the movement of the ICs from the guideways or to the guideways (e.g., from the distributing means to the test guideways) is effected within a plane (preferably, within a vertical plane) transverse to the sliding surface of the guideways, in other words, parallel to the smallest dimension of the IC as they are positioned in the handler, so that a semiconductor device passes a distance that is comparable with its smallest dimension. Thus, the guideways may be located at very short intervals, and an IC passes the smallest possible distance to move from one type of guideway to another. The time for each such movement is, therefore, substantially reduced, and the throughput of the handler is considerably increased. Preferably, the processing and sorting apparatus of the invention comprises a thermostat means for adjusting the temperature of the semiconductor devices to the test requirements, the said thermostat means including a thermally insulated soak zone.

Preferably, the distributing means and testing means are located in the soak zone of the thermostat means. Thus, the time required for an IC to pass through the distributing means and down the testing guideway to the testing position is used to adjust its temperature. Therefore, the temperature adjustment does not take additional time.

Preferably, the testing guideways are spaced vertically. Thus, the movement of a semiconductor device through the process of distribution takes place in a vertical plane. Therefore, the distributing means are preferably constituted by an elevating device which is preferably positioned substantially vertical. Preferably, the distributing means comprises a plurality of movable holding means, e.g. troughs, for moving the ICs, the said troughs having a sliding surface for ICs sliding thereon that allows loading and unloading ICs into/from the troughs under the influence of gravity. Preferably, the troughs are spaced substantially transversely to the smallest dimension of semiconductor devices providing that the elevator devices occupy a reduced space. Similarly, the sorting process takes place in a vertical plane and, thus, the second elevator device is preferably positioned vertically and comprises a plurality of movable holding means having a sliding surface for the ICs sliding thereon and spaced preferably transversely to the smallest dimension of the semiconductor devices sliding thereon.

Alternatively, according to another embodiment of the invention, at least one of the elevating devices (or, both elevating means) may be inclined within the vertical plane of the test guideways so as to reduce the distance between the distributing means and the tester and/or between the tester and the sorting means to minimize the ICs path from the elevator troughs to the test guideways.

According to a preferred embodiment of the present invention, the proposed processing and sorting apparatus has a vertical one-plane crisscross arrangement of semiconductor device transport path employing two vertical elevator mechanisms. Alternatively, the distributing means may be constituted by an inclined elevator, or conveyor device. In this case the movement of the movable holding means may include elevation of the ICs in a direction ranging from vertical direction to the direction substantially transverse to the sliding surface of the test guideways.

Besides the process of distribution, the elevating device is used to raise the ICs to the suitable level to ensure their sliding under the influence of gravity, by their own weight, down the testing guideways. Without the elevating device, it would be necessary to dispose the input guideway at a higher level. This would deteriorate accessibility of the loading means and input guideway for the operation and maintenance and increase floor space occupied by the apparatus. The testing means includes a testing device for applying test signals of a test signal of a predetermined pattern to the semiconductor devices under test, receiving response signals and attributing each tested integrated circuit, according to its test results, to one of the sorted groups. The testing means includes a test header (a component of the testing apparatus for applying and receiving various electrical signals for testing) and a testing manipulator (which operates to bring ICs into contact with the test header). Preferably, the tester means has a number of testing positions for connecting ICs thereon; the number of this testing positions is a multiple of the number of semiconductor devices which may be tested at a time by the testing means, and the number of the testing manipulators is equal to this multiple. For example, in this preferred embodiment described below the number of testing positions is 128, the number of ICs which may be tested at a time by the testing device being 64, and the number of the testing manipulators being 2.

Typically, the ICs are retained at testing positions by means of sockets adapted to hold the IC at the testing position during the test. Standard sockets may be used in conjunction with the testing means of the present invention, for example such as OTS-44-0.8-0.9 (TSOP-44 pin) socket connectors manufactured by Enplus Corporation, USA. Preferably, the processing and sorting apparatus of the present invention employs two test manipulators in parallel to effectively perform loading of the test contact zone. Such an arrangement enables to reduce the overall testing time by reducing or eliminating the down times of the testing device. Therefore, the test zone of the proposed handler is adapted to accommodate two test manipulators so as to permit their mutual work without interference. Such an arrangement enables to reduce overall testing time by reducing or eliminating down times of the testing device. A considerable time (usually comparable with the testing time) is needed to move the ICs to be tested to, and remove the tested ICs from, the testing positions. In the prior art, these operations cause downtimes of the testing device. According to the preferred embodiment of the invention, when a first plurality of 64 ICs is installed in the sockets by the first test manipulator and is under test, a second plurality of 64 ICs to be tested is moved to the testing positions by the second test manipulator. After the test is over, the testing device is electrically switched to other 64 testing positions in which the ICs to be tested are already placed. No significant time is taken by this switching. While the second plurality is under test, the first plurality of tested ICs is removed from, and a third plurality of the ICs to be tested is moved to, the testing positions by the first test manipulator. This enables operation of the testing device in an almost continuous manner, thus substantially reducing overall testing time.

Alternatively, according to another embodiment of the method of handling of the present invention, all the testing positions available on the tester may be used simultaneously to effect testing 128 ICs at a time without any modification in the structure of the processing and sorting apparatus, with the test manipulators operating synchronously.

Preferably, each test manipulator comprises a sensor means for detecting ICs position within the test guideway, a stopper means for stopping the ICs sliding along the test guideways at predetermined testing positions, an unlocking means for locking/unlocking the sockets; and an up/down pusher means for bringing the ICs into contact with the testing positions and subsequent releasing the ICs therefrom.

After testing, semiconductor devices according to their test results are sorted into one of sort groups. In the most simple case there are two groups of "pass" and "failure" semiconductor devices. However, very often semiconductor devices are sorted into a larger number of groups representing various levels of quality. Preferably, the sorting guideways are spaced vertically. Preferably, the sorting means includes an elevating device for receiving the ICs from the testing guideways and moving them to the receiving guideway. Beside that, the elevating device is used to raise the ICs to the suitable level to ensure their sliding down the receiving guideway and sorting guideways. Without this elevating device, it would be necessary to dispose the testing guideways at a higher level. This would deteriorate accessibility of the testing means for maintenance and increase the floor space occupied by the apparatus.

Preferably, the sorting means includes a receiving guideway for receiving the ICs from the testing guideways and moving them to the sorting guideways. Receiving all tested ICs on one guideway is preferable for functioning of a high speed sorting means described below in detail. Preferably, the sorting means includes a velocity adjusting mechanism for imparting a predetermined velocity to the tested ICs sliding along the receiving guideway. The mechanism eliminates variations in the velocity of, and adjusts regular intervals between, the ICs sliding along the receiving guideway. This facilitates operation of the sorting means. Preferably, the sorting means comprises a switching device for directing each tested semiconductor device moving along the receiving guideway to the desired sorting guideway.

Preferably, the switching device includes switching keys respectively associated with the sorting guideways, each switching key comprising the blowing means operated at the moment the IC approaches the desired sorting guideway and adapted to provide air flow carrying the IC from the receiving guideway to this sorting guideway. Thus, a need is eliminated for slow-operating mechanical devices picking ICs and placing them on sorting guideways. The use of the blowing means prevents semiconductor devices from stoppage along their path from the receiving guideway to the sorting guideways and further into tubes arranged in cassettes. Each integrated circuit, without reducing its high velocity, is carried from the receiving guideway to a sorting guideway by the air flow created by the blowing means. Thus, high velocity is kept even when moving the ICs from one inclined guideway to another, resulting in increased throughput. It shall also be mentioned that each IC is traced on the whole path from the input means up to the discharge means by a control system.

Preferably, each sorting guideway is provided with a container for collecting ICs of this sort group. Preferably, the sorting guideway may be equipped with a container manipulator which operates to install empty containers from one cassette in a position for loading ICs coming down the sorting guideway and move each filled container to a second cassette for storing the containers with tested ICs until all the empty containers in the container manipulator is filled.

Similarly, sorting guideways may be further provided with cassette manipulators having a number of cassettes and adapted to move the cassette in a position for taking one of the containers by the container manipulator. With this improved discharge means, after the operator has placed a number of the cassettes in the discharge means the apparatus operates in a completely automatic manner until all the cassettes in corresponding sort guideways are full. Thus, with the apparatus of the invention, the period of unattended operation is substantially extended.

In accordance with another aspect of the present invention, an integrated circuit processing and sorting apparatus in which a plurality of ICs may be tested simultaneously comprises inclined guideways for guiding the ICs moved therealong by gravitation, the guideways including an input guideway, testing guideways and sorting guideways; loading means for loading the ICs from a container into the input guideway; distributing means for distributing the ICs from the input guideway to the testing guideways; testing means for simultaneously testing a plurality of ICs at predetermined testing positions on the testing guideways, the testing means comprising a testing device for applying signals of a test signal of a predetermined pattern to the devices, receiving a response signal and attributing each tested IC, according to its test results, to one of sort groups, and at least one testing manipulator for connecting the ICs under test with the testing device; the number of the testing positions being multiple by the number of ICs which may be tested at a time by the testing device, and the number of the testing manipulators being equal to this multiple; sorting means for receiving the tested ICs from the testing guideways and moving each tested IC according to its test results to a desired sorting guideway; and discharge means for placing the ICs of each group into a respective container. In accordance with still another aspect of the present invention, an integrated circuit processing and sorting apparatus in which a plurality of ICs may be tested simultaneously comprises inclined guideways for guiding the ICs moved therealong by gravitation, the guideways including an input guideway, testing guideways, a receiving guideway, and vertically spaced sorting guideways, loading means for loading the ICs by extracting them from a container and moving to the input guideway; distributing means for distributing the ICs from the input guideway to the testing guideways; testing means for simultaneously testing a plurality of ICs moved along the testing guideways to predetermined testing positions; sorting means for receiving the tested ICs from the testing guideways and moving each tested integrated circuit according to its test results to a desired sorting guideway; the sorting means comprising a switching device for directing each tested integrated circuit moving along the receiving guideway to the desired sorting guideway, the switching device including switching keys respectively associated with the sorting guideways, each switching key comprising the blowing means adapted to provide air flow carrying the IC from the receiving guideway to the sorting guideway, and discharge means for placing the ICs of each group into their respective container.

In accordance with still another aspect of the present invention, a method of handling the ICs in a processing and sorting apparatus having inclined guideways each having a sliding surface includes the steps of loading to an input guideway of the processing and sorting apparatus ICs oriented so that their smallest dimension is transverse to the sliding surface of the input guideway, moving, at least partially by gravitation, along said inclined guideways, the ICs oriented so that at each point their smallest dimension is transverse to the sliding surface of the guideway; and moving the ICs from one inclined guideway to another being spaced substantially in the direction of their smallest dimension. Preferably, the inclined guideways are parallel to each other and the ICs are moved in parallel to the guideways. The fact that the ICs are moved from one guideway to another being spaced in the direction of their smallest dimension allows the locating of the ICs and guideways at very short intervals. Thus, an IC will pass the smallest possible distance in moving from one guideway to another. The time for each such movement will, therefore, be substantially reduced, and the throughput of the handler using the method of this invention will be considerably increased.

Preferably, the step of moving the ICs from one inclined guideway to another includes at least one elevation effected by means of an elevating device. This elevation is used to raise the ICs to the suitable level to ensure their sliding by gravitation down the following guideways.

Preferably, the steps involved in moving the ICs from one inclined guideway to another includes carrying the ICs by means of an air flow. This allows carrying each IC, without reducing its velocity, from one guideway to another due to levitation caused by the air flow. Thus, high velocity is kept even when moving the ICs from one inclined guideway to another, resulting in an increased throughput.

A computer program product has also been proposed comprising a computer usable medium having computer readable program code means embodied in the said medium for enabling the method of handling ICs in a processing and sorting apparatus having the inclined guideways each having a sliding surface including the steps of loading to an input guideway of the processing and sorting apparatus ICs oriented so that their smallest dimension is transverse to the sliding surface of the input guideway, moving, at least partially by gravitation, along said inclined guideways, the ICs oriented so that at each point their smallest dimension is transverse to the sliding surface of the guideway; and moving the ICs from one inclined guideway to another being spaced substantially in the direction of their smallest dimension.

For a better understanding of the present invention and to show how the same may be carried into effect, reference will now be made, by way of example, without loss of generality, to the accompanying drawings in which: Fig.1 is a perspective view showing a block scheme of the semiconductor device processing and sorting apparatus in accordance with the present invention;

Fig.2 is a diagram illustrating the outline of movement of IC elements in the semiconductor device processing and sorting apparatus in accordance with the preferred embodiment of the present invention;

Fig.3 is an elevational side view of a cassette manipulator according to the preferred embodiment of the invention;

Figs.4a-4d illustrates the subsequent steps of operation of the cassette manipulator; Fig.5 is a side view in elevation of a preferred embodiment of the container manipulator having adjustable length;

In Fig.6 a side view of an example embodiment of the elevating device with an exploded side elevational view of the upper part of the elevating device (housing removed) is shown; In Fig.7 an exploded side elevational view of the test guideway in assembly is shown in greater detail with a partial cut of the upper part of the guideway;

In Figs.8a-8c side elevational views of the different test guideway mechanisms are shown;

Fig.9 is a front view (left) and a section view (right) of a testing manipulator according to a preferred embodiment of the invention;

In Figs.10a -10b detailed cross elevations of the test guideway are shown;

In Fig.11 a side view and an exploded side view showing a sorting means including a receiving guideway are presented;

Figs.12a-12f illustrates a discharge means equipped with cassette collectors and tube collectors in different combinations.

Fig.13 is a diagram illustrating a computer system for controlling the operation of the processing and sorting apparatus according to the invention.

The semiconductor device processing and sorting apparatus in accordance with the preferred embodiment of the present invention shown in Fig.1 comprises a loading means I which comprises a cassette manipulator 1 and a container manipulator 2; a distributing means II comprising an elevator 3 provided with a temperature regulator and having an inclined input guideway 4; a testing means III comprising two test manipulators, inclined test guideways 5,6, an accumulating zone 7 and a testing device 8; a sorting means IV comprising a second elevator 9 provided with a temperature control means; a receiving guideway 10 having a velocity adjusting mechanism 1 1 , sorting guideways 12 provided with switching keys, each switching key associated with a respective sorting guideway; and a discharge means V.

The guideways of the handler are inclined at an angle of preferably from 20 to 40° to the horizontal plane, more preferably, at an angle of 35°. At greater angles of inclination, the likelihood of damage to the IC pins increases, while at lower angles, the friction between the ICs and the guideway sliding surface increases enough to interfere with, or stop altogether, the ICs movement along the guideway and other means. The loading means, the troughs of the elevators, and unloading means are arranged so as to effect the ICs movement under gravity throughout the whole handler. With this inclined orientation, ICs are fed under the influence of gravity from the input guideway into the troughs of the first elevator, from the elevator troughs into the test guideways, from test guideways into the second elevator troughs, from the second elevator troughs into the receiving guideway, from the receiving guideway into the sorting guideways and from the sorting guideways into containers.

The operational scheme of the system shown in Fig.1 is illustrated in Fig.2.

One of the important features of the handler is an extended period of time during which the apparatus requires no intervention of the operator. The initial step of the operation of the semiconductor devices processing and sorting apparatus is performed by an operator and comprises loading, i.e. inserting cassettes, either empty, or cassettes carrying containers, e.g. tubes filled with electronic components, e.g. semiconductor integrated circuits, into the loading means and discharge means. The loading means I is loaded by inserting an empty cassette into the output of the tube manipulator 2, i.e. in the place intended for an output cassette; and inserting a filled cassette carrying filled tubes into the input of the tube manipulator 2, i.e. in the place intended for the input cassette; after then seven more filled cassettes carrying filled tubes are positioned into the input of the cassette manipulator 1. It will be appreciated that the number of tubes and cassettes is illustrative only and not a limitation of the invention. The number of cassettes that can be inserted at once depends on the cassette manipulator capacity only.

To load the discharge means V, similarly, first, an empty cassette is inserted into the output of the tube manipulator 13 of the sorting means, i.e. in the place intended for the output cassette; then, a filled cassette carrying empty tubes is positioned into the input of the tube manipulator 13 of the sorting means; and then seven more cassettes carrying empty tubes are positioned into the input of the cassette manipulator 14. The sorting means IV are loaded, e.g. with fifteen empty tubes that are positioned in the tube channels 12, one tube being placed in each channel.

The next steps of the operation are fully automated and are performed by the processing and sorting apparatus according to the invention.

The tubes carrying the ICs are removed one by one from the filled cassette by the tube manipulator 2, positioned for loading the ICs into the input guideway 4 of the elevator 3 of the distributing means II, the ICs are allowed to slide down, and then the empty tubes are inserted by the tube manipulator 2 into the empty output cassette.

Each cassette, being unloaded by the cassette manipulator 1 , is moved in parallel from the input of the cassette manipulator to the next position within the manipulator, whereby when the filled cassette goes out from the output of the tube manipulator 2, a cassette with empty tubes is positioned into the loading place of the tube manipulator and a cassette with filled tubes is positioned into the discharge place of the tube manipulator. Gravitation forces ICs to slide down the tubes and enter the input guideway 4 of the elevator 3 which preferably is adapted to accommodate eight microcircuits, or semiconductor devices of another type. The input guideway capacity varies depending on the type of the devices and may be from 4 to 16 units. ICs are fed into the troughs of the elevator 3 and are lifted to a loading position of the test manipulators.

Being provided with a thermally insulating housing and heating elements (not shown), the elevator 3 forms a soak zone where IC are heated or cooled gradually to a temperature required during testing. The components installed in the soak zone are stable at temperatures from minus 60 to plus 120°C.

When the ICs reach the upper part of the elevator, they are allowed to slide down the elevator troughs (in total 8x8 ICs) along the guideways 5 of the first test manipulator or guideways 6 of the second test manipulator the upper parts of which form the accumulating zone 7 of the tester device 8. To maintain continuos mode of testing and reduce test time, two test manipulators are provided for the testing means III. When one group of ICs, for example, an array of 8x8 ICs, is under test at the test positions of the first test manipulator which is due to this reason occupied until the completion of the test, the second manipulator can receive up to 8x8 ICs from the test manipulator accumulator 7 to prepare the next array of ICs to be tested. A test manipulator accumulator 7 is arranged upstream of the tester device 8 to accumulate a new lot of ICs to be passed to the tester. The ICs are passed to the test positions step-wise, one IC per step from each guideway, 8 ICs from each guideway in eight steps.

The manipulator 5 moves ICs into sockets of the tester 8 where they are tested and after test passed into the sorting means IV comprising a second elevator 9. The elevator 9 receives 8x8 tested ICs in one step into eight troughs, then the ICs are lifted and passed in a single flow to the receiving guideway 10 of the sorting means V. To increase the throughput, the receiving guideway 10 is provided with a velocity adjusting means which is located at the input of the IC flow and maintains the constant rate of the ICs flow at the input of the sorting guideways 12. The ICs enter the sorting guideways 12 of the sorting means, each sorting guideway being provided with a switching device. To facilitate the distribution of tested ICs between sorting guideways, the switching devices comprise a means for blowing air from the bottom of the IC. Each IC group is packed into containers (tubes) that are inserted into the sorting guideways 12. The containers are then packed into cassettes with the help of the container manipulator 13 and the cassette manipulator 14 which together form a discharge means V. Typically, the IC flow is divided into up to 16 sort groups, however, the number of sort groups may be increased up to 50 and more if desired. According to a third embodiment of the invention, the sorting means comprises a second elevator which sorts the tested ICs in the absence of the receiving guideway, velocity adjusting means and switching means. In this case, openings are made in the right wall of the second elevator opposite the elevator troughs and tube holders are installed in the openings so as to allow the discharge of the tested and sorted ICs directly from the troughs of the second elevator into the tube containers. Tube manipulators and cassette manipulators may be arranged accordingly. The information about the tested ICs is monitored by the control system and delivered to the second elevator. This modification may be employed to sort the tested IC flow, for example, into DIMM groups. Moreover, the ICs may also be discharged from the left side of the second elevator. The advantage of this modification is that the ICs discharged from the left side will enter the tube containers from the same end from which they were unloaded from the containers at the input of the apparatus, i.e. from the open end of the container. Thus, the operation of closing one end and opening the other end of the container is eliminated.

There are just two moments when the processing and sorting apparatus according to the invention requires operator's assistance. First, when the input means are completely unloaded, the operator takes cassettes with empty tubes and reloads the input means as described above. Second, when the sorting means is full, the operator takes away the cassettes carrying filled tubes or the cassettes are emptied and the sorting means is reloaded as described above. Detailed description of the loading means

The loading means includes a cassette manipulator (see Fig.3 and Fig.4) for moving the cassette in a position for taking one of the containers by the container manipulator and a container manipulator (see Fig.5) for moving the container in a position for loading ICs. Detailed description of the cassette manipulator

In Fig. 3 the detailed view of a cassette manipulator is presented. The cassette manipulator comprises two parallel spaced elongated housings 22 and 23 connected by a bracket 21. Opposed movable racks 27 facing each other are respectively mounted on the housings. Two rack drive mechanisms (not shown) are disposed within each housing 22, 23, one for horizontal, and another for vertical movement of the racks. Two series of upper 24 and lower 25 recesses are formed on each housing 22, 23 for holding a cassette.

The upper recesses 24 are adapted to receive projections 31 (which are shown in details in Figs.4 and 5) to provide fitting a cassette in the upper position, and the lower recesses 25 are adapted to receive projections 34 of the cassette to provide securing the cassette in relation to the cassette manipulator and maintaining it in a substantially constant position.

Each movable rack 27 is provided with a series of double flanges 28 defining a recess therebetween and adapted to engage a projection 33 of the cassette for holding it during the cassette transposition. Each double flange 28 has a break 35 adapted to receive the projection 33. The number of recesses 24 and 25 and double flanges 28 defines the number of cassettes that can be inserted in the manipulator and processed at once. The spacing between flanges 28 should allow the cassette movement during the operation of cassette transposition. Preferably, the spacing between flanges is not less than the cassette thickness.

According to a preferred embodiment of the present invention, a plurality of the containers is held in a cassette 26. Cassette 26 includes two parallel guides 29 for receiving the ends of each container. Guides 29 are connected by an extendible holding element. Thus, the cassette may be adjusted according to the length of the container which may vary. The containers may be stacked in the cassette with their ends held by the guides 29. Each tube guide 29 is provided with a fixing element 30 (see also Fig. 5) having protrusions 31 , 33 and 34, and a recess 32.

The protrusion 31 is adapted to enable the cassette hanging on the upper projections 24 of the housings, on the one hand, and the cassette fitting by movable racks 27 to enable the cassette movement, on the other hand; a recess 32 that is wide enough to allow the rack 27 to be pulled out through the recesses 32 during the back stroke; and protrusions 33 (that correspond to double flanges 24 on the manipulator) for securing the cassette in relation to the cassette manipulator.

Preferably, 16 cassettes are installed in the cassette manipulator, including 8 input, i.e. in this case, loaded with filled tubes, cassettes, and 8 output, i.e. in this case, empty, cassettes to ensure the autonomous processing and sorting apparatus operation for more than 12 minutes at a throughput of 40,000 semiconductor devices per hour. However, it shall be understood that the number of cassettes is not limited by 16 and can be increased if desired.

The cassette manipulator operates as illustrated in Figs.4a-4d. In the upper row of figures the left part of the movable rack 27 is shown in front view in conjunction with the fixed housing 23; the position of the cassette fixing element 30 protrusions are shown by hatched boxes.

Fig.4a illustrates the cassette manipulator in its starting position when the movable rack 27 is in its lower right position, the cassette being fitted with the protrusion 31 of its fixing element onto one of the recesses 24 made in the housing 23 of the first manipulator driver. At the next step shown in Fig.4b, the cassette fixed by the rack 27 is pulled off the projections 24 of the housing 23, the rack being shifted to its upper position. As shown in Fig.4c, further the rack 27 with the cassette fixed by its element 30 on the flanges 28 moves to its upper right position. At the next step shown in Fig.4d, the rack 27 settles down to its lower right position, the cassette being fitted onto the next projection of a plurality of projections 24, and further the rack 27 slips through the recesses 32 in the fixing element 30 and comes back to the lower left position, the cassette 26 being shifted by one to the right. The above described cyclic cassette transposition continues until the cassette manipulator is completely filled with cassettes. The control system monitors the cassette manipulator operation and when the last but one position in the cassette manipulator is occupied by a cassette, the operator is signaled to recharge the manipulator, or the system is halted until the operator returns. Detailed description of the container manipulator

In Fig.5 a detailed perspective view of a container manipulator is shown. The container manipulator (which is commonly called the "tube manipulator" where tubes are used as containers) holds two cassettes, one input cassette 51 which shall be filled with tubes when in operation, and one empty output cassette 52. The tube manipulator comprises tube extractor pins 53; releasing mechanism 54 to unlock a tube lock 55 which is located on a cassette and retains tubes from falling out of a cassette; and clamps 56 and 57 for holding a tube and imparting the tube the required position.

The tube manipulator can be adjusted to proceed with the tubes and the tube cassettes of different length, therefore the tube manipulator is provided with an adjusting means 58 permitting the extension of the distance between guides 59 of cassettes 51 , 52 to accommodate tubes of a larger length.

Typically, the container manipulator is assembled with the cassette manipulator and operates in conjunction with the operation of the cassette manipulator. Similar assemblies consisting of at least one cassette manipulator and at least one container manipulator, or for example of a container manipulator operating solely in the case of a small number of ICs to be handled, may be used in the discharge means or as a part of similar automaton.

The input of the tube manipulator is coupled to the cassette output of the cassette manipulator or the tubes can be supplied manually by the operator. The use of the tube manipulator connected to the input of the elevator provides a speedy feed-up of groups of ICs to maintain a throughput of up to 40,000 units per second. The tube manipulator is inclined at an angle from 20 to 45° to the horizon, preferably about 30-35° to the horizon, to enable IC discharge under gravity.

The tube manipulator starts to operate upon receipt of a request from the testing means. Upon request, the releasing mechanism unlocks the spring lock 54 so as the lowermost tube falls down within the operation range of the extractor pins 53 which pushes the tube further into the operation range of the clamps 56, 57. The clamps 56, 57 are preferably made of a spring material, one of them, herein clamp 56, being adjustable to the container length. The clamps 56, 57 are driven, preferably pneumatically, upwards and towards each other so as to engage the lowermost tube and settle it in a discharge position when the opening in the tube coincides with a discharge window in the lower tube guide.

The tubes filled with the ICs are extracted one by one from the input cassette 51 by means of clamps 56, 57. After discharging, each next emptied tube is stacked into the output cassette 52. Output cassettes filled with empty tubes are taken out of the tube manipulator either by means of a cassette manipulator or manually. Detailed description of the first elevator device

Fig.6 illustrates a side view of a distributing means preferably implemented according to the invention in an elevator device. The elevator device is provided with an external thermostat means (not shown) to adjust the ICs temperature to the temperature of a testing zone. The temperature may be maintained e.g. by a jet of warm air or cold air. The area in which the temperature of ICs is increased gradually is called a soak area and includes the elevator device and accumulating zone of the test guideways of the test manipulators. An operating temperature at the testing position is controlled by the control system (not shown). The input guideway 61 and a first elevating device are shown in Fig.6. The first elevating device has inclined troughs 64 equally spaced on an elevator belt 62 mounted on two wheels, the lower wheel 63 being connected to a drive means, for example, an electric motor. The input guideway 61 is in register with the lowermost of troughs 64. The troughs may be formed from a single sheet of a metal foil shaped so as its one side forms a groove, while the other side is bent over to form a "roof retaining semiconductor device from accidental falling out, or from another material, e.g. plastic, which may be shaped to hold ICs and affixed to an elevator belt in incline.

A thermo insulating housing 65 covers the elevator device to maintain the desired temperature within the soak zone. A number of locks 66 are arranged in the upper part of the elevator device to prevent semiconductor devices from sliding off the troughs before they reach the distribution positions that correspond to the testing guideways of the test manipulators.

Sixteen uppermost troughs 64 are in register with the upper ends of sixteen testing guideways 81 , respectively. Each testing guideway has eight testing positions. Thus, the number of the testing positions is one hundred and twenty-eight. The upper portions of the testing guideways are separated from the testing positions by movable retainers, thus defining an accumulating zone on each testing guideway.

The elevator device operates as follows. ICs are fed into the guideway 61 of the elevator where the flow is divided into portions (typically each portion comprised of 8 ICs) and the first portion is passed into the lowermost trough of the elevator.

After the lowermost input trough 64 is filled, the elevator drive wheel 63 drives the belt one trough upper and the next trough is positioned opposite the input guideway 61. The elevator drive 63 lifts the troughs 64 which are fixed to an elevator belt 62 to the upper part of the elevator which is shown in detail in Fig.7. When the 8^th trough filled with the ICs reach the upper part of the elevator, all the 8 upper troughs are unloaded by allowing electronic circuits to slide under gravity from the elevator troughs 64 (in total 8x8 ICs) which are inclined in parallel along the guideways of test manipulators into the accumulating zone of the tester. To this end, the controlling computer's timing circuitry determines the time when 8 troughs reach the upper part of the elevator and opens the catches 66 to allow the electronic elements to slide into all the 8 test guideways. Alternatively, when it is desirable to increase the soak time, not all the 8 upper troughs are unloaded, but, e.g. the even troughs only, while the odd troughs are allowed to pass through the soak zone for the second time and unloaded at the next cycle only. In this case the soak time may be increased by two times, three times, etc. To prevent semiconductor devices from slipping down from the other end of the trough, it is provided with the second catch 66 (not shown in the figure). Detailed description of the test means

According to the preferred embodiment of the present invention, the test means comprises the inclined test guideways for sliding ICs therealong by gravity, sockets for connecting the ICs with a test header (not shown), and test manipulator for bringing the ICs into contact with the sockets.

The inclined test guideways are arranged in parallel rows and spaced vertically and transversely to their sliding surface. Fig.7 is an exploded perspective view showing a part of the test guideway and test manipulator in detail. Preferably, each guideway consists of a lower rail 71 having a sliding surface for providing the smooth and fast sliding of the ICs down the guideway, and the upper rail 72 for preventing ICs from falling out the test guideway. The upper and lower rails 72, 73 have hollows to locate sockets. A plurality of socket connectors for holding ICs at testing positions and electrically connecting ICs to the test head, each socket comprising a movable part 73 and a fixed part 74, are arranged along the test guideways so as their openings are faced ICs that are sliding down the test guideways by gravity. The sockets may be positioned over the ICs as shown in the drawing, or, alternatively, the guideways with ICs sliding therealong may be positioned over the sockets. Further, the test manipulator and test guideways will be discussed in relation to a perspective view shown in Fig.7 taken in conjunction with bottom elevational views presented in Figs.8a-8c and cutaway views shown in Figs.10a-10b.

Fig.8a is a bottom elevational view showing the sockets 73,74 arranged in a row over a guideway 71 ,72 for guiding ICs and installed in a socket board 81 , which is typically made in the form of a printed circuit board having contacts printed at the ends 82 for connecting the socket board with the test header (not shown). As shown in Fig.10b, the electrical contacts 85 in the upper part 74 of the socket are connected with the wiring of the socket board 81.

The socket board may be adapted for a respective test header. Thus, the apparatus of the present invention may be easily operated in conjunction with different test headers depending on the requirements of the user. Another advantage of using the socket board 81 is that it reduces substantially the distance between the test header and the sockets 73,74 so that even if a high frequency signal is applied, no undesirable jitter would occur thus enabling precise testing of a high speed operating devices. However, other connecting devices for connecting sockets with the test header may be used without departing from the scope of the present invention.

The socket unlocking/locking means which is preferably pneumatically driven and adapted for unclasping/clasping the sockets 73,74 is shown in Fig.7 and also in cutaway views in Figs. 10a and 10b.

The socket unlocking/locking means comprises a movable plank (which can be seen in Figs.10a, 10b), preferably pneumatically driven, having two rows of teeth 75 arranged in pairs so as each two pairs are located beneath the movable part 73 of the socket. Alternatively, the plank may consist of two parts 97 and 98 with a common holder 99, each part having one row of teeth 75; other modifications are possible within the scope of the present invention.

Referring back to Fig.7, an up/down pusher means 78,79 for pushing IC into respective sockets are shown comprising an upper part and a lower part provided with end plates. Fig.8b is a bottom elevational view of the test guideway in conjunction with a plurality of the up/down pusher means 78,79 for pushing ICs into the respective sockets shown as they are positioned along the guideway. The up/down pusher means comprises a plurality of double plungers consisting of the bottom spring-loaded plunder 78 having a relatively rigid coil spring 83 (shown in Fig.10b), for pushing the IC 70 to be tested into the socket 73,74, and an upper spring-loaded plunger 79 having a relatively slack coil spring 84 (shown in Fig.10b) for fixing IC in the socket and the subsequent pushing of the tested IC out of the socket. The upper plunger 79 is extended through an opening located centrally in the upper fixed part 74 of the socket.

The test manipulator further comprises a stopper means and a sensor means discussed below with reference to Figs. 7, 8c, 10a and 10b.

The sensor means 76 is preferably an optical sensor, e.g. fiber-optic indicator. The sensor means 76 preferably consists of a plurality of fiber-optic indicators having upper part and a bottom part with a passage therebetween to pass the ICs moving along the guideway 71 ,72. The stopper means comprises a plurality of curved hooks 77 positioned movably along the guideway 71 ,72 so as to stop the ICs from sliding down the guideway exactly beneath a respective socket 73,74. The stopper means are preferably pneumatically driven, with each curved hook 77 being separately activated after a respective fiber-optical indicator 76 has signaled of an IC presence beneath a respective socket.

Fig.8c shows the upper part 72 of the IC guideway in conjunction with a plurality of stopper means 77 for locking ICs and sensor means 76 for determining the presence or absence of an IC on the guideway, in particular, at a test position. In Fig.10a the stopper means is shown back of the IC 70 which is shown on the lower guideway 71 , while in Fig.10b the stopper means 77 is shown in front of the IC 70.

Fig.9 shows a front view (left) and a cutaway view (right) of a testing manipulator according to the invention, Figs.10a and 10b being exploded cutaway views from Fig.9. The test manipulator is adapted to operate on a plurality of test guideways 71 ,72 for guiding ICs sliding therealong and on a plurality of socket connectors 73,74 for holding ICs at testing positions and electrically connecting ICs to the test head. There are one hundred and twenty-eight sockets 73,74 respectively disposed over the testing positions of the testing guideways. As mentioned above, the number of the testing guideways is sixteen; therefore, the sockets 73,74 are arranged in sixteen parallel rows, eight sockets in each row. The sockets are equally distributed between the two testing manipulators, thus each manipulator operates in eight rows of sockets, totally sixty-four sockets. In this embodiment, rows of sockets served by different test manipulators alternate. However, sockets may be arranged and distributed between manipulators in another way.

According to a preferred embodiment, the sockets 73,74 are arranged in rows in parallel to the test guideways 71 ,72 with their openings facing the ICs sliding along the guideways, as has already been mentioned. The odd test guideways and a respective plurality of socket connectors are arranged within operational access of one test manipulator frame 91 provided with two pneumatic drives 93, 94, wherein the even guideways and a respective plurality of socket connectors are arranged within operational access of the second test manipulator frame 92 provided with two pneumatic drives 95, 96 as shown in Fig.9. In each pair of two pneumatic drives, one is adapted for driving the socket unlocking/locking means 75 and another for driving the pusher means 78,79.

The sockets 72 of the first and second manipulator frames are connected via a relay to a common transmitter, i.e., source of test signals, and a common receiver. The number of sockets is equal to the number of the testing positions of the tester. The test manipulator has a module structure with a variable amount of guideways for testing ICs; preferably, each manipulator frame has eight test channels (guideways) and operates independently. This allows to prepare the next group of ICs for testing when the current group of IC is under test, thus avoiding downtimes of the tester.

The test manipulator operates as follows. During loading, the 64 ICs (8 in each guideway x 8 guideways, for example, odd, i.e. 1^st, 3^rd, 5^th,7^th, 9^th, 11^th, 13^th and 15^th guideways) from the elevator device are allowed to slide along the guideways 71 ,72. When the first IC in each 8 rows reaches the lowermost test positions on a respective guideways, the respective optical sensor means 76 signals to the stopper means which locks the IC in this position preventing from slipping down. When, similarly, all the 64 ICs are placed in the odd guideways, each IC opposite the corresponding socket of the sockets 73,74 arranged, opposite the odd guideways frame 91 , the control system (not shown) starts pneumatic drive 94, which opens the sockets in odd guideways. Then, the IC allocation is adjusted in relation to these sockets (or, alternatively, the socket's allocation in relation to the IC position), e.g. by pushing the ICs into the sockets by means of pneumatic drive 95 and then the connection is checked to be effected with a desired force. Alternatively, IC sockets may be moved onto the ICs into a position in which socket connectors join the ICs contacts. However, according to a preferred embodiment of the invention, ICs are pushed in a position in which they are contacted with the socket connectors.

During the period when the current lot of ICs in odd guideways is under the test, the next lot of ICs is allowed to slide down the even guideways to their respective testing positions by opening locks up the test portion of respective guideways of the elevator distribution means; the respective pneumatic drives unlocks the sockets in even guideways and pushes ICs in even test positions.

After the test is completed in odd guideways, the controlling computer electrically switches the test header from the sockets in odd guideways (that are installed within a frame 91) to the sockets in even guideways (within a frame 92) in which a new lot of ICs is already installed, as described above. As a result, the total time required to disconnect one group of ICs from the tester and connect the other group of ICs with the tester is reduced to about 10 seconds, preferably not more than 5.2 second that increases the throughput of the tester greatly. The accumulating zone of the processing and sorting apparatus according to the invention comprises the upper portions of testing guideways provided with locks to prevent ICs from slipping down into the test zone until the testing apparatus is ready to test the next batch of ICs. The length of this guideway portion and, hence, the accumulating zone capacity, is chosen so as to provide accumulation of the number of ICs sufficient to avoid the necessity of complex synchronization of the operation of the tester and the elevator. Detailed description of the sorting means

The sorting means comprises a second elevator device, a receiving guideway, a velocity adjusting mechanism and a plurality of sorting guideways each provided with a switching device. The arrangement of the second elevator is similar to the arrangement of the first elevator, therefore, the second elevating device is not shown in detail in the drawings. The differences relate to the operations of loading and unloading the second elevator. Thus, the second elevator is loaded from the sixteen lowermost troughs from the left side of the elevator which are in register with the lower ends of sixteen testing guideways, respectively. Typically, according to a preferred embodiment of the present invention, the second elevator is unloaded by discharging the ICs from the uppermost trough on the right side of the second elevator which trough is in register with the receiving guideway 101. The receiving guideway 101 is used to receive the integrated circuits from the elevating device and move them to the sorting guideways and further via a velocity adjusting mechanism 102 into the sorting guideways 107.

Otherwise, the ICs may be discharged from the uppermost trough on the left side of the elevator, the receiving guideway being disposed also at the left of the second elevator with the advantage that the ICs change their orientation and may be loaded into containers in the discharge means at their respective open ends.

Fig.11 is a side view of the sorting guideways and an exploded view of the upper part of the sorting means according to a preferred embodiment of the invention showing a receiving guideway 101 for guiding ICs coming from the second elevator into the sorting means, and a velocity adjusting mechanism 102 for adjusting the intervals between, and the rate of, the ICs queuing along the receiving guideway into the sorting means. The adjusting mechanism 102 comprises a low speed wheel 103 and a pair of high speed wheels 104 rotating in opposite directions driven by means of a driving wheel 105 via a driving belt 106. The low speed wheel 103 and the pair of high speed wheels 104 are adapted for contacting each IC coming down the receiving guideway 101 and imparting the IC a preselected speed. Due to the speed difference between the wheels 103 and 104, a predetermined interval is formed between each two ICs queuing along the receiving guideway 101. Preferably, the controlled time interval is 30 to 50 ms. According to this example, the low speed wheel imparts the ICs a speed of 0,5 m/s, while the pair of high speed wheels 104 imparts the ICs a speed of 2 m/s.

The sorting means provides for the sorting ICs into groups according to the test results, preferably into 16 groups, but the number of groups is not the limiting feature of the invention and can be adjusted according to the user requirements.

The sorting means further includes a plurality of sorting guideways 107, each guideway being adapted for inserting IC container (for example, a tube container) into it and provided with a container holding means, respectively, (not seen in the drawing) and a switching device 109, 110, 111 and 112. The container holding means is typically made in the form of a spring clamping device, preferably, a double spring clamp enclosing the tube tightly to ensure the tube is fixed safely in the guideway, however, any other tube holding means may be used to fix the tube in the sort guideway.

The switching device comprises an IC position indicator 109, preferably, an optoelectronic indicator, typically, an opto-couple as shown in the drawing, for detecting the presence of an IC at the input of the guideway; a stopper 110 to prevent an IC from falling down the guideway until the tube is inserted into it, a tube indicator 111 , preferably, a microelectronic sensor, typically, a contact sensor, for detecting either presence or absence of the tube in the guideway; and a blowing means 112 for blowing air at the bottom of the IC to change the direction of its movement and facilitate IC entering the selected sort guideway.

The sorting means operates as follows. The IC enters the sorting means and continues to move down the receiving guideway 101 until it is detected by the IC position indicator 109. When the IC approaches the desired sort guideway 107 being selected by the controlling computer depending on the test results, the computer operates to open one of the stoppers 110 while the corresponding blowing means 112 blows air underneath the IC. The air flow changes the direction of movement of the IC and presses the IC to the upper wall of the guideway to cause its sliding therealong into the selected sorting guideway. The guideway walls are made of a smooth strong material so that ICs move freely along them. The IC is moved by air flow until it falls down by gravity into a respective container (tube) inserted into the sorting guideway. According to a preferred embodiment, the time required for guideway switching is not more than 50 ms, more preferably not more than 20 ms. Alternatively, according to another embodiment, the second elevator device may operate as the sorting means solely. In this case, the ICs are discharged directly from the troughs on the right of the second elevator, thereby the number of sort groups may be increased up to 50 and more. To this end, openings are made in the right wall of the second elevator which may be used in conjunction with the container holding means, e.g. in the form of a spring clamp as described above, so as to provide the tube containers fixing at the openings. The controlling computer's timing circuitry determines the time when the tested IC revealing certain quality and being the lowermost on a respective trough reaches the desired sort container and releases the IC from the trough by unlocking the catches 66 on the trough thereby allowing the IC to slide down the respective container. One more modification suggests that the sorting of the tested ICs is effected from the number of the upper troughs on the left side of the second elevator. Detailed description of the discharge means

Fig.12 illustrates a discharge means equipped with cassette collectors and container (tube) collectors in different combinations providing effective discharging of tested ICs.

The discharge means provides collecting of the ICs in the containers (tubes) and the cassettes and automatic cassette collection for the highest position group and may comprise one or more (if any) container manipulators and one or more (if any) cassette manipulators.

It is appreciated that the same cassette manipulators and tube manipulators can be used for collecting tubes and cassettes both in the input means and discharge means. These manipulators are intended to increase the unattended operation period by storing cassettes with filled and emptied tubes. A tube manipulator that has been disclosed above in conjunction with the description of the input means may be used as a container collector with the difference in that 8 empty tubes are inserted in the manipulator at an initial stage.

Similarly, a cassette manipulator that has been disclosed above in conjunction with the description of the input means may be used as a cassette collector in the discharge means. To this end, an empty cassette manipulator is inserted in a sort guideway that is likely to receive a greater amount of tested ICs.

In Fig.12a a discharge means arrangement is shown schematically, wherein three sort guideways are equipped with cassette collectors.

In Fig.12b a discharge means is shown, wherein the first sort guideway is equipped with a cassette collector, while four guideways are equipped with tube collectors, and seven channels have tubes inserted therein. This arrangement may be employed when it is known that one sort group (in this case, the first sort group) is much larger than the others and 4 sort groups are larger than the other 7. Thus, the total number of sort channels is 12 (1 + 4 +7). In Fig.12c a discharge means is shown, wherein the first, the second and the fifth sort channels are equipped with cassette collectors, while 13 other channels have tubes inserted therein, thus forming in total 16 sort channels.

In Fig.12d a discharge means is shown, wherein the first and the second sort channels are equipped with cassette collectors, while 14 other channels have tubes inserted therein, thus also forming in total 16 sort channels.

In Fig.12e a discharge means is shown having 12 sort channels, wherein one sort channel is equipped with cassette collector, other 11 channels are equipped with tube collectors.

In Fig.12f a discharge means is shown having 8 channels, wherein two sort channels are equipped with cassette collectors, and 6 sort channels are equipped with tube collectors.

It shall be understood that the present handler can process semiconductor devices in accordance with wide variety of categories and test results, and that the above are merely examples of the sorting capabilities of the handler. A computer system for controlling the operation of the processing and sorting apparatus of the present invention is illustrated in Fig. 13.

It shall be understood that the operation of the present handler are controlled and directed by the computer control system operated according to a computer program product. In particular, the mechanical movements of the various devices and mechanisms of the handler, including the loading and unloading means, elevating devices, test accumulators and test manipulators, sorting means and discharge means and sequencing, are directed by this software utilized by the control system. Once these features of the present invention are understood, the writing of this software is within the abilities of one of ordinary skill in the art.

Furthermore, the mechanical movements of the various mechanisms and devices can be actuated pneumatically, electrically or by other means, as is apparent to one skilled in the art. All paths of the IC are monitored during the operation of the handler and each IC is traced starting from unloading a cassette at the loading means and up to the discharge of the IC in the discharge means.

Each system module is completely self-contained, allowing common modules to be assembled, checked out and calibrated without regard for the specific system in which it will be used. This approach reduces the module cost and allows users to replace the defective modules quickly without further set-up, adjustment or calibration.

The possibility of using standard common devices and modules minimize the expense of custom-modified systems to meet specific customer requirements.

The modular design approach simplifies the maintenance of the handler. The defective modules may be "repaired by replacement", thus reducing system downtime and minimizing maintenance personnel requirements.

It shall be also appreciated that the above are example embodiments only and that various modifications may be made to the embodiments described above within the scope of the present invention.

Claims

CLAIMS:

1. A semiconductor device processing and sorting apparatus in which a plurality of semiconductor devices is tested simultaneously, the apparatus comprising: inclined guideways for guiding the semiconductor devices, each inclined guideway having a sliding surface for sliding semiconductor devices therealong by gravitation, the semiconductor devices being arranged on the guideway so that their smallest dimension is transverse to the sliding surface, the inclined guideways including an input guideway for guiding semiconductor devices into the apparatus; testing guideways for guiding semiconductor devices to predetermined testing positions, said testing guideways being spaced in the direction transverse to their sliding surface; and sorting guideways for guiding semiconductor devices of different sort groups into respective containers; a loading means for placing a container of a plurality of containers for semiconductor devices in a position for unloading the semiconductor devices from a container into the input guideway; a distributing means for distributing the semiconductor devices from the input guideway to the testing guideways; a testing means for simultaneously testing a plurality of semiconductor devices at predetermined testing positions;

a sorting means for receiving the tested semiconductor devices from the testing guideways and moving each tested semiconductor device according to its test results to a respective sorting guideway; and a discharge means for placing a container of a plurality of containers for semiconductor devices in a position for loading semiconductor devices of each sort group into the respective container.

2. A processing and sorting apparatus according to claim 1 , further comprising thermostat means for adjusting the temperature of the semiconductor devices to the test requirements, the thermostat means including a thermally insulated soak zone.

3. A processing and sorting apparatus according to claim 1 or 2, wherein the distributing means and testing means are located in the said soak zone.

4. A testing and sorting apparatus according to any one of claims 1-3, wherein the distributing means is constituted by a first elevating device.

5. A processing and sorting apparatus according to claim 4, wherein the elevating device comprises a conveyor means for moving a plurality of inclined holding means, each holding means having a sliding surface for sliding semiconductor devices therealong, the holding means being spaced in the direction transverse to their sliding surface.

6. A processing and sorting apparatus according to any one of claims 1-5, wherein the testing guideways are spaced vertically.

7. A processing and sorting apparatus according to any one of claims 1-6, wherein the input guideway, the distributing means, the testing guideways and the sorting means are arranged in a vertical plane.

8. A processing and sorting apparatus according to any one of claims 1-7, wherein the testing means comprises a plurality of sockets arranged along the testing guideways and electrically connected to a testing device.

9. A processing and sorting apparatus according to any one of claims 1-8, wherein the testing means comprises a testing manipulator for connecting the semiconductor devices sliding along the testing guideways with the sockets.

10. A processing and sorting apparatus according to any one of claims 1-9, wherein the number of testing positions defined by the sockets is a multiple of the number of semiconductor devices which may be tested at a time by the testing device, and the number of the testing manipulators is equal to this multiple.

11. A processing and sorting apparatus according to any one of claims 1-10, wherein the loading means includes a container manipulator for moving a container of a plurality of containers in a position for loading semiconductor devices into the input guideway.

12. A processing and sorting apparatus according to any one of claims 1-11 , wherein a plurality of the containers is held in a cassette, and the loading means further includes a cassette manipulator for moving the cassette in a position for taking one of the containers by the container manipulator.

13. A processing and sorting apparatus according to any one of claims 1-12, wherein the sorting means comprises a second elevating device.

14. A processing and sorting apparatus according to any one of claims 1-13, wherein the sorting guideways are spaced vertically.

15. A processing and sorting apparatus according to any one of claims 1-14, wherein the sorting guideways are arranged at the right side of the second elevating device, each sorting guideway being in register with the sliding surface of a respective holding means of the elevating device.

16. A processing and sorting apparatus according to any one of claims 1-14, wherein the sorting means includes a receiving guideway for receiving the semiconductor devices from the test guideways and guiding them to the sorting guideways.

17. A processing and sorting apparatus according to claim 16, wherein the sorting means is provided with velocity adjusting mechanism for imparting a predetermined velocity to the tested semiconductor devices sliding along the receiving guideway.

18. A processing and sorting apparatus according to any one of claims 16-17, wherein the sorting means comprises a switching device for directing each tested semiconductor device moving along the receiving guideway to the desired sorting guideway.

19. A processing and sorting apparatus according to claim 18, wherein the switching device includes switching keys respectively associated with the sorting guideways, each switching key comprising a blowing means adapted to provide air flow for carrying semiconductor devices from the receiving guideway into the sorting guideway.

20. A semiconductor device processing and sorting apparatus in which a plurality of semiconductor devices may be tested simultaneously, the apparatus comprising: inclined guideways for guiding the semiconductor devices moved therealong by gravitation, the guideways including an input guideway, testing guideways and sorting guideways; a loading means for placing a container of a plurality of containers for semiconductor devices in a position for unloading the semiconductor devices from the container into the input guideway; a distributing means for distributing the semiconductor devices from the input guideway to the testing guideways; a testing means for simultaneously testing a plurality of semiconductor devices at predetermined testing positions on the testing guideways, the testing means including a testing device for applying a test signal of test signals of a predetermined pattern to the semiconductor devices under test, receiving response signals and attributing each tested semiconductor device according to its test results to one of sort groups; and at least one testing manipulator for bringing the semiconductor devices under test into contact with the testing device; the number of the testing positions being a multiple of the number of semiconductor devices which may be tested at a time by the testing device, and the number of the testing manipulators being equal to this multiple; a sorting means for receiving the tested semiconductor devices from the testing guideways and moving each tested semiconductor device according to its test results to a desired sorting guideway; and a discharge means for placing a container of a plurality of containers for semiconductor devices in a position for loading the semiconductor devices of each group into their respective container.

21. A processing and sorting apparatus according to claim 20, wherein the testing means comprises a plurality of sockets arranged along the testing guideways and electrically connected to the testing device.

22. A processing and sorting apparatus according to claim 20 or 21 , wherein the loading means includes a container manipulator for moving the container in a position for loading electronic components.

23. A processing and sorting apparatus according to any one of claims 20 - 22, wherein a plurality of the containers is held in a cassette, and the loading means further includes a cassette manipulator for moving the cassette in a position for taking one of the containers by the container manipulator.

24. A processing and sorting apparatus according to any one of claims 20-23, further comprising thermostat means for adjusting the temperature of the semiconductor devices to the test requirements, the thermostat means including a thermally insulated soak zone.

25. A processing and sorting apparatus according to any one of claims 20-24, wherein the distributing means and testing means are located in soak zone.

26. A processing and sorting apparatus according to any one of claims 20-25, wherein the distributing means comprises a first elevating device.

27. A processing and sorting apparatus according to any one of claims 20-26, wherein the sorting means comprises a switching device for directing each tested semiconductor device moving along the receiving guideway into the desired sorting guideway.

28. A processing and sorting apparatus according to claim 27, wherein the switching device includes switching keys respectively associated with sorting guideways, each switching key comprising blowing means adapted to provide air flow carrying the semiconductor device from the receiving guideway to the sorting guideway.

29. An apparatus for processing and sorting a plurality of semiconductor devices simultaneously, comprising: inclined guideways comprising a sliding surface for guiding the semiconductor devices therealong by gravitation, the guideways including an input guideway, testing guideways, a receiving guideway, and vertically spaced sorting guideways; a loading means for loading the semiconductor devices from a container into the input guideway; a distributing means for distributing the semiconductor devices from the input guideway to the testing guideways;

a testing means for simultaneously testing a plurality of semiconductor devices at predetermined testing positions; a sorting means for receiving the tested semiconductor devices from the testing guideways and moving each tested semiconductor devices according to its test results to a desired sorting guideway, the sorting means comprising a switching device for directing each tested semiconductor device sliding along the receiving guideway to the desired sorting guideway, the switching device including switching keys respectively associated with the sorting guideways, each switching key comprising blowing means adapted to provide air flow for carrying the semiconductor device from the receiving guideway to the sorting guideway; and a discharge means for placing the container of a plurality of containers for semiconductor devices in a position for loading semiconductor devices of each sort group into a respective container.

30. A processing and sorting apparatus according to claim 29, further comprising a thermostat means for adjusting the temperature of the semiconductor devices to the test requirements, the thermostat means including a thermally insulated soak zone.

31. A processing and sorting apparatus according to claim 29 or 30, wherein the distributing means and testing means are located in said soak zone.

32. A processing and sorting apparatus according to any one of claims 29-31 , wherein the distributing means is constituted by a first elevating device.

33. A processing and sorting apparatus according to any one of claims 29-32, wherein the sorting means is constituted by a second elevating device.

34. A processing and sorting apparatus according to any one of claims 29-33, wherein the testing means includes a testing manipulator for connecting the semiconductor devices under test with a testing device.

35. A processing and sorting apparatus according to any one of claims 29-34, wherein the number of testing positions is a multiple of the number of semiconductor devices which may be tested at a time by the testing apparatus, and the number of the testing manipulators is equal to this multiple.

36. A processing and sorting apparatus according to any one of claims 29-35, wherein the loading means includes a container manipulator for moving the container in a position for loading electronic components.

37. A processing and sorting apparatus according to any one of claims 29-36, wherein a plurality of containers is held in a cassette, and the loading means further includes a cassette manipulator for moving the cassette in a position for taking one of the containers by the container manipulator.

38. A processing and sorting apparatus according to any one of claims 29-37, wherein the sorting means is provided with a velocity adjusting mechanism for imparting a predetermined velocity to the tested semiconductor devices sliding along the receiving guideway.

39. A method of handling semiconductor devices in a processing and sorting apparatus having inclined guideways each having a sliding surface, the method including the steps of loading semiconductor devices from a container into the input guideway of the apparatus, distributing the semiconductor devices from the input guideway to the testing guideways, simultaneously testing a plurality of semiconductor devices at predetermined testing positions, sorting the tested semiconductor devices by receiving them from the testing guideways and moving each tested semiconductor device according to its test results to a respective sorting guideway, discharging semiconductor devices from each sorting guideway into the respective container, wherein the semiconductor devices are loaded into an input guideway and moved, at least partially under the influence of gravity, along said inclined guideways, being oriented so that at each point their smallest dimension is maintained transverse to the sliding surface of the guideway; whereas

the semiconductor devices are moved from one to another inclined guideway being spaced transversely to the direction of their smallest dimension.

40. A method of claim 39, wherein the step of moving the semiconductor devices from one to another inclined guideway includes at least one elevation effected by means of an elevating device.

41. A method of claim 39, wherein the step of moving the semiconductor devices from one to another inclined guideway is effected substantially transversely to the direction of their smallest dimension.

42. A method of claim 39 or 40, wherein the step of elevation is effected in a temperature chamber.

43. A method of any one of claims 39-42, wherein the step of elevation is effected at least twice to achieve the desired temperature of the semiconductor devices.

44. A method as claimed in any one of claims 39-43, wherein the step of moving the semiconductor devices from one to another inclined guideway includes changing the direction of their movement by means of an air flow.

45. A method as claimed in any one of claims 39-44, wherein the movement of semiconductor devices is effected substantially in one plane.

46. A sorting means for receiving semiconductor devices from the testing apparatus and moving each tested semiconductor device according to its test results to a desired container, comprising: a receiving guideway for receiving the semiconductor devices from the testing apparatus and directing them to a plurality of sorting guideways; a plurality of inclined sorting guideways for guiding semiconductor devices therealong at least partially under the influence of gravity;

a switching device for directing each tested semiconductor device sliding along the receiving guideway to the desired sorting guideway, the switching device including switching keys respectively associated with the sorting guideways, each switching key comprising blowing means adapted to provide air flow for carrying the semiconductor device from the receiving guideway to the sorting guideway.

47. A sorting means according to claim 46, wherein the sorting means is provided with a velocity adjusting mechanism for imparting a predetermined velocity to the tested semiconductor devices sliding along the receiving guideway.

48. A sorting means according to claim 46 or 47, wherein the sorting guideways are spaced vertically.

49. A computer program product comprising:

a computer usable medium having computer readable program code means embodied in said medium for enabling the method of handling semiconductor devices in a processing and sorting apparatus having inclined guideways each having a sliding surface, said computer readable program code means comprising: a computer readable program code means for causing a computer to control an operation of loading the semiconductor devices from a container into the input guideway; a computer readable program code means for causing a computer to control an operation of distributing the semiconductor devices from the input guideway to the testing guideways, the semiconductor devices being spaced substantially transversely to the direction of their smallest dimension; a computer readable program code means for causing a computer to control the step of arranging the semiconductor devices movement, at least partially under the influence of gravity, along said inclined guideways, the semiconductor devices being oriented so that at each point their smallest dimension is kept transverse to the sliding surface of the guideway; a computer readable program code means for causing a computer to control an operation of a test manipulator for connecting semiconductor devices sliding along the test guideways to a plurality of predetermined testing positions; a computer readable program code means for causing a computer to control an operation of receiving the tested semiconductor devices from the testing guideways and moving each tested semiconductor device according to its test results to a respective sorting guideway; and a computer readable program code means for causing a computer to control an operation of loading semiconductor devices of each sort group into the respective container.