WO2001020648A3 - Quantum corrections for modeling semiconductor behavior - Google Patents
Quantum corrections for modeling semiconductor behavior Download PDFInfo
- Publication number
- WO2001020648A3 WO2001020648A3 PCT/US2000/040790 US0040790W WO0120648A3 WO 2001020648 A3 WO2001020648 A3 WO 2001020648A3 US 0040790 W US0040790 W US 0040790W WO 0120648 A3 WO0120648 A3 WO 0120648A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- implementation
- semiconductor behavior
- discretized
- corrections
- quantum
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
- G06F30/23—Design optimisation, verification or simulation using finite element methods [FEM] or finite difference methods [FDM]
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
A method for implementation of a model of MOS transistor with enhanced accuracy, with selected quantum effects included. The implementation provides zero current at equilibrium, which corresponds to a differential formulation, in a discretized formulation. At least one of electron concentration, hole concentration and electrostatic potential is reformulated and transformed in this discretized implementation.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US39893899A | 1999-09-17 | 1999-09-17 | |
US09/398,938 | 1999-09-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001020648A2 WO2001020648A2 (en) | 2001-03-22 |
WO2001020648A3 true WO2001020648A3 (en) | 2002-04-25 |
Family
ID=23577424
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2000/040790 WO2001020648A2 (en) | 1999-09-17 | 2000-08-30 | Quantum corrections for modeling semiconductor behavior |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2001020648A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU2002356476A1 (en) * | 2002-08-27 | 2004-03-19 | Freescale Semiconductor, Inc. | Fast simulation of circuitry having soi transistors |
-
2000
- 2000-08-30 WO PCT/US2000/040790 patent/WO2001020648A2/en active Application Filing
Non-Patent Citations (2)
Title |
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DORT VAN M J ET AL: "A SIMPLE MODEL FOR QUANTISATION EFFECTS IN HEAVILY-DOPED SILICON MOSFETS AT INVERSION CONDITIONS", SOLID STATE ELECTRONICS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB, vol. 37, no. 3, March 1994 (1994-03-01), pages 411 - 414, XP001031086, ISSN: 0038-1101 * |
ZHIPING YU ET AL: "Circuit/device modeling at the quantum level", COMPUTATIONAL ELECTRONICS, 1998. IWCE-6. EXTENDED ABSTRACTS OF 1998 SIXTH INTERNATIONAL WORKSHOP ON OSAKA, JAPAN 19-21 OCT. 1998, PISCATAWAY, NJ, USA,IEEE, US, 19 October 1998 (1998-10-19), pages 222 - 229, XP002184978, ISBN: 0-7803-4369-7 * |
Also Published As
Publication number | Publication date |
---|---|
WO2001020648A2 (en) | 2001-03-22 |
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