WO2001020648A2

WO2001020648A2 - Quantum corrections for modeling semiconductor behavior

Info

Publication number: WO2001020648A2
Application number: PCT/US2000/040790
Authority: WO
Inventors: Eugeny Lyumkis; Boris Polsky; Oleg Penziz
Original assignee: Ise Integrated Systems Engineering Ag
Priority date: 1999-09-17
Filing date: 2000-08-30
Publication date: 2001-03-22
Also published as: WO2001020648A3

Abstract

A method for implementation of a model of MOS transistor with enhanced accuracy, with selected quantum effects included. The implementation provides zero current at equilibrium, which corresponds to a differential formulation, in a discretized formulation. At least one of electron concentration, hole concentration and electrostatic potential is reformulated and transformed in this discretized implementation.

Description

QUANTUM CORRECTIONS FOR MODELING SEMICONDUCTOR BEHAVIOR

Field of the Invention

This invention relates to modeling of semiconductor behavior with quantum mechanical effects included. Background of the Invention Since the early 1960s, technology simulation has played a crucial role in the evolution of semiconductor integrated circuit (IC) technology. The initial simulation of fundamental operating principles of key structures, for example, bipolar and MOS transistors, has provided critical insight into the phenomena associate with the scaling of devices and has led to the development of large scale integration (LSI).

At present, technology simulation is best viewed within the framework of an overall IC Electronic Computer- Aided Design (EC AD) system. Starting from the basic fabrication input, — the individual process "recipes" and data to generate lithographic masks and layouts ~ these systems attempt to model a complete circuit from the physical structure of its components through to the estimation of overall system performance. As part of the overall EC AD framework, a Technology Computer- Aided Design (TCAD) system's main components are typically a process simulator and/or a device simulator, with appropriate interfaces that mimic experimental setups as closely as possible. The device simulator's task is to analyze the electrical behavior of the most basic of IC building blocks, the individual transistors or even small sub- circuits, at a very fundamental level. As such, the simulator uses as inputs the individual structural definitions (geometry, material definitions, impurity profiles, contact placement) generated by process simulation, together with appropriate operating conditions, such as ambient temperature, terminal currents and voltages, possibly as functions of time or frequency. A TCAD system's principal outputs are terminal currents and voltages, appropriate for generating more compact models to be used in circuit simulations. A circuit simulator typically defines the interface to higher-level, application-specific synthesis tools. In principle, given a recipe and a set of masks, the TCAD tools themselves can build virtual device structures and then predict performance of entire circuits to a very high degree of accuracy. Modern process and device simulators are capable of rapid characterization, on the order of many structures per hour, as compared to experiments where on is sometimes fortunate to obtain a new structure within a period of a couple months.

At present, TCAD is extensively used during all stages of semiconductor devices and systems manufacturing, from the design phase to process control, when the technology has matured into mass production. Examples of this are discussed by R.W. Dutton and M.R. Pinto, "The use of computer aids in IC technology evolution", Proc. I.E.E.E., vol. 74, no. 12 (December 1986) pp. 1730-1740, and by H. Hosack, "Process modeling and process control needs for process synthesis for ULSI devices", (in) ULSI Science and Technology (1995). As a result of its application, TCAD offers enormous acceleration of the prototyping process for devices, integrated circuits and systems, because expensive manufacturing and metrology can be reduced to a minimum, or even become superfluous. Existing technologies, which are accurately represented in a TCAD environment, can be extrapolated into regions of more aggressively scaled down design rules.

A successful TCAD implementation depends upon at least three factors: a realistic physical model, an adequate numerical method for analysis of the physical model, and robust and reliable software. Where new features, such as quantum effects, are introduced into a physical model, the numerical method(s) used often must be changed to preserve adequacy of the numerical analysis.

As the oxide thicknesses for MOS transistor gates are decreased and doping concentrations become higher near a semiconductor/oxide interface, such as Si/Siθ2, a large electric field develops transverse to the interface surface. This transverse field can quantize electron motion in this direction, and some quantum mechanical effects can appear that have no classical counterpart. When these quantum mechanical effects are incoφorated in an implementation of a model of transistor behavior and a classical formulation of quantities such as current density and charged particle density is maintained, inconsistencies can appear in a discretized implementation. One important example of such inconsistency is the appearance, in some circumstances, of non-zero current density in equilibrium. Equilibrium occurs, for example, in an MOS transistor when a non-zero gate voltage is applied but no non-zero source-drain voltage and no non-zero substrate voltage is applied: electron and hole components of electrical current through each of the source electrode and the drain electrode, total current through each electrode, and current density at each electrode should remain zero in this situation. What is needed is an approach that takes account ofthe relevant quantum features in an MOS transistor model but maintains consistency in the implementation by reproducing common sense results. Preferably, this approach should still allow mathematical determination of device behavior with the appropriate quantum features included and should be flexible enough to allow other features to be added and studied, where quantum effects are included.

Summary of the Invention

These needs are met by the invention, which provides a corrected implementation of a discretized model of semiconductor behavior with selected quantum effects included. The corrected implementation takes into account quantum effects, provides an expression for bandgap widening through inclusion of an extra term in the bandgap, and does not disturb the fundamental properties of the differential equations that govern system behavior.

The value ofthe extra bandgap term may be computed using results from a quantum mechanical analysis developed by van Dort et al in "Influence of High Substrate Doping Levels on the Threshold Voltage and the Mobility of Deep-Submicrometer MOSFETs", I.E.E.E. Trans. Electron Devices, vol ED-39 (1992) 932-938, and in "A Simple Model For Quantisation Effects In Heavily Doped Silicon MOSFETs at Inversion Conditions", Solid State Electronics, vol. 37 (1994) 41 1-414. This analysis produces an increased energy gap that must be accounted for in order to obtain the correct modeling behavior. A related quantum model has been studied by Hareland et al in "A Computationally Efficient Model for Inversion Layer Quantization Effects in Deep Submicron N-Channel MOSFETs", I.E.E.E. Trans. Electron Devices vol. ED-43 (1996) 90-96.

Brief Description of the Drawings

Figure 1 illustrates the relationship of a coordinate system to the interface surface of an MOS transistor gate interface.

Figure 2 is a graphical view of the electrical potential for unbound electrons near an Si/Siθ2 interface surface.

Figure 3 is a graphical view of the unbound electron density near an Si/Siθ2 interface surface, calculated for the electrical potential shown in

Figure 1.

Figures 4 and 5 are comparative graphical views of drain current versus gate voltage for two implementations ofthe model.

Figure 6 is a comparative graphical view of variation of drain current density for an MOS transistor with applied gate voltage, with and without quantum effects included. Figure 7 is a graphical view of charged particle concentration near an oxide-semiconductor interface surface, with quantum effects included. Description of Best Modes of the Invention

Use of gate oxide regions in transistors of decreasing thickness, in some instances less then 6 nanometers (nm), often requires use of very high substrate doping concentrations, either uniform or graded, in order to suppress leakage current and other device degradation. However, use of doping concentrations above about 1017 cm^_3 can produce a material in which the lowest allowed energy level for a charged particle lies above the bottom of the conduction band and requires a quantum mechanical analysis to correctly model the behavior at relatively low energy levels. Van Dort et al, op cit, have studied the effects of high substrate doping concentrations on threshold voltage of, and mobility in, a deep submicron MOSFET with gate oxide thicknesses of 13.3, 9.4, 7.6 and 5.9 nm for an n-type device. A review of a van Dort-type quantum mechanical model is appropriate here. An (x,y,z) Cartesian coordinate system, as illustrated in Figure 1, is adopted here, relative to an oxide-substrate (e.g., Siθ2 Si) interface surface of an MOS transistor gate. The z coordinate is measured approximately perpendicular or transverse to the surface (planar or otherwise) of the oxide- substrate interface surface.

The development begins with an analysis of the one-dimensional Schrodinger's equation for a wave function Ψ = Ψ(z;E) for a negative charge particle (e.g., an electron) in an electrical field

-(h2/4¹m*)(d2ψ/dz2) + V(z) - E Ψ = 0, ( 1 ) V(z) = -q ε z, (2) where ε is the electrical field measured in the z-direction, q is the unit of electron electrical charge, h is Planck's constant, m* is an effective charged particle mass and E is an energy eigenvalue associated with the wave function Ψ. A solution for Eq. (1 ) that vanishes as z tends to ° is

Ψ(z;E) - AA(z+E/qε) Jι/3(32¹2_m*qε/9h2)l/2 (z+E/qε)3/2, (3) where J±\β(z) is a Bessel function of the first kind of order ±1/3. The coefficient A may be chosen so that Ψ(z;E) is normalized: ° ° Ψ(z;E)2 dz = l . (4)

The energy eigenvalues are the values for E for which the wave function vanishes at the interface surface z = 0:

Ψ(z=0;E)

= A A(E/qε) Jι/3[(32^l2m*qε/9h2)l/3 (E/qε)p/2 = 0. (5) The first few positive values w corresponding to Jl/3(w) = 0, are 2.9026,

6.0327, 9.1705 and 12.3102, from which positive eigenvalues can be computed.

The wave function Ψ(z;E) can be used to estimate unbound electron density n(z) = No Ψ(z;E)2 in the Si material, where No is the expected number of unbound electrons (roughly, the number of dopant particles present) in the substrate material. The condition imposed in Eq. (5) requires that the unbound electron density vanish at the interface surface. Figures 2 and 3, reproduced from the 1994 van Dort article, op cit, show the electric potential V(z) assumed and the calculated electron density n(z), respectively, for a conventional (classical) approach and a quantum mechanical approach.

Electron motion perpendicular to an oxide-substrate interface surface with a heavily doped semiconductor substrate is expected to be quantized, and the electron work function Φ(qm) (computed quantum mechanically) differs from the conventional or classical electron work function Φ(cl) because ofthe appearance of two additional terms

Φ(qm) = Φ(cl) + JEE_g/q + ε JEz, (6) where ^EEg (>0) is an energy increment between the conduction band bottom and the lowest allowed (quantized) energy level and JEz is an increase in average distance (as compared to the classical distance) from the interface surface of an unbound electron within the substrate material. The quantity E σ will depend upon the local electrostatic potential and may vary with the coordinates x, y and/or z. The term ε^z can be estimated by taking only the first sub-band energy into account, and one finds that qε^Ez A (4/9^EEg. The bandgap is thus widened by about

Φ(qm) - Φ(cl) A λ JEE_g , (7) and van Dort et al indicate that the energy increment can be estimated by ^E_g = γ ε_Si/(4 q kβT)^1/3(ε - ε_crit)^2/3, (8) where γ and ε_crjt are fitting parameters, ε§j is the silicon dielectric constant, kβ is Boltzmann's constant and T is temperature. Here, λ is a suitable numerical value (e.g., λ A 13/9). In a classical formulation, one expects that EEσ is zero.

Because each of the second and third term on the right in Eq. (6) is positive, the threshold voltage for an MOS transistor, computed quantum mechanically, is larger than the conventionally computed (classical) threshold voltage (Figure 6), and the oxide thickness is effectively increased, when certain quantum mechanical effects are accounted for. This increase in effective oxide thickness can become important where the thickness is small (e.g., less than 10 nm). The qm-determined bandgap is larger than the conventionally determined bandgap by the (positive) energy increment

An x-component of current density for negatively charged particles, J_{x e}, for charge flow in a chosen (x-axis) direction, which extends approximately parallel to the semiconductor/oxide interface surface, is given by

Jχ,e = μ_nkBTfl[n/ x) - q n (Wlfx), (9) in a differential formulation, where n(x,y,z) is charge carrier density or concentration, φ(x,y,z) is electrostatic potential and μ_n is electron mobility.

Similar equations apply for the y- and z-components of current density.

An analysis of behavior of current density in the situation discussed above is set forth here to illustrate one important property of an implementation of a model of MOS transistor gate behavior. In the differential formulation, with or without quantum effects included, the equilibrium electron density is found to be related to the electrostatic potential φ(x,y,z) by the relation n(x) = K expqφ(x)/ kβT, ( 10) where K is a suitable constant. By substituting n(x) from Eq. (10) into Eq. (9), one can verify that the current density vector J, computed according to Eq. (9) in a differential formulation, is zero. Attention is restricted here to a one- dimensional situation (x-coordinate only) to illustrate the problem and its treatment. A conventional discrete formulation of Eq. (9) can be written in the form

Jχ,e,j+l/2 A q μ_nj+l/2 kβTj+l/2n(xj+l ) B( Eφj+ι/2)

= qφ(xj+ι;cl) - φ(xj;cl)/kBTj+ι/2, (13) hj = x_j+l - xj. (14) where x is a location coordinate measured in a selected direction and φ(x;cl) is the classic electrostatic potential. Here, a variable having a subscript with index j' ( = j, j+1/2, j+1) corresponds to the value of that variable at the grid location x =

The electrostatic potantial φ has a different meaning in a classical formulation and in a quantum mechanical formulation. In a classical formulation of drift-diffusion action, φ(x;cl) is an electrostatic potential for a charged particle. In a quantum mechanical formulation of drift-diffusion action, such as the van Dort model, the analogous quantity is β(x) = φ(x;qm) = φ(x;cl) - λ^E_g/q, (15) where ^Eg may vary with location coordinates x, y and/or z and with the local electrical field. A correct implementation of a physical model of semiconductor behavior should include several essential properties. One such essential property is that of zero current density in equilibrium. For example, where a gate voltage is applied at an MOS transistor but no non-zero source- drain substrate voltage is applied, the current density should be zero, for electrons, for holes and for total current.

Assume that the electrostatic potential is known in the classical and quantum mechanical formulations, respectively. One easily verifies that the expression for charge carrier density in Eq. (10), when substituted into Eq. (9), produces zero current density J_x , in a differential classical formulation and in a differential quantum mechanical formulation. The choice of charge carrier density n(x) in Eq. (10) also produces zero current density J_x for the discretized classical formulation.

However, this zero current density result is not uniformly true for the discrete, as opposed to differential, formulation, where the quantum mechanical correction, -JEEσ/q, is included in a modified potential function β(x), as in Eq. (15). In the discrete quantum mechanical formulation, the charge carrier density can be re-expressed as n(xj) = K expqφ(xj;cl)- λJEEg^fkQ Ϊ

= κ expqβ(xj)/ kβTj, (16) which has the same form as Eq. (10) for the classical situation, with φ(x;cl) replaced by β(x) = φ(x;qm). Here K is a suitable numerical value. The potential difference ^φ(x;cl), defined in the classical situation in Eq. (13), is replaced by a potential difference

= qβ(xj+l ) - β(xj)/kBT_J+l/2, (17) in the expression for current density in Eq. (10), where it should be recalled that the energy increment ^Eg may vary with location.

The correction term ^EEg j , present implicitly in the exponent in Eq. (16), may depend upon the local electric field, and hence upon electrostatic potential at two or more spaced apart nodes. It is thus impossible to compute the correction term ^EEg , using only information that is known at a node of the grid, because the correction term ^Eg j depends upon the local electrical field. Other variables, such as the charge carrier density n(xj) and electrostatic potential φ(xj;cl), appear to be local functions, dependent only the value of a variable at a single grid node value x = xj .

Equation ( 11 ), if applied straightforwardly for the discrete quantum mechanical formulation, leads to an MOS transistor current density that does not vanish in equilibrium. Consider the situation where V_source - V^ain ⁼ sub = 0. The non-zero gate voltage Vg_{a e} defines the potential distribution in the device near the oxide-substrate interface surface. Electrical currents at the source and drain terminals should be zero for such conditions. Where a non- symmetric grid of 1600 nodes or of 8400 nodes (1.6 and 0.4 separation, respectively) is imposed, computations of drain current as a function of gate voltage (0 ² Vg_at_e ² 2.0 volts) produce the numerical results shown in Figure 4.

The (uniform) acceptor concentration for these computations is 5x1017 cm^_3 and the gate oxide thickness is 5 nm. These computations indicate that substantial non-zero drain current is obtained. As the number of nodes is increased, corresponding to smaller and smaller node-to-node separations, the drain current for fixed gate voltage in this situation tends toward zero but is still far from zero for these situations.

If the grid is made symmetric for the same device and conditions, using either 1600 points or 8400 points, symmetry considerations require that the total current vanish at the terminals, ifthe source-drain voltage is zero.

However, computation ofthe individual electron and hole current densities near a gate edge indicates that these individual current densities are still substantially non-zero, but oppositely directed, in this situation. The total current vanishes through mutual cancellation of electron and hole currents.

The preceding analysis and accompanying numerical computations indicate that a commonly used numerical approach for determining electrical current is wrong and can produce numerical results that are unacceptable in an equilibrium situation, as well as in a non-equilibrium situation. The new approach described here allows these problems to be overcome.

The charge carrier density or concentration is re-expressed here as n(xj) = η(xj) exp-λiΕE_g j/kβTj, (18) where η(x) is a new (transformed) variable to be determined. Using Eq. (9), the current density in a differential formulation becomes Jχ,_e = q μ_n exp-λ^Eg/k_BT(W1!x) - (q kβT) η(x) (1φ T|x).(19)

In a discrete formulation, this current density becomes Jχ,e,j+l/2 = q μnj exp-λ^jΕEg +iβ/kβTj+iβ χη(x_J+l) B(-iEβj+l/2) - η(xj) B(iEβj+ι/₂)/hj , (20) where ^βj+1/2 is defined in Eq. (17). From Eq. (16), one verifies that, if the choice η(xj) = K expqφ(xj;cl)/kβTj (21) is made for the variable η(x), the discretized current density, computed from Eq. (20), vanishes. The combined Eqs. (18) and (21) are equivalent to the desired Eq. (16). Further computations, analogous to those that produced the results shown in Figures 4 and 5, confirm that the current density is zero for any non-zero applied gate voltage and zero source-drain substrate voltage, for arbitrary mesh size, and that the electron and hole current densities are also zero. The re-expression of negative electrical charge density or concentration in Eqs. (19) and (21) is also applied in two-dimensional and three-dimensional situations, and in equilibrium and non-equilibrium situations.

The present invention determines and implements changes for a conventional mode of semiconductor behavior that takes certain quantum effects into account and that ensures that a fundamental property, zero current at equilibrium, is maintained. This is done by providing a different numerical discrete formulation ofthe relevant differential equation(s) and introduction of new expressions for electron and hole concentrations.

Figure 6 illustrates graphically the variation of current density for the MOS transistor with gate voltage Vg_at_e for the classical formulation and quantum mechanical formulation (using the invention), where a small source- drain voltage V_S(j (A 0.1 volt) is applied. Note that the computed threshold voltage VthrCφ¹¹) with quantum corrections included is increased relative to

Vthr(cl) for the classical formulation, by about 0.1-0.2 volts. This appear to reflect the effects of bandgap widening and of modified charge density for the quantum mechanical formulation.

Inclusion of quantization effects for hole motion is also important in some situations, for example, for small size PMOS transistors. Presence of one or more holes in a semiconductor material may be better characterized as a relative positive electrical charge, rather than as an absolute positive electrical charge, arising from the absence of a negative electrical charge (e.g., an electron) where this charge might normally occur.

In a drift-diffusion regime for semiconductor behavior, the current density equation for relative positive charge particles (e.g., holes) is analogous to Eq. (9), where the hole concentration p(x) replaces the electron concentration and the dependence upon location coordinates in other directions (e.g., y and/or z) is again suppressed for clarity. By analogy with the argument for electrons, the electrostatic potential for holes with quantization effects included is taken to be φ(x;qm;h) = φ(x;cl;h) + λJEE_g/q, (22) the hole concentration in equilibrium is taken to be p(x) = Kft exp-qφ(x;cl;h)- λ^Eg/kβT. (23) All preceding considerations remain valid for the hole transport and hole continuity equation approximations, after modification of appropriate signs in these equations.

Figure 8 schematically illustrates an arrangement of computer apparatus 30 suitable for practicing the invention. The apparatus 30 includes: a CPU 31 and associated registers for numerical and logical processing; a data/command entry mechanism 33 (keyboard or similar device) for entering selected semiconductor modeling parameters and similar quantities to be used in predicting and evaluating semiconductor device behavior; a memory component 35 A to receive the parameters entered using the data/command entry mechanism 33; a memory component 35B that stores the software commands used to perform the modeling steps; a visual display 37 (optional) to alphanumerically and/or graphically display the results of such modeling and an I/O interface 39 (optional) used to import data to, or export data from, the apparatus 30. The apparatus 30 may exchange these data with a CD/ROM, an floppy diskette, a hard disk, an internetwork or any other suitable source of destination for these data. Optionally, the computer apparatus 30 includes a memory component 35C that stores the software commands used to help identify one or more regions of a semiconductor device to be modeled. and the hole density is re-expressed here as p(x) = v(x;h) exp-λ^E_g /kβT_j, (24) v(x;h) = Kh exp-qφ(x;cl;h)/kβT. (25)

Quantization of charge carrier motion in a direction transverse to the Si/Siθ2 interface surface causes a splitting of charge carrier energy levels into sub-bands in which the lowest energy level does not coincide with the bottom of the conduction band or with the top ofthe valence band. This sub-band splitting produces a two-dimensional density of states, for quantized motion, that is less than the three-dimensional density of states for a corresponding classical situation. The total charge carrier population (electron or hole) for quantized carrier motion will be smaller than the charge carrier population for the corresponding classical situation with the same Fermi level. This difference will affect the net sheet of charge carriers in an inversion layer at the interface surface and will require a larger gate voltage to produce turn-on for (non-zero) hole current density, as indicated for electron current density in Figure 6.

In a classical treatment of an inversion layer, the charge distribution is peaked at the Si/Si02 interface surface due to (assumed) charge pile-up and high band bending at or near the interface surface. In a system with quantized motion, by contrast, the charge carrier concentration is low at and near the interface surface, and a peak of the concentration variable may occur within the Si, at a location displaced from the interface surface. Figure 7 compares the classical concentration (dashed curve) and the quantized motion concentration (solid curve) computed for holes, indicating a peak for quantized hole motion at a distance of about 13 nm from the interface surface. A similar pair of curves are obtained for classical versus quantized electron motion. For the same applied gate voltage and other conditions, the predicted quantized motion charge concentration is smaller than the corresponding classical motion charge concentration, again indicating that the applied gate voltage for current density turn-on will be greater for quantized charge carrier motion than for classical charge carrier motion.

Various theoretical and practical considerations indicate that, if all other things remain the same: (1) quantization effects for accumulation layers and for inversion layers are both important for many circumstances; (2) quantization effects become progressively more important as doping concentration decreases below lθ!9 - 1020 cm^_3; (3) quantization effects become important as oxide thicknesses decrease below about 20 nm; and (4) quantization effects become important for transverse electrical field strengths above a threshold strength of about 1 MeV/cm.

Claims

What is claimed is:

1. A method for implementation of a model of behavior of a semiconductor structure to take account of selected quantum effects that are present, the method comprising the steps of: providing a model of a semiconductor structure that includes at least one electrical gate-oxide material-semiconductor material, the model including quantum mechanical effects including at least one of (i) presence of a strong electrical field near an interface surface that separates the oxide material and the semiconductor material, oriented in a direction that is approximately transverse to the interface, and (ii) the oxide material having an oxide thickness, measured in a direction approximately transverse to the interface, that is no greater than about 20 nanometers, and (iii) presence of a charged particle minimum energy in the semiconductor material that is greater than zero; and providing a computer that is programmed to estimate at least one of (i) a concentration variable for negative electrical charge within a selected portion of the semiconductor material and (ii) a concentration variable for relative positive electrical charge within a selected portion of the semiconductor material, which includes quantum mechanical effects in the semiconductor material, where the concentration variable for this electrical charge is estimated so that, at equilibrium, an electrical current associated with this electrical charge concentration is zero.

2. The method of claim 1, wherein said concentration of said electrical charge is estimated by transforming said concentration variable and transforming an electrical current density associated with said electrical current so that, at equilibrium, the electrical current density is zero at at least one of said source electrode and said drain electrode.

3. The method of claim 2, wherein said step of transforming said concentration variable comprises the step of: estimating at least one of (i) a negative electrical charge concentration in the semiconductor material at equilibrium as n = K exp(qφ - λΔEg)/kβT, and (ii) a relative positive electrical charge concentration in the semiconductor material at equilibrium as p = K exp(-qφ + λΔEg)/kβT, where K and λ are selected non-zero constants, φ is electrostatic potential for an electron or hole, q is the unit of electrical charge on an electron, ΔEg is a difference in an energy level in said semiconductor material, with and without accounting for said one or more quantum mechanical effects, kβ is Boltzmann's coefficient, T is a representative temperature of the material, and at least one of the electrical charge concentration, the electrostatic potential φ and the energy gap difference ΔEg may vary with location within said semiconductor material.

4. The method of claim 3, further comprising the step of using said electrostatic potential and at least one of (i) said negative charge concentration and (ii) said relative positive charge concentration to estimate a semiconductor physical property drawn from the group of properties consisting of threshold voltage associated with said gate and non-equilibrium current density at a selected location in said semiconductor material.

5. The method of claim 1 , further comprising the step of further providing in said computer program for at least one of (i) a negative charge dopant concentration and (ii) a relative positive charge dopant concentration, which lies in a range of about 1016 - 1 θ20 cm-3 in at least one portion of said semiconductor material.

6. The method of claim 1, further comprising the step of programming said computer to provide for application of a non-zero voltage difference in said semiconductor material thickness in a direction that is approximately transverse to said interface surface.

7. The method of claim 1, further comprising the step of programming said computer to provide for application of a non-zero voltage difference in said semiconductor material thickness in a direction that is approximately parallel to said interface surface.

8. The method of claim 6, further comprising the step of programming said computer to provide for estimation of a threshold value for said first voltage, above which a non-zero current is obtained in a direction that is approximately parallel to said interface surface.

9. An article of manufacture comprising: a computer usable medium having computer readable program code means embodied in the medium for determining effects of semiconductor behavior with quantum mechanical effects included, the computer readable program code means in the article of manufacture comprising: first computer readable program code means for providing a model of a semiconductor structure that includes at least one electrical gate-oxide material-semiconductor material, the model including quantum mechanical effects arising from at least one of (i) presence of a strong electrical field, oriented in a direction that is approximately transverse to an interface surface that separates the oxide material and the semiconductor material, and (ii) the oxide material having an oxide thickness, measured in a direction approximately transverse to the interface, that is no greater than about 20 nanometers, and (iii) presence of a charged particle minimum energy in the semiconductor material that is greater than zero; and second computer readable program code means for estimating at least one of (i) a concentration variable for negative electrical charge within a selected portion of the semiconductor material and (ii) a concentration variable for relative positive electrical charge within a selected portion of the semiconductor material, which includes quantum mechanical effects in the semiconductor material, where the concentration variable for this electrical charge is estimated so that, at equilibrium, an electrical current associated with this electrical charge concentration is zero.

10. The article of manufacture of claim 9, wherein at least one of said first computer readable program code means and said second computer readable program code means provides for estimation of said concentration of said electrical charge by transforming said concentration variable and transforming an electrical current density associated with said electrical current so that, at equilibrium, said electrical current density is zero at at least one of said source electrode and said drain electrode.

11. The article of manufacture of claim 9, wherein at least one of said first computer readable program code means and said second computer readable program code means provides for: estimation of at least one of (i) a negative electrical charge concentration in the semiconductor material at equilibrium as n = K exp(qφ - λΔEg)/kβT, and (ii) a relative positive electrical charge concentration in the semiconductor material at equilibrium as p = K exp(-qφ + λΔEg)/kβT, where K and λ are selected non-zero constants, φ is electrostatic potential for an electron or hole, q is the unit of electrical charge on an electron, ΔEg is a difference in an energy level in said semiconductor material, with and without accounting for said one or more quantum mechanical effects, kβ is Boltzmann's coefficient, T is a representative temperature of the material, and at least one of the electrical charge concentration, the electrostatic potential φ and the energy gap difference ΔEg may vary with location within said semiconductor material.

12. The article of manufacture of claim 1 1 , wherein at least one of said first computer readable program code means and said second computer readable program code means provides for using said electrostatic potential and at least one of (i) said negative charge concentration and (ii) said relative positive charge concentration to estimate a semiconductor physical property drawn from the group of properties consisting of threshold voltage associated with said gate and non-equilibrium current density at a selected location in said semiconductor material.

13. The article of manufacture of claim 9, wherein at least one of said first computer readable program code means and said second computer readable program code means provides for presence in a selected portion of said semiconductor material of at least one of (i) a negative charge dopant concentration and (ii) a relative positive charge dopant concentration, which lies in a range of about 1016 - 1 θ20 cm^_3 in at least one portion of said semiconductor material.

14. The article of manufacture of claim 9, wherein at least one of said first computer readable program code means and said second computer readable program code means provides for application of a non-zero voltage difference in said semiconductor material thickness in a direction that is approximately transverse to said interface surface.

15. The article of manufacture of claim 14, wherein at least one of said first computer readable program code means and said second computer readable program code means provides for application of a non-zero voltage difference in said semiconductor material thickness in a direction that is approximately parallel to said interface surface.

16. The article of manufacture of claim 9, wherein at least one of said first computer readable program code means and said second computer readable program code means provides for estimation of a threshold value for said first voltage, above which a non-zero current is obtained in a direction that is approximately parallel to said interface surface.