WO2000074102A1

WO2000074102A1 - Plasma display panel

Info

Publication number: WO2000074102A1
Application number: PCT/KR2000/000565
Authority: WO
Inventors: Hyeon Taeg Kim
Original assignee: Orion Electric Co., Ltd.
Priority date: 1999-06-01
Filing date: 2000-05-31
Publication date: 2000-12-07
Also published as: KR20010000978A

Abstract

A plasma display panel comprises a pair of front substrate having a dielectric layer and a sustaining electrode, and rear substrate having an address electrode, barrier ribs and a fluorescent layer, wherein the dielectric layer comprises groove portions each being disposed on at least portions of the internal surface of the dielectric layer, and being arranged in the vertical direction to place the top portions of the barrier ribs within the groove portions corresponding to the top portions of the barrier ribs, thereby improving a yield and a reliability in the operation of the display apparatus.

Description

PLASMA DISPLAY PANEL

Technical Field

The present invention relates to a flat display device used in a plasma display apparatus, and more particularly, a plasma display panel (also, hereinafter referred to as "PDP") which allows for the prevention of an abnormal electrical discharge of adjacent cells due to a flaw of a barrier rib occurring frequently in a process of forming the barrier rib of a back side substrate in a dielectric layer of a front side substrate, thereby improving a yield in a manufacturing process and a reliability in the operation of the apparatus.

Background Art Recently, as very high scale integrated semiconductor- manufacturing technology and very high vacuum technology have been developed rapidly, researches on a new type of micron sized-triode electronic vacuum tube device has become of great interest. Attention is paid to the development of new type plasma display panels (PDP) having advantages of a CRT and a liquid crystal display (hereinafter, referred to as "LCD") by applying such a device to a display.

Among them, a color PDP device using a discharge of gas is a typical flat display device for which researches are is made on from a driving method or a structure thereof to a yield necessary for mass production or manufacturing processes .

The AC-type PDPs are manufactured in such as manner that x and Y electrodes for a sustaining discharge are disposed on the front side substrate of a display surface, and address electrodes for writing data therein and fluorescent layers are formed on the rear substrate opposite to the front substrate, so that the front substrate and the rear substrate are assembled to be sealed hermetically, and then the internal discharge space between the assembled front and rear substrates is filled with a discharge gas mixture.

Fig. 1 is a schematic sectional view partially broken illustrating a conventional surface discharge full-color AC type PDP. Fig. 2 is an exploded sectional view partially broken illustrating a state in which the surface discharge full- color AC type PDP according to a prior art of Fig. 1 has a flaw formed on the top surface portion of a barrier rib thereof.

The structure and operation of the surface discharge full-color AC type PDP according to a prior art will be^ described in detail hereinafter with reference to Figs. 1 and 2. Referring to Figs. 1 and 2, the conventional PDP comprises a front substrate 10 and a rear substrate 20 facing and parallel to each other. There is also shown the conventional PDP having an oxide layer 11 formed on the surface of the front substrate of a display surface. In the front substrate 10, there are also formed a plurality of pairs of display electrodes each comprising a sustaining electrode 12 in the directions of X-axis and Y- axis and a bus electrode 13 overlapped on the sustaining electrode 12 for compensating for resistance of the sustaining electrodes 12 on the internal surface of the oxide layer 11. The plurality of pairs of display electrodes 12 are formed parallel to each other on the inside of the front substrate as row electrodes per one pixel cells.

Black stripe layers 14 are formed between the display electrodes, and a transparent dielectric layer 15 is formed on the oxide layer 11, the plurality of pairs of display electrodes and the black strip layer 14. Also, a protective layer 16 is formed on the transparent dielectric layer 15.

In the rear substrate 20, address electrodes 21 are formed parallel to each other on the inside as column electrodes. An opaque dielectric layer 22 is formed on the address electrodes 21 and the rear substrate 20. Fluorescent layers 24 and barrier ribs 23 are formed on the internal surface of the opaque dielectric layer 22 so as to correspond to unit pixel cell.

The front substrate 10 and the rear substrate 20 are bonded to each other in a sealing pattern (not shown) formed by a sealing line. At this point, the top portion of the barrier rib 23 is in contact with the surface of the protective layer 16 to partition adjacent pixel cells to prevent the adjacent cells from leaking ultraviolet rays produced by the electrical discharge.

Further, in the bonded front and rear substrates 10 and

20, air and impurities inside thereof are discharged and then, a gas mixture is filled within between the bonded front and rear substrates 10 and 20 through a gas exhaust hole formed at one side of the back side substrate 20.

As described above, in the conventional PDP, the barrier ribs are usually formed by using a screen printing method, a lift-off method, a sandblasting method using a photo-etching process, a press molding method, or a photosensitive paste method in which the barrier ribs 18 are formed by exposing selectively the barrier ribs of a photosensitive material to a light, etc. However, among such methods, the screen printing method or the photosensitive paste method has a technical limitation in that the thickness of the barrier ribs which can be formed at one time is controlled by characteristics of light exposure . Therefore, since formation of the barrier ribs having the thickness of 140 μμm or so requires approximately 9 times of repetion of printing and dry processes, there is a frequent occurrence of a flaw 25 on the top surfaces of the barrier ribs 18 as shown in Fig. 2, thereby increasing a ratio of producing inferior goods.

Also, in the press molding method, the sandblasting method, or the lift-off method, the barrier ribs 18 are formed at one time.

However, such methods also have disadvantages in that in a case of increasing an aperture ratio of a pixel, the ratio of a width to a height of the barrier ribs is reduced so that there is a strong possibility for the top surfaces of the barrier ribs to be damaged, thereby increasing a ratio of producing inferior goods . Furthermore, this flaw formed on the top surfaces of the barrier ribs may cause an abnormal electrical discharge of adjacent pixel cells so that the quality of a screen is lowered. In a worse case, the quality of an entire panel becomes poor, thereby reducing a yield. Summary of the Invention

Therefore, the present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a plasma display panel (PDP) in which an abnormal electrical discharge of adjacent cells due to a flaw of a barrier rib of a back side substrate is prevented from being generated in a dielectric layer of a front side substrate, thereby improving a yield and a reliability in the operation of the display apparatus. According to one aspect of the present invention, there is provided a plasma display panel, comprising: a pair of front and rear substrates spaced parallel to each other and sandwiching a discharge gas space; a plurality of pairs of row electrodes extending horizontally and being arranged on the surface of the front substrate, each pair of row electrodes including a pair of sustaining electrodes disposed apart from each other to form a discharge gap, and arranged to extend in a horizontal direction; and a pair of bus electrodes respectively formed on or beneath far ends of the sustaining electrodes, and each of the pair of bus electrodes having an area smaller than that of the sustaining electrode; a black strip layer extending horizontally and being arranged between the row electrodes on the surface of the front substrate; a dielectric layer formed on the front substrate and the plurality of pairs of row electrodes and the black stripe layer; a plurality of column electrodes extending vertically and arranged on the internal surface of the rear substrate to form a plurality of discharge cells at intersecting points of the row electrodes and the column electrodes; an opaque dielectric layer formed on the column electrodes and the rear substrate to protect the column electrodes and prevent a light from being transmitted to the rearward of the rear substrate; a plurality of barrier ribs extending vertically and being formed on the surface of the opaque dielectric layer and at least between the column electrodes to define a plurality of emission regions in the discharge gas space; and a fluorescent layer formed at least partially between the barrier ribs on the internal surface of the opaque dielectric layer; wherein the dielectric layer comprises groove portions each being disposed on at least portions of the surface of the dielectric layer, and being arranged in the vertical direction to place the top portions of the barrier ribs within the groove portions corresponding to the top portions of the barrier ribs.

Brief Description of the Drawings

The foregoing and other objects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which:

Fig. 1 is a schematic sectional view partially broken illustrating a surface discharge AC type PDP according to the prior art.

Fig. 2 is an exploded sectional view partially broken illustrating a state in which a surface discharge AC type PDP according to a prior art of Fig. 1 has a flaw formed on the top surface portion of a barrier rib thereof;

Fig. 3 is a schematic perspective view partially broken illustrating a surface discharge AC type PDP according to a preferred embodiment of the present invention;

Fig. 4 is a plan view illustrating each region of overall panel areas in a surface discharge AC type PDP according to a preferred embodiment of the present invention; and Fig. 5 is an exploded sectional view partially broken illustrating a state in which barrier ribs corresponding to some regions of an overall panel are formed with different heights in a surface discharge AC type PDP according to a preferred embodiment of the present invention.

Best Mode for Carrying Out the Invention

Reference will now be made in detail to the preferred embodiments of the present invention. Fig. 3 is a schematic perspective view partially broken illustrating a surface discharge AC type PDP according to a preferred embodiment of the present invention;

Fig. 4 is a plan view illustrating each region of overall panel areas in a surface discharge AC type PDP according to a preferred embodiment of the present invention; and

Fig. 5 is an exploded sectional view partially broken illustrating a state in which barrier ribs corresponding to some regions of an overall panel are formed with different heights in a surface discharge AC type PDP according to a preferred embodiment of the present invention.

The structure and operation of the surface discharge AC type PDP according to the present invention will be described in detail hereinafter with reference to Figs. 3 to 5.

As shown in Fig. 3, in the PDP of the present invention, address electrodes 41 are formed parallel to each other on the surface of the rear substrate 40 of the PDP as column electrodes. An opaque dielectric layer 42, which is adapted to protect the address electrodes 41 and prevent a light from being transmitted to the rearward of the rear substrate 40, i.e., functions as a reflective film, is formed on the address electrodes 41 and the rear substrate 40. Also, formed on the opaque dielectric layer 42 are barrier ribs 43 to partition adjacent pixel cells. Fluorescent layers 44 made of red (R) , green (G) and blue (B) colors emitting fluorescent materials are formed between the barrier ribs 43 on the opaque dielectric layer 42 by a screen printing method. At this time, there is a frequent occurrence of a flaw

(not shown) dug at the depth of 10 to 20 μm on the top surface of the barrier ribs 43 like the prior art as shown in Fig. 2.

Also, an oxide layer (not shown) is formed on the surface of the front substrate 30 of a display surface opposite to the rear substrate 40.

In the front substrate 30, a plurality of pairs of display electrodes each comprising a sustaining electrode 33 of the direction of X-axis and Y-axis and a bus electrode 32 overlapped on the sustaining electrode 33 for compensating for resistance of the sustaining electrode 33 are formed parallel to each other on the internal surface of the oxide layer (not shown) . Black strip layers 34 are formed between the display electrodes on the surface of the front substrate 30, and a transparent dielectric layer 35 is formed on the front substrate 30, the display electrodes and the black strip layer 34. The plurality of pairs of display electrodes are formed parallel to each other on the inside of the oxide layer (not shown) as row electrodes per one pixel cell. A transparent dielectric layer 35 is formed on the oxide layer (not shown) , the plurality of pairs of display electrodes and the black stripe layer 14.

Here, the transparent dielectric layer 35 has grooves

38 formed, at a depth of 20 to 40 μm, on the surface thereof corresponding to the barrier ribs 43 of the rear substrate

40, so that the top portions of the barrier ribs 43 is placed within the grooves 38.

The grooves formed on the internal surface of the dielectric layer and the barrier ribs are identical in number, respectively.

Also, the grooves are formed in continuous stripe patterns on the internal surface of the dielectric layer.

The grooves 38 can be formed selectively at desired one or more portions among the regions A to I in the entire panel areas as shown in Fig. 4.

Also, as shown in Fig. 5, a height of the barrier ribs 43 of the rear substrate 40 corresponding to the surface portions of the transparent dielectric layer 35 on which the grooves 38 are formed, are relatively higher than that of the barrier ribs 43 thereof corresponding to the surface portions of the transparent dielectric layer 35 on which the grooves 38 are not formed.

The transparent dielectric layer 35 is formed with multiplayers using the screen printing method, etc., in order to secure a controlled thickness thereof, uniformity of a thickness thereof and insulation during the electrical discharge .

At this point, the grooves 38 may be easily formed by modifying a mask at the time of the screen printing of last once or twice, and a protective layer may be formed on the internal surface of the transparent dielectric layer 35.

Also, when sealing and adhering around the front substrate 30 and the rear substrate 40 in a sealing pattern (not shown) , the top surface of the barrier ribs 43 is placed within the grooves 38 so that a flaw (not shown) formed on the top surface thereof is hidden within the grooves.

As can be seen from the foregoing, according to the plasma display panel of the present invention, in the process of forming the rear substrate, grooves for the barrier ribs to be placed are formed on the internal surface portions of the transparent dielectric layer corresponding to the top surface portions of the barrier ribs. Moreover, in the screen printing process performed many times for forming the transparent dielectric layer, said panel easily formed by modifying a mask at the time of the screen printing of last once or twice. Consequently, a flaw on the top surfaces of the barrier ribs is hidden within the grooves so that an abnormal electrical discharge of adjacent cells due to a flaw occurring frequently on the top portion of a barrier rib of a rear substrate is prevented from being generated in a dielectric layer of a front substrate, thereby improving a yield and a reliability in the operation of the display apparatus . While this invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiment, but, on the contrary, it is intended to cover various modifications within the spirit and scope of the appended claims.

Claims

1. A plasma display panel comprising: a pair of front and rear substrates spaced parallel to each other and sandwiching a discharge gas space; a plurality of pairs of row electrodes extending horizontally and being arranged on the surface of the front substrate, each pair of row electrodes including a pair of sustaining electrodes disposed apart from each other to form a discharge gap, and arranged to extend in a horizontal direction; and a pair of bus electrodes respectively formed on or beneath far ends of the sustaining electrodes, and each of the pair of bus electrodes having an area smaller than that of the sustaining electrode; a black stripe layer extending horizontally and being arranged between the row electrodes on the surface of the front substrate; a dielectric layer formed on the front substrate and the plurality of pairs of row electrodes and the black stripe layer; a plurality of column electrodes extending vertically and being arranged on the surface of the rear substrate to form a plurality of discharge cells at intersecting points of the row electrodes and the column electrodes; an opaque dielectric layer formed on the column electrodes and the rear substrate to protect the column electrodes and prevent a light from being transmitted to the rearward of the rear substrate; a plurality of barrier ribs extending vertically and being formed on the internal surface of the opaque dielectric layer and at least between the column electrodes to define a plurality of emission regions in the discharge gas space; and a fluorescent layer formed at least partially between the barrier ribs on the internal surface of the opaque dielectric layer; wherein said dielectric layer comprises groove portions each being disposed on at least portions of said surface of said dielectric layer, and being arranged in the vertical direction to place the top portions of the barrier ribs within the groove portions corresponding to the top portions of the barrier ribs.

2. The plasma display panel according to claim 1, wherein said barrier ribs placed within the groove portions formed on said surface of said dielectric layer are higher than the others except them.

3. The plasma display panel according to claim 1, wherein said groove portions formed on said surface of said dielectric layer and the barrier ribs are identical in number, respectively.

4. The plasma display panel according to claim 1, wherein said groove portions are formed in continuous stripe patterns on said surface of said dielectric layer.

5. The plasma display panel according to claim 1, wherein said groove portions are formed at a depth of 20 to 40 μm on said surface of said dielectric layer.

6. The plasma display panel according to claim 1, wherein a protective layer is further formed on said dielectric layer.