WO2000059016A2 - Method for producing thin, uniform oxide layers on silicon surfaces - Google Patents

Method for producing thin, uniform oxide layers on silicon surfaces Download PDF

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WO2000059016A2
WO2000059016A2 PCT/DE2000/000799 DE0000799W WO0059016A2 WO 2000059016 A2 WO2000059016 A2 WO 2000059016A2 DE 0000799 W DE0000799 W DE 0000799W WO 0059016 A2 WO0059016 A2 WO 0059016A2
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tensile stress
oxide layers
silicon
oxidation
oxidized
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German (de)
French (fr)
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WO2000059016A3 (en
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Hans-Joachim MÜSSIG
Jaroslaw Dabrowski
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Institut für Halbleiterphysik Frankfurt (Oder) GmbH
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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/005Oxydation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes

Definitions

  • the invention relates to a method for producing thin, uniform oxide layers on silicon surfaces.
  • the lateral dimensions of silicon components will decrease to approximately 200 atomic distances and the vertical dimensions of the doping profiles to approximately 50 atomic distances.
  • this requires atomically smooth, ultra-thin oxide layers on silicon surfaces, for example gate oxides.
  • the SIA National Technology Roadmap for Semiconductors 1994 still had a desired minimum gate oxide thickness, i. H. predicted the gate insulator thickness of about 3 nm, the 1997 edition predicts a further reduction in the gate insulator thickness. Falling below a gate oxide thickness of 3 nm depends to a large extent on the ability to manufacture, characterize, and influence the interface structure of ultra-thin SiO layers.
  • the gate oxide thickness falls below a value of 6 nm
  • the transition region between the Si substrate and the SiO 2 layer becomes a significant part of the oxide layer. From this it follows immediately that the microstructure of the surface and the interface roughness have a considerable influence on the quality of the oxide layer while further reducing its thickness.
  • this object is achieved in that a silicon surface is oxidized with increased tensile stress and high smoothness.
  • a silicon surface with increased tensile stress is oxidized, it is easier for the oxide layer to reduce stress, so that the required quality can be achieved even at low reaction temperatures, ie the technological advantage also lies in a low thermal budget.
  • the high smoothness of the surface, ie a surface without islands, results in a homogeneous distribution of the oxidizing medium and thus a smooth interface.
  • a Si (113) surface is thermally stable, atomically smooth and offers numerous binding options. It lies between the orientations (001) and (111) and can be regarded as a densely stepped (001) or (l l l) surface. Their crystallography is characterized by the fact that a high tensile stress develops during the surface reconstruction.
  • Si (001) surface is oxidized under conditions similar to the Si (113) surface, whereby the ejection and diffusion of Si atoms which cause the roughening of the surface are reduced or suppressed.
  • Example 1 In this exemplary embodiment, an Si (113) surface is produced by oriented cutting of a silicon single crystal. The oxidation takes place under ultra-high vacuum conditions at oxygen partial pressures ⁇ MO "6 mbar in two steps. The first step consists of a pre-oxidation at a temperature of 25 ° C and the second step in a thermal oxidation at a temperature of approx. 600 ° C Due to the special bond geometries on the Si (1 13) surface, preferential oxidation in the [110] direction takes place in the initial phase, resulting in a very thin and smooth oxide layer.
  • a tensile stress is generated on the Si (001) surface by suitable preparation.
  • a preparation is e.g. B. a mechanical deformation, etching or the production of local stress fields.
  • a nitride mask 1 consisting of an Si 3 N 4 layer is produced on the Si (OOl) surface.
  • This nitride mask 1 has a plurality of approximately square openings 2 with a width of ⁇ 100 nm.
  • gate oxidation is then carried out through the openings 2 under tensile stress.
  • this also leads to a reduced roughness in the initial phase of the oxidation.
  • the oxidation takes place under conditions similar to those on the Si (113) surface.

Abstract

The invention relates to a method for producing thin, uniform oxide layers on silicon surfaces. Within the next 10 years, the lateral dimensions of silicon components will be reduced to an interatomic distance of approximately 200 and the vertical extensions of the doping concentration profile to an interatomic distance of approximately 50. This requires, among other things, atomically smooth ultra-thin oxide layers on silicon surfaces, for example, gate-oxide layers. The invention thereby aims to provide a method for producing thin, uniform oxide layers on silicon surfaces which provides oxides with a thickness of less than 6 nm. This is achieved by oxidising a silicon surface of increased evenness using an increased tensile stress.

Description

Verfahren zur Herstellung dünner gleichförmiger Oxidschichten auf Silizium- OberflächenProcess for the production of thin, uniform oxide layers on silicon surfaces
Die Erfindung betrifft ein Verfahren zur Herstellung dünner gleichförmiger Oxidschichten auf Silizium-Oberflächen.The invention relates to a method for producing thin, uniform oxide layers on silicon surfaces.
Innerhalb der nächsten 10 Jahre werden sich die lateralen Abmessungen von Silizium- Bauelementen auf etwa 200 Atomabstände und die vertikalen Ausdehnungen der Dotierungspro file auf etwa 50 Atomabstände verringern. Das erfordert unter anderem atomar glatte ultradünne Oxidschichten auf Silizium-Oberflächen, beispielsweise Gate- Oxide. Während die SIA National Technology Roadmap for Semiconductors 1994 noch eine anzustrebende minimale Dicke der Gate-Oxide, d. h. der Gate-Isolatordicke von etwa 3 nm vorhersagte, prophezeit die 1997 erschienene Ausgabe eine weitergehende Verringerung der Gate-Isolatordicke. Das Unterschreiten einer Gate-Oxiddicke von 3 nm hängt maßgeblich von der Fähigkeit ab, ultradünne SiO -Schichten herstellen, charakterisieren und deren Interface-Struktur beeinflussen zu können.Within the next 10 years, the lateral dimensions of silicon components will decrease to approximately 200 atomic distances and the vertical dimensions of the doping profiles to approximately 50 atomic distances. Among other things, this requires atomically smooth, ultra-thin oxide layers on silicon surfaces, for example gate oxides. While the SIA National Technology Roadmap for Semiconductors 1994 still had a desired minimum gate oxide thickness, i. H. predicted the gate insulator thickness of about 3 nm, the 1997 edition predicts a further reduction in the gate insulator thickness. Falling below a gate oxide thickness of 3 nm depends to a large extent on the ability to manufacture, characterize, and influence the interface structure of ultra-thin SiO layers.
Sobald die Gate-Oxiddicke einen Wert von 6 nm unterschreitet, wird das Übergangsgebiet zwischen dem Si-Substrat und der SiO2-Schicht ein signifikanter Teil der Oxidschicht. Daraus folgt unmittelbar, dasss die MikroStruktur der Oberfläche und die Interface-Rauheit einen erheblichen Einfluss auf die Qualität der Oxidschicht bei weiterer Verringerung ihrer Dicke haben.As soon as the gate oxide thickness falls below a value of 6 nm, the transition region between the Si substrate and the SiO 2 layer becomes a significant part of the oxide layer. From this it follows immediately that the microstructure of the surface and the interface roughness have a considerable influence on the quality of the oxide layer while further reducing its thickness.
Es ist somit Aufgabe der Erfindung, ein Verfahren zur Herstellung dünner gleichförmiger Oxidschichten auf Silizium-Oberflächen vorzuschlagen, das zur Realisierung von Oxiddicken kleiner als 6 nm geeignet ist.It is therefore an object of the invention to propose a method for producing thin, uniform oxide layers on silicon surfaces which is suitable for realizing oxide thicknesses of less than 6 nm.
Erfindungsgemäß wird diese Aufgabe dadurch gelöst, dass eine Silizium-Oberfläche mit erhöhter Zugspannung und hoher Glattheit oxydiert wird. Bei der Oxydation einer Silizium-Oberfläche mit erhöhter Zugspannung kommt es leichter zu einem Spannungsabbau in der Oxidschicht, so dass deren geforderte Qualität bereits bei niedrigen Reaktionstemperaturen realisiert werden kann, d.h. der technologische Vorteil liegt auch in einem geringen thermischen Budget. Die hohe Glattheit der Oberfläche, d.h. eine Oberfläche ohne Inseln, bewirkt eine homogene Verteilung des oxydierenden Mediums und damit eine glatte Interface.According to the invention, this object is achieved in that a silicon surface is oxidized with increased tensile stress and high smoothness. When a silicon surface with increased tensile stress is oxidized, it is easier for the oxide layer to reduce stress, so that the required quality can be achieved even at low reaction temperatures, ie the technological advantage also lies in a low thermal budget. The high smoothness of the surface, ie a surface without islands, results in a homogeneous distribution of the oxidizing medium and thus a smooth interface.
Durch Änderung der Orientierung des Siliziumsubstrats wird die Dicke und Homogenität der Oxidschicht vorteilhaft beeinflusst. Eine Si(113)-Oberfläche ist thermisch stabil, atomar glatt und bietet zahlreiche Bindungsmöglichkeiten. Sie liegt zwischen den Orientierungen (001) und (111) und kann als dicht gestufte (001)- oder (l l l)-Oberfläche angesehen werden. Ihre Kristallographie ist dadurch gekennzeichnet, dass sich bei der Oberflächenrekonstruktion eine hohe Zugspannung ausbildet.By changing the orientation of the silicon substrate, the thickness and homogeneity of the oxide layer is advantageously influenced. A Si (113) surface is thermally stable, atomically smooth and offers numerous binding options. It lies between the orientations (001) and (111) and can be regarded as a densely stepped (001) or (l l l) surface. Their crystallography is characterized by the fact that a high tensile stress develops during the surface reconstruction.
Die Tatsache, dass eine hohe Spannung auf der sauberen Oberfläche entsteht und dort existieren kann, weist darauf hin, dass die atomare Geometrie der (113)-Fläche (zwischenatomare Abstände, Richtungen, Winkel zwischen dieser Fläche und den Bindungen) vorteilhaft ist für die Ausbildung von Schichten mit hoher Glattheit und mit Gitterkonstanten, die größer sind als die des Siliziums. Das wird unter anderem auch durch die Entstehung von (113)-Planardefekten infolge der Adsorption von Antimon auf Si(l 13) belegt. Die erhöhte Zugspannung, die atomare Glattheit und eine reduzierte Diffusionsfähigkeit der Reduktionsprodukte bei der Oxydation sind die Gründe dafür, weshalb atomar glatte Oxidschichten leicht auf Si(l 13)-Oberflächen wachsen können.The fact that a high tension arises on the clean surface and can exist there indicates that the atomic geometry of the (113) surface (interatomic distances, directions, angles between this surface and the bonds) is advantageous for the formation of layers with high smoothness and with lattice constants larger than that of silicon. This is evidenced by the formation of (113) planar defects as a result of the adsorption of antimony on Si (l 13). The increased tensile stress, the atomic smoothness and a reduced diffusibility of the reduction products during the oxidation are the reasons why atomically smooth oxide layers can easily grow on Si (l 13) surfaces.
Während die Sauerstoffadsorption auf der Si(001)-Oberfläche hauptsächlich an metallischen C-Defekten stattfindet und bereits bei Raumtemperatur eine Ejektion von Si- Atomen sowie die Bildung von Si-Inselkeimen beobachtet werden, findet auf der Si(l 13)- Oberfläche wegen der hohen Zugspannung weder eine Ejektion von Si-Atomen noch eine Oberflächendiffusion der Si- Atome statt. Die Folge ist, dass die Si(113)-Oberfläche bei Raumtemperatur keine Aufrauhung erfährt. Durch die Oxydation der Si(113)-Oberfläche in zwei Schritten, nämlich durch eine Voroxydation bei niedriger Temperatur, z. B. bei 25 °C, um zunächst eine glatte Interface zu erhalten, und anschließend durch Oxydation bei hoher Temperatur, z. B. bei 600 °C, gelingt es, eine dünne Oxidschicht hoher Qualität zu erzeugen. Bei thermischer Oxydation zeigt sich anfänglich ein bevorzugtes Schichtwachstum in [110] -Richtung, d.h. die Oxydation verläuft in diesem Stadium quasi- epidaktisch. In einer Abwandlung des Verfahrens wird auf einer Si(001)-Oberfläche durch geeigneteWhile the oxygen adsorption on the Si (001) surface mainly occurs on metallic C defects and an ejection of Si atoms and the formation of Si island nuclei are observed even at room temperature, the Si (l 13) surface takes place because of the high tensile stress, there is no ejection of Si atoms or surface diffusion of the Si atoms. The result is that the Si (113) surface does not roughen at room temperature. By oxidation of the Si (113) surface in two steps, namely by pre-oxidation at low temperature, e.g. B. at 25 ° C to initially obtain a smooth interface, and then by oxidation at high temperature, for. B. at 600 ° C, it is possible to produce a thin oxide layer of high quality. Thermal oxidation initially shows a preferred layer growth in the [110] direction, ie the oxidation is quasi-epidactic at this stage. In a modification of the method on a Si (001) surface by suitable
Präparation, z. B. mechanische Deformation, Ätzen oder lokale Spannungsfelder, insbesondere durch Nitride eine Zugspannung erzeugt. Anschließend wird die verspanntePreparation, e.g. B. mechanical deformation, etching or local stress fields, especially tensile stress generated by nitrides. Then the braced
Si(001)-Oberfläche unter ähnlichen Bedingungen wie die Si(113)-Oberfläche oxydiert, wobei die Ejektion und die Diffusion von Si-Atomen, die die Aufrauhung der Oberfläche bewirken, verringert bzw. unterdrückt werden.Si (001) surface is oxidized under conditions similar to the Si (113) surface, whereby the ejection and diffusion of Si atoms which cause the roughening of the surface are reduced or suppressed.
Die experimentellen Beweise für das Oxydationsverhalten von Silizium-Oberflächen mit erhöhter Zugspannung wurden unter Ultrahochvakuumbedingungen bei Sauerstoffpartialdrücken < MO"6 mbar und Temperaturen im Bereich von 25 °C und 600 °C gewonnen. Die Ergebnisse sollten auf andere Oxydationsverfahren übertragbar sein.The experimental evidence for the oxidation behavior of silicon surfaces with increased tensile stress was obtained under ultra-high vacuum conditions at oxygen partial pressures <MO "6 mbar and temperatures in the range of 25 ° C and 600 ° C. The results should be transferable to other oxidation processes.
Die Merkmale der Erfindung gehen außer aus den Ansprüchen auch aus der Beschreibung hervor, wobei die einzelnen Merkmale jeweils für sich allein oder zu mehreren in Form von Unterkombinationen schutzfähige Ausführungen darstellen, für die hier Schutz beansprucht wird. Ausführungsbeispiele der Erfindung werden im Folgenden näher erläutert.In addition to the claims, the features of the invention also emerge from the description, the individual features representing embodiments which can be protected individually or in groups in the form of sub-combinations, for which protection is claimed here. Exemplary embodiments of the invention are explained in more detail below.
Beispiel 1 : In diesem Ausführungsbeispiel wird eine Si(113)-Oberfläche durch orientiertes Schneiden eines Silizium-Einkristalls erzeugt. Die Oxydation erfolgt unter Ultrahochvakuumbedingen bei Sauerstoffpartialdrücken < MO"6 mbar in zwei Schritten. Der erste Schritt besteht in einer Voroxydation bei einer Temperatur von 25 °C und der zweite Schritt in einer thermischen Oxydation bei einer Temperatur von ca. 600 °C. Auf Grund der speziellen Bindungsgeometrien auf der Si(1 13)-Oberfläche findet in der Anfangsphase eine bevorzugte Oxydation in [110] -Richtung statt. Es entsteht eine sehr dünne und glatte Oxidschicht.Example 1: In this exemplary embodiment, an Si (113) surface is produced by oriented cutting of a silicon single crystal. The oxidation takes place under ultra-high vacuum conditions at oxygen partial pressures <MO "6 mbar in two steps. The first step consists of a pre-oxidation at a temperature of 25 ° C and the second step in a thermal oxidation at a temperature of approx. 600 ° C Due to the special bond geometries on the Si (1 13) surface, preferential oxidation in the [110] direction takes place in the initial phase, resulting in a very thin and smooth oxide layer.
Bei Anwendung anderer, technologisch relevanter Oxydationsverfahren sind die gleichen Ergebnisse zu erwarten.The same results can be expected when using other, technologically relevant oxidation processes.
Beispiel 2:Example 2:
In diesem Ausfuhrungsbeispiel wird auf der Si(001 )-Oberfläche durch geeignete Präparation eine Zugspannung erzeugt. Eine derartige Präparation ist z. B. eine mechanische Deformation, Ätzen oder die Herstellung lokaler Spannungsfelder. In diesem Ausführungsbeispiel wird, wie in Fig. 1 schematisch dargestellt, auf der Si(OOl)- Oberfläche eine Nitridmaske 1, bestehend aus einer Si3N4-Schicht, erzeugt. Diese Nitridmaske 1 besitzt mehrere, etwa quadratische Öffnungen 2 mit einer Breite < 100 nm. Auf der Si(001)-Oberfläche wird anschließend durch die Öffnungen 2 eine Gate-Oxydation unter Zugspannung durchgeführt. Diese führt ebenfalls, wie auf der Si(113)-Oberfläche im ersten Ausführungsbeispiel, zu einer verringerten Rauheit in der Anfangsphase der Oxydation. Die Oxydation erfolgt unter ähnlichen Bedingungen wie auf der Si(113)- Oberfläche.In this exemplary embodiment, a tensile stress is generated on the Si (001) surface by suitable preparation. Such a preparation is e.g. B. a mechanical deformation, etching or the production of local stress fields. In this exemplary embodiment, as shown schematically in FIG. 1, a nitride mask 1 consisting of an Si 3 N 4 layer is produced on the Si (OOl) surface. This nitride mask 1 has a plurality of approximately square openings 2 with a width of <100 nm. On the Si (001) surface, gate oxidation is then carried out through the openings 2 under tensile stress. As on the Si (113) surface in the first exemplary embodiment, this also leads to a reduced roughness in the initial phase of the oxidation. The oxidation takes place under conditions similar to those on the Si (113) surface.
In der vorliegenden Beschreibung wurde anhand konkreter Ausführungsbeispiele ein Verfahren zur Herstellung dünner gleichförmiger Oxidschichten auf Silizium-Oberflächen erläutert. Es sei aber vermerkt, dass die vorliegende Erfindung nicht auf die Einzelheiten der Beschreibung im Ausführungsbeispiel beschränkt ist, da im Rahmen der Ansprüche Änderungen und Abwandlungen beansprucht werden. In the present description, a method for producing thin, uniform oxide layers on silicon surfaces was explained using specific exemplary embodiments. However, it should be noted that the present invention is not restricted to the details of the description in the exemplary embodiment, since changes and modifications are claimed within the scope of the claims.

Claims

Patentansprüche claims
1. Verfahren zur Herstellung dünner gleichförmiger Oxidschichten auf Siliziumoberflächen, dadurch gekennzeichnet, dass die Silizium-Oberfläche mit erhöhter Zugspannung oxydiert wird.1. A process for producing thin, uniform oxide layers on silicon surfaces, characterized in that the silicon surface is oxidized with increased tensile stress.
2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass die Silizium-Oberfläche mit natürlicher Zugspannung oxydiert wird.2. The method according to claim 1, characterized in that the silicon surface is oxidized with natural tensile stress.
3. Verfahren nach Anspruch 1 , dadurch gekennzeichnet, dass die Silizium-Oberfläche mit einer durch eine Präparation verursachte erhöhte Zugspannung oxydiert wird.3. The method according to claim 1, characterized in that the silicon surface is oxidized with an increased tensile stress caused by a preparation.
4. Verfahren nach einem oder mehreren der Ansprüche 1 bis 3, dadurch gekennzeichnet, dass eine Si(l 13)-Oberfläche oxydiert wird.4. The method according to one or more of claims 1 to 3, characterized in that an Si (l 13) surface is oxidized.
5. Verfahren nach einem oder mehreren der Ansprüche 1 bis 3, dadurch gekennzeichnet, dass auf einer Si(001)-Oberfläche eine Zugspannung erzeugt wird.5. The method according to one or more of claims 1 to 3, characterized in that a tensile stress is generated on an Si (001) surface.
6. Verfahren nach einem oder mehreren der Ansprüche 1 bis 5, dadurch gekennzeichnet, dass die Zugspannung mittels mechanischer Deformation erzeugt wird.6. The method according to one or more of claims 1 to 5, characterized in that the tensile stress is generated by means of mechanical deformation.
7. Verfahren nach einem oder mehreren der Ansprüche 1 bis 6, dadurch gekennzeichnet, dass die Zugspannung mittels Ätzen erzeugt wird.7. The method according to one or more of claims 1 to 6, characterized in that the tensile stress is generated by means of etching.
8. Verfahren nach einem oder mehreren der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass die Zugspannung mittels lokaler Spannungsfelder erzeugt wird.8. The method according to one or more of claims 1 to 7, characterized in that the tensile stress is generated by means of local stress fields.
9. Verfahren nach Anspruch 8, dadurch gekennzeichnet, dass die Spannungsfelder durch eine Nitridmaske (1) auf der Silizium-Oberfläche erzeugt werden. 9. The method according to claim 8, characterized in that the voltage fields are generated by a nitride mask (1) on the silicon surface.
10. Verfahren nach Anspruch 9, dadurch gekennzeichnet, dass die Nitridmaske (1) mindestens eine Öffnung (2) aufweist.10. The method according to claim 9, characterized in that the nitride mask (1) has at least one opening (2).
11. Verfahren nach Anspruch 9 oder 10, dadurch gekennzeichnet, dass die Nitridmaske11. The method according to claim 9 or 10, characterized in that the nitride mask
(1) mehrere Öffnungen (2) aufweist.(1) has a plurality of openings (2).
12. Verfahren nach Anspruch 10 oder 11, dadurch gekennzeichnet, dass die Öffnung12. The method according to claim 10 or 11, characterized in that the opening
(2) etwa quadratisch ist.(2) is approximately square.
13. Verfahren nach einem oder mehreren der Ansprüche 10 bis 12, dadurch gekennzeichnet, dass die Öffnung (2) eine Breite D 100 nm aufweist.13. The method according to one or more of claims 10 to 12, characterized in that the opening (2) has a width D 100 nm.
14. Verfahren nach einem oder mehreren der Ansprüche 1 bis 13, dadurch gekennzeichnet, dass die Oxydation bei einer Raumtemperatur (25 °C) erfolgt.14. The method according to one or more of claims 1 to 13, characterized in that the oxidation takes place at a room temperature (25 ° C).
15. Verfahren nach einem oder mehreren der Ansprüche 1 bis 13, dadurch gekennzeichnet, dass die Oxydation in einem Bereich von 500 °C bis 700 °C, vorzugsweise bei 600 °C erfolgt.15. The method according to one or more of claims 1 to 13, characterized in that the oxidation takes place in a range from 500 ° C to 700 ° C, preferably at 600 ° C.
16. Verfahren nach einem oder mehreren der Ansprüche 1 bis 13, dadurch gekennzeichnet, dass die Oxydation in mehreren Schritten durchgeführt wird.16. The method according to one or more of claims 1 to 13, characterized in that the oxidation is carried out in several steps.
17. Verfahren nach Anspruch 16, dadurch gekennzeichnet, dass die Oxydation in einem ersten Schritt bei einer niedrigen Temperatur, insbesondere bei einer Temperatur von 25 °C durchgeführt wird.17. The method according to claim 16, characterized in that the oxidation is carried out in a first step at a low temperature, in particular at a temperature of 25 ° C.
18. Verfahren nach Anspruch 16 oder 17, dadurch gekennzeichnet, dass die Oxydation in einem weiteren Schritt bei einer hohen Temperatur, insbesondere bei einer Temperatur von 600 °C durchgeführt wird. 18. The method according to claim 16 or 17, characterized in that the oxidation is carried out in a further step at a high temperature, in particular at a temperature of 600 ° C.
19. Verfahren nach einem oder mehreren der Ansprüche 1 bis 18, dadurch gekennzeichnet, dass die Silizium-Oberfläche bis zu einer Dicke < 6 nm oxydiert wird.19. The method according to one or more of claims 1 to 18, characterized in that the silicon surface is oxidized to a thickness of <6 nm.
20. Verfahren nach einem oder mehreren der Ansprüche 1 bis 19, dadurch gekennzeichnet, dass die Silizium-Oberfläche bis zu einer Dicke < 3 nm oxydiert wird. 20. The method according to one or more of claims 1 to 19, characterized in that the silicon surface is oxidized to a thickness of <3 nm.
PCT/DE2000/000799 1999-03-27 2000-03-11 Method for producing thin, uniform oxide layers on silicon surfaces WO2000059016A2 (en)

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