WO2000019577A1 - Alimentation electrique, procede de fourniture de courant electrique et circuit integre - Google Patents

Alimentation electrique, procede de fourniture de courant electrique et circuit integre Download PDF

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Publication number
WO2000019577A1
WO2000019577A1 PCT/JP1999/005254 JP9905254W WO0019577A1 WO 2000019577 A1 WO2000019577 A1 WO 2000019577A1 JP 9905254 W JP9905254 W JP 9905254W WO 0019577 A1 WO0019577 A1 WO 0019577A1
Authority
WO
WIPO (PCT)
Prior art keywords
power source
electrical resistance
circuit blocks
lines
electric current
Prior art date
Application number
PCT/JP1999/005254
Other languages
English (en)
Inventor
Eiji Kawai
Makoto Furuhashi
Original Assignee
Sony Computer Entertainment, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Computer Entertainment, Inc. filed Critical Sony Computer Entertainment, Inc.
Priority to JP2000572974A priority Critical patent/JP2002527016A/ja
Priority to EP99944841A priority patent/EP1046209A1/fr
Publication of WO2000019577A1 publication Critical patent/WO2000019577A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters

Definitions

  • This invention relates to a power unit that supplies electric current to an integrated circuit consisting of a plurality of circuit blocks, an electric current supply method thereof, and an integrated circuit consisting of a plurality of circuit blocks.
  • an electronic device consists of a plurality of electronic circuits, according to its purpose.
  • an electronic circuit may be for example, a CPU system which controls various units of an electronic device.
  • Such an electronic device has a power source unit that supplies electric current and various electronic circuits which are driven by it.
  • a power source unit that supplies electric current and various electronic circuits which are driven by it.
  • electronic devices are devices that are made small enough to be carried around, for example, portable terminals, and in such cases the electronic circuits are battery-driven by a primary-battery or a secondary-battery battery power source formed of a primary battery or a secondary battery.
  • the aforesaid CPU system for example a microprocessor, that controls the units of an electronic device usually consists of a plurality of devices (circuit blocks), such as a
  • the minimum operating voltage of the devices generally differs slightly.
  • the "minimum operating voltage” is the minimum voltage required for every device to operate.
  • the power source voltage is either the unmodified output of the battery or a voltage output in which the output of the battery is boosted to a higher voltage, and in either case, the same system voltage is supplied to the entire system. That is, in the case of a CPU system, the CPU, a memory, or a peripheral circuit are considered as devices which receive their supply of electric current from a single power source.
  • the minimum operating voltage of an electronic device as a whole is set dependent on the minimum operating voltage of whichever of its various devices has the highest minimum operating voltage.
  • the minimum operating voltage of the device as a whole is determined in this way, it becomes necessary to change the batteries, or charge the batteries, for the device, because it is a single device, even if other devices are still at a sufficient voltage level to allow operation.
  • the problem is that the battery lifetime is determined, and the battery must be replaced or charged, according to the device whose minimum operating voltage is highest.
  • the above and other objects of the present invention are attained by a power unit according to the present invention which in order to solve the above problems, supplies electric current to a plurality of circuit blocks each being substantially of different minimum operable voltage.
  • the power unit includes a power source means that supplies an electric current; a plurality of power supply lines that connect in parallel each of said circuit blocks to said power source means, and electrical resistance means that increase an electrical resistance of at least, among the a plurality of power source lines, the power source lines of the circuit blocks whose minimum operable voltage is low.
  • the electrical resistance means increase the electrical resistance of at least, among the a plurality of power source lines that connect in parallel each of the circuit blocks to the power source means that supplies an electric current, the power source lines of the circuit blocks whose minimum operable voltage is low.
  • This invention makes it possible to suppress the overall electric current by increasing the combined resistance of the circuit blocks as a whole and also suppresses the electric current consumption of all the power source lines, not just the power source lines on which there are interposed electrical resistance means.
  • An electric current supply method of this invention is a method of, in order to solve the above problems, supplying electric current to a plurality of circuit blocks each being of different minimum operable voltage, wherein each of said circuit blocks is connected in parallel via a plurality of power source lines to the power source means that supplies an electric current.
  • An electric current is supplied with increase of the resistance, among these a plurality of power source lines, of at least the power source lines of circuit blocks whose minimum operable voltage is low.
  • this method suppresses the electric current consumption similarly to the above aspect of the present invention.
  • an integrated circuit according to the present invention which, in order to solve the above problems, comprises a plurality of circuit blocks each being of different minimum operable voltage.
  • the electrical resistance means increase the electrical resistance of, among the a plurality of power source input lines, at least the power source input lines of circuit blocks whose minimum operable voltage is low. As explained above, this suppresses the electric current consumption even in the case of an integrated circuit similarly to the first aspect of the invention.
  • the integrated circuit of this invention in order to solve the above problems, may comprise a plurality of circuit blocks each being of different minimum operable voltage. There are internally provided a plurality of power source input lines that connect in parallel each circuit block to the power source means that supplies an electric current, and electrical resistance means that increase the electrical resistance of, among the a plurality of power source input lines, at least the power source input lines of circuit blocks whose minimum operable voltage is low.
  • electrical resistance means increase the electrical resistance of, among the a plurality of power source input lines, at least the power source input lines of circuit blocks whose minimum operable voltage is low. As explained herein above, similarly to the first aspect of the invention, this suppresses the electric current consumption even if it is the integrated circuit which also integrates a power source input means and power source input lines in which this means is interposed.
  • Figure 1 is a block diagram showing an embodiment of a power unit of the present of invention
  • Figure 2 is a block diagram showing an arrangement of another power unit used for comparison with the power unit of Fig. 1;
  • Figure 3 is a characteristic diagram showing the electric discharge characteristics of the above power unit of the above embodiment and the above another power unit; and Figure 4 is a block diagram showing a configuration of a microprocessor of this invention.
  • This embodiment is a microprocessor that consists of a plurality of circuit blocks.
  • a microprocessor has a circuit block (hereafter called a device) that consists of a memory 2, a CPU 3, and a peripheral circuit 4, which have different minimum operable voltages required for their operation. That is, in microprocessor 1, memory 2, CPU core 3, and peripheral circuit 4 are arranged in parallel between power supply terminals la, lb, and lc and grounding terminals Id, le, and If This microprocessor 1 is connected to a power unit which has a primary battery or a secondary battery serving as a power source means that supplies an electric current.
  • a power unit which has a primary battery or a secondary battery serving as a power source means that supplies an electric current.
  • the battery impresses its voltage via a voltage impression terminal 5.
  • the "minimum operable voltage” (hereafter called a minimum operating voltage) is the voltage that is taken to be the minimum necessary for the device to operate. For example, if the value of the output voltage of the battery is less than the minimum operating voltage, the normal operation of the device is no longer guaranteed.
  • the power unit has a plurality of power source lines 6a, 6b, and 6c, which constitute power lines 6 that connect each of memory 2, CPU 3, and peripheral circuit 4 to the battery in parallel, and diodes 7, 8, and 9, which are electrical resistance means that increase electrical resistance of power source input lines 6b and 6c of the device, whose minimum operating voltage is low among these a plurality of power source lines 6a, 6b, and 6c.
  • Microprocessor 1 having such a composition is used for example, as a control means that controls an electronic device.
  • Memory 2 is a memory means into which data is written and from which it is read; for example, it consists of a flash memory, which is considered a nonvolatile memory. For example, data and programs to be used by CPU 3 are written into memory
  • This memory 2 is provided in microprocessor 1 between power supply terminal la, which receives power supplied from the power unit, and grounding terminal Id.
  • the minimum operating voltage of memory 2 is, for example, 2.4 V. Because internal boosted-voltage operation is required when data is written into it, the minimum operating voltage of memory 2 as a memory module requires a level of up to 2.4 V, and operation at less than this voltage is not guaranteed.
  • CPU core 3 is constituted as a control means that controls units including memory 2 and peripheral circuit 4.
  • CPU 3 is provided in microprocessor 1 between power supply terminal lb which receives power supplied from the power unit and grounding terminal le.
  • the minimum operating voltage of CPU 3 is, for example, 2.0 V. In the manufacture of CPU core 3, it is fabricated, for example by a CMOS process.
  • Peripheral circuit 4 is, for example, an interface circuit that outputs a signal to and input a signal from an external device.
  • the peripheral circuit 4 is provided in microprocessor 1 between power supply terminal lc, which receives power supplied from the power unit, and grounding terminal If The minimum operating voltage of this peripheral circuit 4 is, for example, 1.8 V.
  • the peripheral circuit 4 though being manufactured by a CMOS process made according to the same design rules as CPU core 3, has a slower operating speed than CPU 3, so its operation is guaranteed even at a low voltage level down to 1.8 V.
  • Memory 2, CPU 3, and peripheral circuit 4 comprise, for example, a hardware block of microprocessor 1, which is a so-called one-chip microprocessor developed for battery-driven devices.
  • the battery that supplies power to microprocessor 1, which consists of memory 2, CPU core 3, and peripheral circuit 4, is for example a primary battery or a secondary battery, as stated above. A 3-V output is produced by such battery. The output voltage value of the battery gradually decreases due to consumption of power by memory 2, CPU core 3, and peripheral circuit 4.
  • Power source lines 6a, 6b, and 6c are conducting wires for supplying power from the battery. Specifically, power source line 6a is connected to power supply terminal la, which is the power input unit of memory 2, power source line 6b is connected to power supply terminal lb, which is the power input unit of CPU 3, and power source line 6c is connected to power supply terminal lc, which is the power input unit of peripheral circuit 4.
  • power source lines 6a, 6b, and 6c the memory 2, CPU 3, and peripheral circuit 4 are in a state of being connected in parallel to the battery.
  • Diode 7 is inserted in power source line 6b, which is connected to CPU 3, and two diodes 8 and 9 are inserted in power source line 6c, which is connected to peripheral circuit 4.
  • the resistance values of diodes 7, 8, and 9 are set to the same value, yielding for example a voltage drop of 0.3 V (VF) on power source line 6b due to the insertion of diode 7, and a voltage drop of 0.6 V (VF X 2) on power source line 6c due to the insertion of diodes 8 and 9.
  • VF voltage drop of 0.3 V
  • VF X 2 voltage drop of 0.6 V
  • Microprocessor 1 and the power unit are constituted as described above.
  • diodes that cause a voltage drop when electrified apparently increase the resistance of CPU 3 and peripheral circuit 4 as electrical resistance, with the result that the combined resistance is increased and the flow of an electrical cu ⁇ ent is reduced, thereby suppressing the power consumption of the battery and extending the battery lifetime.
  • the electrical current flowing through each device is also decreased, and the electrical current ratio between devices is inversely proportional to the value of the resistance of each device including the diodes.
  • microprocessor 10 constituted in general as shown in Figure 2.
  • This microprocessor 10 has the same devices as microprocessor 1 shown in the above Figure 1; that is, it has memory 2, CPU 3, and peripheral circuit 4.
  • microprocessor 10 shown in this example has only one power supply terminal lg as a terminal by which power is supplied from the battery.
  • microprocessor 10 has inside it power supply input lines 11a, l ib, and l ie that branch and supply input current from this power supply terminal lg to memory 2, CPU 3, and peripheral circuit 4, respectively.
  • power source input line 11a connects memory 2 to power supply terminal lg
  • power supply input line l ib connects CPU 3 to input terminal lg
  • power input line l ie connects peripheral circuit 4 to input terminal lg.
  • microprocessor 10 like microprocessor 1, connects memory 2, CPU 3, and peripheral circuit 4 to the battery in parallel. And unlike microprocessor 1, microprocessor 10 does not have any diodes as electrical resistance means in the preceding stage of inputs of CPU 3 and peripheral circuit 4. Thus if the output voltage from the battery is 3.0 N the impressed voltage Vdd on each of memory 2, CPU 3, and peripheral circuit 4 of this microprocessor 10 is 3.0 V.
  • Figure 3 shows the voltage drop characteristics (electric discharge characteristics) of the battery due to the current consumption in microprocessor 1 and microprocessor 10. That is, the power source voltage for microprocessor 1 and microprocessor 10 is the 3.0 V that is impressed directly from the battery, and Figure 3 shows the change by which it naturally drops gradually together with the current consumption of each device.
  • Figure 3 in which the vertical axis represents the battery voltage and the horizontal axis represents the elapsed time of the current consumption, shows the timewise change in normalized units.
  • the actual electric discharge characteristics of the battery decline in a curved shape, but here, for convenient explanation, is it expressed as a straight line.
  • a common voltage is impressed on memory 2, CPU 3, and peripheral circuit 4, so due to the decline in battery voltage resulting from the current consumption of each device from 3.0 V, which is the battery's initial voltage, when each device's minimum operating voltage is reached, the operating limit of the microprocessor itself is reached, and in turn the battery lifetime for a device in which the microprocessor is a key component is finished.
  • microprocessor 10 shown in Figure 2 a common voltage is impressed on the constituent blocks of all of memory 2, CPU 3, and peripheral circuit 4, and the electric discharge characteristics in this case exhibit the downward trend of electric discharge curve A +C+ P as shown in Figure 3.
  • CPU core 3 can operate until point b (time 14), where the voltage reaches 2.0 V
  • the peripheral circuit 4 can operate until point c (time 17), where the voltage reaches 1.8 V, but because in fact memory 2 reaches 2.4 V, which is its minimum operating voltage, at point a (time 8.5), the battery lifetime for microprocessor 10 is finished at this point a.
  • the drop rate in the electric discharge becomes gentler by the decrease in the current consumption as compared with the curve of electric discharge curve A M +C+P of microprocessor 10, and in the case of memory 2, we see a declining trend that approaches the horizontal, as in electric discharge curve B .
  • the voltage is kept at all times lower than the Vdd of memory 2, lower by V F or by V F X 2, respectively, showing electric discharge curves B c and Bp, which show a declining trend that is similar to electric discharge curve B M of memory 2.
  • microprocessor 1 The electric discharge curves BM, Be, and Bp of memory 2, CPU 3, and peripheral circuit 4 of microprocessor 1 can thus be obtained, and if we consider the time it takes to reach the minimum operating voltage, in microprocessor 1, memory 2 reaches its minimum operating voltage of 2.4 V at point d (time 12), CPU 3 reaches its minimum operating voltage of 2.0 V at point b (time 14), and peripheral circuit 4 reaches its minimum operating voltage of 1.8 at point f (time 12).
  • the time it takes CPU 3 to reach its minimum operating voltage of 2.0 V is the same in both microprocessor 10 and microprocessor 1 (point b and point e agree at time 14), but this is just a coincidence.
  • the efficiency with which the battery's capacity is used can be increased and the usable battery lifetime for the system as a whole can be prolonged, even if the microprocessor consists of devices that have different minimum operating voltages.
  • Applying the present invention makes it possible, with the very simple composition of just inserting diodes in series, to reduce the current consumption of a power unit and extend the battery life of the system as a whole.
  • the diode V F characteristics and the number of them to be inserted one can design so that a plurality of circuit blocks of different minimum operating voltages approach their operating limit at approximately the same time, and can improve the efficiency with which the battery's capacity is used.
  • microprocessor 20 is constructed so as to have basically the same internal composition as microprocessor 10 shown in Figure 2 above, and as a circuit module in which this invention is applied, diode 21 is inserted in power source input line l ib, and diodes 22 and 23 are inserted in power source input line l ie. In this way, microprocessor 20 itself is given a configuration that suppresses current consumption.
  • This invention is not limited to being applied only to microprocessors as integrated circuits; it may also be applied to, for example, circuit blocks integrated on a chip or, even if not, separate chips or discrete circuits.
  • the higher resistance of the electrical resistance means is interposed in order to even out the current that flows in each parallel circuit block in a plurality of power source lines on which electrical resistance means are interposed or on power source lines. But if evening out the current is taken as the problem, the solution is not limited to this. If the current is to be evened out, one can also expect protection against overcurrent in circuit blocks.
  • the power unit of the present invention has a plurality of power source lines that connect in parallel each of the circuit blocks to the power source means that supplies electric current, an electrical resistance means that increases the electrical resistance of at least, among the a plurality of power source lines, those power source lines of the circuit blocks whose minimum operable voltage is low. Therefore, it becomes possible to increase by the electrical resistance means the overall electrical resistance of the circuit blocks connected in parallel to the power source means that supplies current, thereby suppressing the current consumption of the circuit block as a whole.
  • the electric current supply method of this invention suppresses the current consumption of the circuit blocks as a whole by supplying current while increasing the electrical resistance of, among the a plurality of power source lines that connect in parallel their respective circuit blocks to the power source means that supplies electric current at least the power source lines of the circuit blocks whose minimum operable voltage is low.
  • this electric current supply method allows consumption of power efficiently and extends the life of the battery even in a power unit that consists of a plurality of circuit blocks of different minimum operating voltage.
  • the integrated circuit of this invention has, either inside or outside the integrated circuit, a plurality of power source input lines that connect in parallel each of the circuit blocks to the power source means that supplies electric current, a plurality of electrical resistance means that increase the electrical resistance of, among the a plurality of power source input lines, at least the power source input lines of circuit blocks whose minimum operable voltage is low, makes it possible to increase by electrical resistance means the overall electrical resistance of the circuit blocks connected in parallel to the power source means that supplies electric current, thereby suppressing the current consumption in the integrated circuit.
  • a power unit that supplies electric current to this integrated circuit even if it consists of a plurality of circuit blocks of different minimum operating voltage, has gentle power consumption characteristics as the current flowing through each circuit block decreases, and can extend the battery life.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Sources (AREA)
  • Microcomputers (AREA)

Abstract

Pour régulariser la consommation de courant et prolonger la vie d'une batterie, même constituée de plusieurs blocs de circuit de tensions minimales de fonctionnement différentes, l'invention prévoit une alimentation comportant plusieurs lignes d'alimentation (6a, 6b, 6c) reliant chacune en parallèle une mémoire (2), une unité centrale (3), et un circuit (4) périphérique, à la batterie, et des diodes (7, 8, 9) jouant le rôle de résistances électriques qui augmentent la résistance électrique de celles des lignes d'alimentation (6b, 6c) des blocs de circuit dont la tension minimale de fonctionnement est basse.
PCT/JP1999/005254 1998-09-28 1999-09-27 Alimentation electrique, procede de fourniture de courant electrique et circuit integre WO2000019577A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000572974A JP2002527016A (ja) 1998-09-28 1999-09-27 電源装置、電流供給方法、及び集積回路
EP99944841A EP1046209A1 (fr) 1998-09-28 1999-09-27 Alimentation electrique, procede de fourniture de courant electrique et circuit integre

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP27360798 1998-09-28
JP10/273607 1998-09-28

Publications (1)

Publication Number Publication Date
WO2000019577A1 true WO2000019577A1 (fr) 2000-04-06

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Application Number Title Priority Date Filing Date
PCT/JP1999/005254 WO2000019577A1 (fr) 1998-09-28 1999-09-27 Alimentation electrique, procede de fourniture de courant electrique et circuit integre

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EP (1) EP1046209A1 (fr)
JP (1) JP2002527016A (fr)
WO (1) WO2000019577A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003049121A1 (fr) * 2001-11-29 2003-06-12 Intel Corporation Fonctionnement a basse tension de memoire ram statique

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4945224B2 (ja) 2006-11-30 2012-06-06 株式会社東芝 コントローラ、情報処理装置、および供給電圧制御方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0740386A1 (fr) * 1994-01-14 1996-10-30 Kabushiki Kaisha Toshiba Circuit fournisseur de tension d'alimentation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0740386A1 (fr) * 1994-01-14 1996-10-30 Kabushiki Kaisha Toshiba Circuit fournisseur de tension d'alimentation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003049121A1 (fr) * 2001-11-29 2003-06-12 Intel Corporation Fonctionnement a basse tension de memoire ram statique
JP2005512261A (ja) * 2001-11-29 2005-04-28 インテル・コーポレーション スタティック・ランダム・アクセス・メモリの低電圧動作
CN100433191C (zh) * 2001-11-29 2008-11-12 英特尔公司 静态随机访问存储器的低电压操作

Also Published As

Publication number Publication date
EP1046209A1 (fr) 2000-10-25
JP2002527016A (ja) 2002-08-20

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