WO2000014873A3 - Schaltungsanordnung und verfahren zur takterzeugung - Google Patents

Schaltungsanordnung und verfahren zur takterzeugung Download PDF

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Publication number
WO2000014873A3
WO2000014873A3 PCT/DE1999/002734 DE9902734W WO0014873A3 WO 2000014873 A3 WO2000014873 A3 WO 2000014873A3 DE 9902734 W DE9902734 W DE 9902734W WO 0014873 A3 WO0014873 A3 WO 0014873A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
clock pulses
generating clock
synchronization unit
tracking synchronization
Prior art date
Application number
PCT/DE1999/002734
Other languages
English (en)
French (fr)
Other versions
WO2000014873A2 (de
Inventor
Werner Dietrich
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Priority to AU10298/00A priority Critical patent/AU762120B2/en
Priority to EP99953649A priority patent/EP1112620A2/de
Priority to BR9913531-0A priority patent/BR9913531A/pt
Publication of WO2000014873A2 publication Critical patent/WO2000014873A2/de
Publication of WO2000014873A3 publication Critical patent/WO2000014873A3/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/10—Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Control Of Multiple Motors (AREA)

Abstract

Bei dieser Schaltungsanordnung wird eine Phasengleichheit in einer ersten Nachlaufsynchronisations-Einheit zwischen einem Führungssignal und einem Vergleichssignal dadurch erreicht, daß eine zweite Nachlaufsynchronisations-Einheit zur Bildung des Vergleichssignals verwendet wird, wobei ein erstes Ausgangssignal eines ersten Oszillators der ersten Nachlaufsynchronisations-Einheit und ein zweites Ausgangssignal eines zweiten Oszillators der zweiten Nachlaufsynchronisations-Einheit zur Bildung des Vergleichssignals verwendet wird.
PCT/DE1999/002734 1998-09-08 1999-09-01 Schaltungsanordnung und verfahren zur takterzeugung WO2000014873A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU10298/00A AU762120B2 (en) 1998-09-08 1999-09-01 Circuit and method for generating clock pulses
EP99953649A EP1112620A2 (de) 1998-09-08 1999-09-01 Schaltungsanordnung und verfahren zur takterzeugung
BR9913531-0A BR9913531A (pt) 1998-09-08 1999-09-01 Dispositivo de ligação e processo para a produção de tempo

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19841008 1998-09-08
DE19841008.5 1998-09-08

Publications (2)

Publication Number Publication Date
WO2000014873A2 WO2000014873A2 (de) 2000-03-16
WO2000014873A3 true WO2000014873A3 (de) 2000-06-02

Family

ID=7880236

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1999/002734 WO2000014873A2 (de) 1998-09-08 1999-09-01 Schaltungsanordnung und verfahren zur takterzeugung

Country Status (4)

Country Link
EP (1) EP1112620A2 (de)
AU (1) AU762120B2 (de)
BR (1) BR9913531A (de)
WO (1) WO2000014873A2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2363268B (en) 2000-06-08 2004-04-14 Mitel Corp Timing circuit with dual phase locked loops

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4186356A (en) * 1977-04-20 1980-01-29 Adret Electronique Phase locked loop frequency synthesizer and frequency modulator
DE3837246A1 (de) * 1988-10-28 1990-05-03 Siemens Ag Frequenzgenerator
US5128940A (en) * 1989-09-11 1992-07-07 Kabushiki Kaisha Toshiba Demultiplexer
EP0549881A1 (de) * 1991-11-29 1993-07-07 Alcatel SEL Aktiengesellschaft Frequenzsynthetisierer
US5734283A (en) * 1992-07-01 1998-03-31 Telelfonaktebolaget Lm Ericsson Demultiplexor circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4186356A (en) * 1977-04-20 1980-01-29 Adret Electronique Phase locked loop frequency synthesizer and frequency modulator
DE3837246A1 (de) * 1988-10-28 1990-05-03 Siemens Ag Frequenzgenerator
US5128940A (en) * 1989-09-11 1992-07-07 Kabushiki Kaisha Toshiba Demultiplexer
EP0549881A1 (de) * 1991-11-29 1993-07-07 Alcatel SEL Aktiengesellschaft Frequenzsynthetisierer
US5734283A (en) * 1992-07-01 1998-03-31 Telelfonaktebolaget Lm Ericsson Demultiplexor circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
AUSTIN J ET AL: "DOPPLER CORRECTION OF THE TELECOMMUNICATIONS PAYLOAD OSCILLATORS INTHE UK T-SAT", PROCEEDINGS OF THE EUROPEAN MICROWAVE CONFERENCE,GB,TUNBRIDGE WELLS, MICROWAVE EXHIBITIONS, vol. CONF. 18, 1988, pages 851 - 857, XP000094117 *

Also Published As

Publication number Publication date
EP1112620A2 (de) 2001-07-04
WO2000014873A2 (de) 2000-03-16
AU762120B2 (en) 2003-06-19
BR9913531A (pt) 2001-06-05
AU1029800A (en) 2000-03-27

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