WO2000003305A1 - A method for making a printed wiring board with heavy and thin conductive traces - Google Patents

A method for making a printed wiring board with heavy and thin conductive traces Download PDF

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Publication number
WO2000003305A1
WO2000003305A1 PCT/US1999/014866 US9914866W WO0003305A1 WO 2000003305 A1 WO2000003305 A1 WO 2000003305A1 US 9914866 W US9914866 W US 9914866W WO 0003305 A1 WO0003305 A1 WO 0003305A1
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WO
WIPO (PCT)
Prior art keywords
layer
conductive material
regions
conductive
applying
Prior art date
Application number
PCT/US1999/014866
Other languages
French (fr)
Inventor
Peter Giordano
Paul Sarrantonio
Original Assignee
Photocircuits Corporation
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Filing date
Publication date
Application filed by Photocircuits Corporation filed Critical Photocircuits Corporation
Publication of WO2000003305A1 publication Critical patent/WO2000003305A1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/243Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists

Definitions

  • This invention relates generally to a method for manufacturing a printed wiring board and. more particularly, relates to a method for making a circuit in a printed wiring board with heavy and thin conductive traces.
  • heavy conductive traces are used in power circuitry to carry high currents, while thin conductive traces are used in control or switching circuitry to carry low currents.
  • the high current traces dictate the copper thickness for all circuitry on the printed wiring board.
  • heavy conductive traces and thin conductive traces are not found in the same circuit on a printed wiring board.
  • heavy conductive traces limit the minimum line/space width of the circuitry which increases the size or layer count of the printed wiring board. Increasing the size of the final product, or layer count of the printed wiring board increases the cost of the board and/or the size.
  • One method for manufacturing a printed circuit wiring board with areas of heavy and thin conductive traces includes several steps. First, thin conductor traces on a printed circuit board substrate are formed and then covered with a solder mask insulating layer. Land areas are left exposed through the mask insulating layer. Next, a very thin layer of copper is placed over the solder mask insulating layer and the exposed land areas. Once the very thin layer of copper has been applied, photoimaged plating resist is applied over the very thin copper layer on the flat solder mask insulating layer exposing only areas for heavy copper plating. Next, another layer of copper is electroplated onto the exposed land areas. The photoimaged plating resist and the thin copper layer over the solder mask are then removed.
  • One example of a method like this is disclosed in U.S. Patent No. 4.528.259 to Sullivan which is hereby incorporated by reference. The above- described method for manufacturing printed circuit boards has several problems.
  • this method requires the deposit of a very thin layer of copper that will adhere to the land areas, but not adhere well to a surface of the solder mask insulatins. layer.
  • the process for depositing such a thin layer of copper and also for creating the surface on the permanent solder mask insulating layer which will not adhere well to the copper is difficult to do and is time consuming and thus is not practical for volume manufacturing.
  • the method requires an additional step of applying a solder mask to protect the heavy copper areas which makes the process even more time consuming to complete. Accordingly, mass producing printed circuit boards with this method would be very difficult.
  • this method requires the use of a solder mask insulating layer. however the use of such a layer may not be desired in certain applications. For example, in applications involving surface mount or direct chip attachment, the solder mask insulating layer is not wanted.
  • this method only teaches plating up land areas and through holes, not conductive traces or circuitry. There is no teaching or suggestion how heavy conductive traces could be formed on the same plane in the same circuity as the thin conductive traces.
  • a method for making a printed wiring board w ith heavy and thin conductor traces in accordance w ith one embodiment of the present inv ention includes providing a base material with a base surface and a first layer of conductive material w hich coats the base surface. Next, one or more heavy conductor traces are formed by apph ing a second layer of conductive material on to one or more regions of the first layer of conductive material. Once the heavv conductors are formed, one or more thin conductor traces arc formed bv removing one or more regions of the first layer of conductive material.
  • Another method for making a printed w iring board w ith heavy and thin conductor traces in accordance with the present in ention includes providing a base material with a base surface. Next, a first layer of conductive material is applied over the base surface. Once the first layer has been applied, a second layer of conductive material is applied on one or more first regions of the first layer of conductive material to form one or more first conductive traces. After the second lav er has been applied, one or more second regions of the first layer of conductiv e material are removed to form one or more second conductive traces.
  • Another method for making a printed w iring board with heavy and thin conductor traces in accordance with the present invention includes providing a base material with base surface. Next, one or more holes are drilled at least partially into the base material through the base surface. Once the hole(s) is/are drilled, a layer of conductive material is applied on to the base surface and the hole. Next, another layer of conductive material is applied on to one or more first regions of the first layer of conductive material. Once the second layer of conductive material has been applied, one or more second regions of the first layer of conductive material is removed.
  • Yet another method for making a printed iring board with heavy and thin conductor traces in accordance with the present invention includes prov iding a base material with base surface covered at least partially by a first layer of conductive material. Next, one or more holes are drilled through the first layer of conductive material and at least partially into the base material through the base surface. Once the hole(s) is/are drilled, a second layer of conductive material is applied on to the first lav er of conductive material and the hole. Next, a third layer of conductiv e material is applied on to one or more first regions of the first and second layers of conductiv e material. Once the third lav er of conductive material has been applied, one or more second regions of the first and second layers of conductive material are removed.
  • the method for making a printed wiring board in accordance with the present invention provides a number of advantages including prov iding a method which permits both heavy and thin conductor traces to be formed in a circuit on the same printed wiring board.
  • the size of or area required to make the circuit on the printed wiring board is reduced permitting more boards to be made in the same area as before.
  • This reduction in the size needed for the printed wiring board reduces the manufacturing costs.
  • This reduction in size also helps to miniaturize the products, such as cellular phones and portable computers, in which these printed wiring boards are used.
  • Another advantage of the present invention is that the method is easy to replicate with reliability . As a result, a high throughput of printed wiring boards can be manufactured with the method in accordance with the present inv ention.
  • FIGS. 1 -13 are perspective views of various stages of a process for making a printed wiring board with heavy and thin conductive traces in the same circuit in accordance with one embodiment of the present invention.
  • FIGS. 1 -13 A method for making a printed wiring board 10 with heavy conductive traces 12( 1 ) and through-holes 12(2) and thin conductive traces 16 in accordance with one embodiment of the present invention is illustrated in FIGS. 1 -13.
  • This method has several steps including providing a base material 18 with a base surface 20 and a first layer 24 of conductive material which coats the base surface 20.
  • one or more heavy conductor traces 12 are formed by applying a second layer 26 of conductive material on to one or more first regions 25 of the first layer 24 of conductive material.
  • one or more thin conductor traces 16 are formed by removing one or more second regions 27 of the first layer 24 of conductive material.
  • This method provides a number of advantages including providing a method which permits both heavy and thin conductor traces and holes 12 and 16 to be formed in a circuit on the same printed wiring board 10 and providing a method that is easy to replicate with reliability.
  • a base material 1 8 with a base surface 20 is provided.
  • the base surface 20 may be covered by an optional lav er 23 of conductive material.
  • a variety of different materials can be used as the base material 18. such as a metalized laminate, a pressed multilayer, or a dielectric coated substrate.
  • the base material 18 might be reinforced or non-reinforced. FR4 epoxy. polyimide. or any other electrically insulating material onto which a conductive metal or polymer can be placed.
  • the layer 23 of conductive material could be any type of metal, such as copper which is currently preferred. Typically, the thickness of the layer 23 of conductive material will range between about 0.000375 " and 0.0007 " .
  • an optional hole 22 is drilled through the layer 23 of conductive material and at least partially into the base material 18 through the base surface 20. Any technique for drilling holes can be used. such as drilling by mechanical, ultrasonic, plasma, or laser means. The size of each hole 22 will depend upon the particular application.
  • a layer 24 of conductive material is applied over the layer 23 of conductive material and the hole 22.
  • This layer 24 of conductive material coats the layer 23 of conductive material and the inside circumferential area of the hole 22.
  • the layer 24 of conductive material is a coating of electroless copper, although other conductive materials can be used as needed or desired.
  • the lay ers 23 and 24 of conductive material have a thickness ranging between about 0.00030 " and 0.000730".
  • the printed wiring board 10 could have one layer of conductive material or more than two layers of conductive material as needed or desired.
  • layers 23 and 24 of conductiv e material are used to form the thin conductive traces 16 and also are used to form the heavy conductive traces 12 with at least one additional layer 26 of conductive material.
  • an imaging material 30 is applied over the lay ers 23 and 24 of conductive material.
  • imaging materials 30 can be applied, such as photoimageable dry film, screened resist, laser ablated resist, or any other material or process which prevents deposition of conductive materials in selective areas.
  • dry film photoresist is the preferred imaging material 30.
  • a variety of different techniques for applying the imaging material 30 can also be used, such as standard lamination, wet lamination, vacuum lamination or any other technique which adheres the imaging material 30 to the layer 24 of conductive material.
  • the thickness of the imaging material 30 depends on the thickness of the final metalization required. In this particular embodiment, the imaging material 30 has a thickness ranging between about 0.0015 " and 0.0030 " .
  • one or more regions 25 or areas on the layers 23 and 24 of conductive material on the base material 18 which require another layer 26 of conductive material or metalization to form the heavy conductive traces 12( 1 ) or through hole 12(2) are defined on the imaging material 30.
  • Any method of defining the regions 25 on the imaging material 30 which prevents deposition of conductive materials in selective areas can be used, such as using ultraviolet (UV) radiation and artwork with a negative or positive image of the regions 25. a direct write system (where no physical artwork is required), or direct ablation of the imaging material can be used.
  • UV radiation ultraviolet
  • a direct write system where no physical artwork is required
  • direct ablation of the imaging material can be used.
  • another layer 26 of conductive material or metalization is applied to the exposed regions 25 through the imaging material 30.
  • a variety of different techniques for applying the layer 26 of conductive material can be used, such as an electrolytic plating process, an electroless plating process, or by a screening process.
  • a variety of conductive materials can be used, such as electrolytic plated copper which is preferred.
  • the thickness of the layer 26 of conductive material or metalization can vary depending upon the particular application requirements. In this particular embodiment, the layer 26 of conductive material has a thickness of between about 0.0005 " and 0.002 " and more preferably has a thickness of about 0.001 " .
  • the imaging material 30 is stripped using a technique, such as chemical dissolution.
  • the resulting heavy conductive traces 12( 1 ) and hole 12(2) have a thickness between about 0.0008 " and 0.003 " .
  • another imaging material 32 is applied over the layers 23. 24. and 26 of conductive material.
  • a variety of different techniques such as spray ing, dip coating, vacuum laminating, or electrodepositing. can be used to apply the imaging material 32 which ultimately protects the final thin conductive traces 16 or circuitry while exposing all extraneous layers 23 and 24 of conductive material to be removed by a technique, such as etching.
  • a thin relatively uniform resist thickness is used.
  • the preferred method is electrodeposited photoresist and the preferred thickness of the photoresist is about 0.0002 " .
  • regions or areas for the thin conductive traces 16 in the layers 23 and 24 of conductive material are defined.
  • the thin conductive traces 16 will be located in regions not covered by the layer 26 of conductive material where the heavy conductive traces 12( 1 ) and hole 12(2) are located.
  • Any method of defining the regions 27 to be removed can be used, such as using ultraviolet (UV) radiation and artwork with a negative or positive image of the region 27, a direct write system (where no physical artwork is required), or direct ablation.
  • the defined regions 27 do not include the location of the thin conductive traces 16 or the heavy conductive traces 12( 1 ) and hole 12(2).
  • the layers 23 and 24 of conductive material not covered by the imaging material 32 are removed.
  • the exposed regions 27 through the imaging material 32 are removed by chemical etching.
  • a variety of different chemistries can be used to etch the layers 23 and 24 of conductive material, such as cupric chloride.
  • the particular etchant used depends on the layer(s) 23 and 24 of conductive material and the chemical resistance of the remaining imaging material 32.
  • the thin conductive traces 16 are formed by applying, defining and developing an imaging material 32 and then etching the exposed layers 23 and 24 of conductive material, other techniques for forming the thin conductive traces 16 could also be used. For example, a laser could be used to remove the layers 23 and 24 of conductive material to create the desired thin conductive traces 16.
  • the imaging material 32 is stripped away. Again, a variety of different methods can be used to strip away the imaging material 32, such as chemical dissolution. The method used to strip the imaging material 32 away will depend upon the type of imaging material 32 being used. It is possible that step may not be necessary if additional layers of conductive material are to be added.
  • the method for making a printed wiring board 10 in accordance with the present invention provides a number of advantages.
  • the invention provides a method which permits both heavy and thin conductor traces 12 and 16 to be formed in a circuit on the same printed wiring board 10.
  • the size of the printed wiring board 10 can be reduced which reduces the cost of the printed wiring board 10 and helps to miniaturize products which use these printed wiring boards 10.
  • the invention also provides a method that is easy to replicate with reliability. As a result, a high throughput of printed wiring boards 10 can be manufactured with this method.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

A method for making a printed wiring board with heavy and thin conductor traces includes providing a base material (18) with a base surface and a first layer of conductive material (23) which coats the base surface. Next, one or more heavy conductor traces (12) are formed by applying a second layer of conductive material (26) on to one or more first regions of the first layer of conductive material (23). Once the heavy conductors (12) are formed, one or more thin conductor traces (16) are formed by removing one or more second regions of the first layer of conductive material (23).

Description

A METHOD FOR MAKING A PRINTED WIRING BOARD WITH HEAVY AND THIN CONDUCTIVE TRACES
FIELD OF THE INVENTION
This invention relates generally to a method for manufacturing a printed wiring board and. more particularly, relates to a method for making a circuit in a printed wiring board with heavy and thin conductive traces.
BACKGROUND OF THE INVENTION
On printed wiring boards, heavy conductive traces are used in power circuitry to carry high currents, while thin conductive traces are used in control or switching circuitry to carry low currents. Using current state of the art manufacturing techniques, the high current traces dictate the copper thickness for all circuitry on the printed wiring board. Typically, heavy conductive traces and thin conductive traces are not found in the same circuit on a printed wiring board. Using current state of the art manufacturing, heavy conductive traces limit the minimum line/space width of the circuitry which increases the size or layer count of the printed wiring board. Increasing the size of the final product, or layer count of the printed wiring board increases the cost of the board and/or the size.
If heavy and thin conductive traces could be formed in the same circuit on a printed wiring board, then the size or layer count of the printed wiring board could be reduced. Since the cost of producing a printed wiring board is essentially the same for a given amount of area or "real estate." then as the size of each circuit is reduced it allows more circuits to be produced in the same area with litter if any additional cost.
One method for manufacturing a printed circuit wiring board with areas of heavy and thin conductive traces includes several steps. First, thin conductor traces on a printed circuit board substrate are formed and then covered with a solder mask insulating layer. Land areas are left exposed through the mask insulating layer. Next, a very thin layer of copper is placed over the solder mask insulating layer and the exposed land areas. Once the very thin layer of copper has been applied, photoimaged plating resist is applied over the very thin copper layer on the flat solder mask insulating layer exposing only areas for heavy copper plating. Next, another layer of copper is electroplated onto the exposed land areas. The photoimaged plating resist and the thin copper layer over the solder mask are then removed. One example of a method like this is disclosed in U.S. Patent No. 4.528.259 to Sullivan which is hereby incorporated by reference. The above- described method for manufacturing printed circuit boards has several problems.
For example, this method requires the deposit of a very thin layer of copper that will adhere to the land areas, but not adhere well to a surface of the solder mask insulatins. layer. The process for depositing such a thin layer of copper and also for creating the surface on the permanent solder mask insulating layer which will not adhere well to the copper is difficult to do and is time consuming and thus is not practical for volume manufacturing. Additionally, the method requires an additional step of applying a solder mask to protect the heavy copper areas which makes the process even more time consuming to complete. Accordingly, mass producing printed circuit boards with this method would be very difficult.
Additionally, this method requires the use of a solder mask insulating layer. however the use of such a layer may not be desired in certain applications. For example, in applications involving surface mount or direct chip attachment, the solder mask insulating layer is not wanted.
Further, this method only teaches plating up land areas and through holes, not conductive traces or circuitry. There is no teaching or suggestion how heavy conductive traces could be formed on the same plane in the same circuity as the thin conductive traces.
- -
SUMMARY OF THE INVENTION
A method for making a printed wiring board w ith heavy and thin conductor traces in accordance w ith one embodiment of the present inv ention includes providing a base material with a base surface and a first layer of conductive material w hich coats the base surface. Next, one or more heavy conductor traces are formed by apph ing a second layer of conductive material on to one or more regions of the first layer of conductive material. Once the heavv conductors are formed, one or more thin conductor traces arc formed bv removing one or more regions of the first layer of conductive material.
Another method for making a printed w iring board w ith heavy and thin conductor traces in accordance with the present in ention includes providing a base material with a base surface. Next, a first layer of conductive material is applied over the base surface. Once the first layer has been applied, a second layer of conductive material is applied on one or more first regions of the first layer of conductive material to form one or more first conductive traces. After the second lav er has been applied, one or more second regions of the first layer of conductiv e material are removed to form one or more second conductive traces.
Another method for making a printed w iring board with heavy and thin conductor traces in accordance with the present invention includes providing a base material with base surface. Next, one or more holes are drilled at least partially into the base material through the base surface. Once the hole(s) is/are drilled, a layer of conductive material is applied on to the base surface and the hole. Next, another layer of conductive material is applied on to one or more first regions of the first layer of conductive material. Once the second layer of conductive material has been applied, one or more second regions of the first layer of conductive material is removed.
Yet another method for making a printed iring board with heavy and thin conductor traces in accordance with the present invention includes prov iding a base material with base surface covered at least partially by a first layer of conductive material. Next, one or more holes are drilled through the first layer of conductive material and at least partially into the base material through the base surface. Once the hole(s) is/are drilled, a second layer of conductive material is applied on to the first lav er of conductive material and the hole. Next, a third layer of conductiv e material is applied on to one or more first regions of the first and second layers of conductiv e material. Once the third lav er of conductive material has been applied, one or more second regions of the first and second layers of conductive material are removed.
The method for making a printed wiring board in accordance with the present invention provides a number of advantages including prov iding a method which permits both heavy and thin conductor traces to be formed in a circuit on the same printed wiring board. With the present inv ention, the size of or area required to make the circuit on the printed wiring board is reduced permitting more boards to be made in the same area as before. This reduction in the size needed for the printed wiring board reduces the manufacturing costs. This reduction in size also helps to miniaturize the products, such as cellular phones and portable computers, in which these printed wiring boards are used.
Another advantage of the present invention is that the method is easy to replicate with reliability . As a result, a high throughput of printed wiring boards can be manufactured with the method in accordance with the present inv ention.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1 -13 are perspective views of various stages of a process for making a printed wiring board with heavy and thin conductive traces in the same circuit in accordance with one embodiment of the present invention.
DETAILED DESCRIPTION
A method for making a printed wiring board 10 with heavy conductive traces 12( 1 ) and through-holes 12(2) and thin conductive traces 16 in accordance with one embodiment of the present invention is illustrated in FIGS. 1 -13. This method has several steps including providing a base material 18 with a base surface 20 and a first layer 24 of conductive material which coats the base surface 20. Next, one or more heavy conductor traces 12 are formed by applying a second layer 26 of conductive material on to one or more first regions 25 of the first layer 24 of conductive material. After the heavv conductive traces 12 are formed, one or more thin conductor traces 16 are formed by removing one or more second regions 27 of the first layer 24 of conductive material. This method provides a number of advantages including providing a method which permits both heavy and thin conductor traces and holes 12 and 16 to be formed in a circuit on the same printed wiring board 10 and providing a method that is easy to replicate with reliability.
Referring to FIG. 1. the method in accordance with one embodiment of the present invention is illustrated. First, a base material 1 8 with a base surface 20 is provided. The base surface 20 may be covered by an optional lav er 23 of conductive material. A variety of different materials can be used as the base material 18. such as a metalized laminate, a pressed multilayer, or a dielectric coated substrate. The base material 18 might be reinforced or non-reinforced. FR4 epoxy. polyimide. or any other electrically insulating material onto which a conductive metal or polymer can be placed. The layer 23 of conductive material could be any type of metal, such as copper which is currently preferred. Typically, the thickness of the layer 23 of conductive material will range between about 0.000375" and 0.0007".
Referring to FIG. 2. once the base material 18 with the layer 23 of conductive material is provided, an optional hole 22. if required by the particular application, it is drilled through the layer 23 of conductive material and at least partially into the base material 18 through the base surface 20. Any technique for drilling holes can be used. such as drilling by mechanical, ultrasonic, plasma, or laser means. The size of each hole 22 will depend upon the particular application.
Referring to FIG. 3. once the hole 22 is drilled, a layer 24 of conductive material is applied over the layer 23 of conductive material and the hole 22. This layer 24 of conductive material coats the layer 23 of conductive material and the inside circumferential area of the hole 22. In this particular embodiment, the layer 24 of conductive material is a coating of electroless copper, although other conductive materials can be used as needed or desired. In this particular embodiment, the lay ers 23 and 24 of conductive material have a thickness ranging between about 0.00030" and 0.000730". Although two layers 23 and 24 of conductive material are shown the printed wiring board 10 could have one layer of conductive material or more than two layers of conductive material as needed or desired. As explained in greater detail below, layers 23 and 24 of conductiv e material are used to form the thin conductive traces 16 and also are used to form the heavy conductive traces 12 with at least one additional layer 26 of conductive material.
Referring to FIG. 4. once the layer 24 of conductive material has been applied, an imaging material 30 is applied over the lay ers 23 and 24 of conductive material. A variety of different imaging materials 30 can be applied, such as photoimageable dry film, screened resist, laser ablated resist, or any other material or process which prevents deposition of conductive materials in selective areas. In this particular embodiment, dry film photoresist is the preferred imaging material 30. A variety of different techniques for applying the imaging material 30 can also be used, such as standard lamination, wet lamination, vacuum lamination or any other technique which adheres the imaging material 30 to the layer 24 of conductive material. The thickness of the imaging material 30 depends on the thickness of the final metalization required. In this particular embodiment, the imaging material 30 has a thickness ranging between about 0.0015" and 0.0030".
Referring to FIG. 5 and 6. once the layer of imaging material 30 has been applied, one or more regions 25 or areas on the layers 23 and 24 of conductive material on the base material 18 which require another layer 26 of conductive material or metalization to form the heavy conductive traces 12( 1 ) or through hole 12(2) are defined on the imaging material 30. Any method of defining the regions 25 on the imaging material 30 which prevents deposition of conductive materials in selective areas can be used, such as using ultraviolet (UV) radiation and artwork with a negative or positive image of the regions 25. a direct write system (where no physical artwork is required), or direct ablation of the imaging material can be used. Once the regions 25 are defined in the imaging material 30 the imaging material 30 is developed to expose areas for the application of another layer of conductive material or metalization.
Referring to FIGS. 7. once the imaging material 30 has been defined and developed, another layer 26 of conductive material or metalization is applied to the exposed regions 25 through the imaging material 30. A variety of different techniques for applying the layer 26 of conductive material can be used, such as an electrolytic plating process, an electroless plating process, or by a screening process. A variety of conductive materials can be used, such as electrolytic plated copper which is preferred. The thickness of the layer 26 of conductive material or metalization can vary depending upon the particular application requirements. In this particular embodiment, the layer 26 of conductive material has a thickness of between about 0.0005" and 0.002" and more preferably has a thickness of about 0.001".
Referring to FIG. 8. once the layer 26 of conductive material or metalization has been applied, then the imaging material 30 is stripped using a technique, such as chemical dissolution. The resulting heavy conductive traces 12( 1 ) and hole 12(2) have a thickness between about 0.0008" and 0.003". By forming the heavy conductive traces 12( 1 ) and hole 12(2) before forming the thin conductive traces 16. the present invention eliminates some of the steps used in prior methods which are difficult and time consuming to implement and result in a low production throughput.
Referring to FIG. 9, once the heavy conductive traces 12( 1 ) and hole 12(2) are formed, another imaging material 32 is applied over the layers 23. 24. and 26 of conductive material. Again, a variety of different techniques, such as spray ing, dip coating, vacuum laminating, or electrodepositing. can be used to apply the imaging material 32 which ultimately protects the final thin conductive traces 16 or circuitry while exposing all extraneous layers 23 and 24 of conductive material to be removed by a technique, such as etching. To ensure coverage in the hole 22 and protection on the sides of the heavy conductive traces 12( 1), a thin relatively uniform resist thickness is used. In this particular embodiment, the preferred method is electrodeposited photoresist and the preferred thickness of the photoresist is about 0.0002".
Referring to FIGS. 10 and 1 1. once the imaging material 32 has been applied, regions or areas for the thin conductive traces 16 in the layers 23 and 24 of conductive material are defined. The thin conductive traces 16 will be located in regions not covered by the layer 26 of conductive material where the heavy conductive traces 12( 1 ) and hole 12(2) are located. Any method of defining the regions 27 to be removed can be used, such as using ultraviolet (UV) radiation and artwork with a negative or positive image of the region 27, a direct write system (where no physical artwork is required), or direct ablation. The defined regions 27 do not include the location of the thin conductive traces 16 or the heavy conductive traces 12( 1 ) and hole 12(2). Once the regions 27 in the imaging material are defined, the imaging material 32 is developed to define the regions 27 which are to be removed by a process, such as etching by chemical dissolution.
Referring to FIG. 12. once the imaging material 32 is developed, the layers 23 and 24 of conductive material not covered by the imaging material 32 are removed. In this particular embodiment, the exposed regions 27 through the imaging material 32 are removed by chemical etching. A variety of different chemistries can be used to etch the layers 23 and 24 of conductive material, such as cupric chloride. The particular etchant used depends on the layer(s) 23 and 24 of conductive material and the chemical resistance of the remaining imaging material 32. Once the removal step is completed, the resulting thin conductive traces 16 have a thickness ranging between about 0.000030" and 0.0007".
Although in this particular embodiment, the thin conductive traces 16 are formed by applying, defining and developing an imaging material 32 and then etching the exposed layers 23 and 24 of conductive material, other techniques for forming the thin conductive traces 16 could also be used. For example, a laser could be used to remove the layers 23 and 24 of conductive material to create the desired thin conductive traces 16.
Referring to FIG. 13. once the thin conductive traces 16 are formed, the imaging material 32 is stripped away. Again, a variety of different methods can be used to strip away the imaging material 32, such as chemical dissolution. The method used to strip the imaging material 32 away will depend upon the type of imaging material 32 being used. It is possible that step may not be necessary if additional layers of conductive material are to be added.
As illustrated in the one embodiment of the method disclosed above, the method for making a printed wiring board 10 in accordance with the present invention provides a number of advantages. For example, the invention provides a method which permits both heavy and thin conductor traces 12 and 16 to be formed in a circuit on the same printed wiring board 10. As a result, the size of the printed wiring board 10 can be reduced which reduces the cost of the printed wiring board 10 and helps to miniaturize products which use these printed wiring boards 10. The invention also provides a method that is easy to replicate with reliability. As a result, a high throughput of printed wiring boards 10 can be manufactured with this method. Having thus described the basic concept of the invention, it will be rather apparent to those skilled in the art that the foregoing detailed disclosure is intended to be presented by way of example only, and is not limiting. Various alternations, improvements, and modifications will occur and are intended to those skilled in the art. though not expressly stated herein. These alterations, improvements, and modifications are intended to be suggested hereby, and are within the spirit and scope of the invention. Accordingly, the invention is limited only by the following claims and equivalents thereto.

Claims

1 . A method for making a printed wiring board comprising: providing a base material with a base surface and a first layer of conductive material coating the base surface: forming one or more first conductive traces by applying a second layer of conductive material on to one or more first regions of the first layer of conductive material: and forming one or more second conductive traces by removing one or more second regions of the first layer of conductive material after forming the first conductive traces.
2. The method as set forth in claim 1 wherein the step of forming one or more first conductive traces further comprises: applying a first imaging material over the first layer of conductive material; and defining and developing the first regions of the first imaging material before applying the second layer of conductive material to the first regions.
3. The method as set forth in claim 2 further comprising the step of stripping the first imaging material.
4. The method as set forth in claim 1 wherein the step of forming one or more second conductive traces comprises: applying a second imaging material over the first layer of conductive material and the second layer of conductive material; and defining and developing the second regions of the second imaging material before removing the second regions of the first layer of conductive material.
5. The method as set forth in claim 4 further comprising the step of stripping the second imaging material.
6. The method as set forth in claim 1 wherein the step of forming one or more second conductive traces by removing the second regions of the first layer of conductive material after forming the first conductive traces comprises using a laser to remove the second regions.
7. The method for making a printed wiring board according to claim 1 wherein the first conductive traces have a thickness ranging between about 0.0007 inches and 0.0042 inches and the second conductive traces have a thickness ranging between about 0.000030 inches and 0.0007 inches.
8. A method for making a printed wiring board comprising: providing a base material with a base surface; applying a first layer of conductive material on to the base surface: applying a second layer of conductive material on to one or more first regions of the first layer of conductive material to form first conductive areas; and removing one or more second regions of the first layer of conductive material to form second conductive areas after completing the step of applying the second layer of conductive material, wherein the thickness of each of the first conductive areas is greater than the thickness of each of the second conductive areas.
9. The method as set forth in claim 8 wherein the step of applying a second layer of conductive material further comprises: applying a first imaging material over the first layer of conductive material; and defining and developing the first regions of the first imaging material before the step of applying the second layer of conductive material to the first regions.
10. The method as set forth in claim 9 further comprising stripping the first imaging material.
1 1. The method as set forth in claim 8 wherein the step of removing second regions of the first layer of conductive material further comprises: applying a second imaging material over the first layer of conductive material and the second laver of conductive material; and defining and developing the second regions of the second imaging material before the step of removing one or more second regions of the first layer of conductive material to form second conductive areas.
12. The method as set forth in claim 1 1 further comprising the step of stripping the second imaging material.
13. The method as set forth in claim 8 wherein the step of removing one or more second regions of the first lay er of conductive material to form second conductive areas comprises using a laser to remove the second regions.
14. The method for making a printed wiring board according to claim 8 wherein the heavy conductor traces hav e a thickness ranging between about 0.0007 inches and 0.0042 inches and the thin conductor traces have a thickness ranging between about 0.000030 inches and 0.0007 inches.
15. A method for making a printed wiring board comprising: providing a base material with base surface; drilling one or more holes at least partially into the base material; applying a first layer of conductive material on to the base surface; applying a second layer of conductive material on to one or more first regions of the first layer of conductive material; and removing one or more second regions of the first layer of conductive material after applying the second layer of conductive material.
16. The method as set forth in claim 15 wherein the step of applying a second layer of conductive material further comprises: applying a first imaging material over the first layer of conductive material: and defining and developing the first regions of the first imaging material before the step of applying the second layer of conductive material to the first regions.
17. The method as set forth in claim 16 further comprising stripping the first imaging material.
18. The method as set forth in claim 15 wherein the step of removing second regions of the first layer of conductive material further comprises: applying a second imaging material over the first lay er of conductive material: and defining and developing the second regions of the second imaging material before the step of removing second regions of the first lay er of conductive material.
19. The method as set forth in claim 18 further comprising stripping the second imaging material
20. The method as set forth in claim 15 wherein the step of removing second regions of the first layer of conductive material comprises using a laser to remove the second regions.
21. The method for making a printed w iring board according to claim 15 wherein the heavy conductor traces have a thickness ranging between about 0.0007 inches and 0.0042 inches and the thin conductor traces have a thickness ranging between about 0.000030 inches and 0.0007 inches.
22. A method for making a printed wiring board comprising: providing a base material with base surface covered at least partially by a first layer of conductive material; drilling one or more holes through the first layer of conductive material and at least partially into the base material: applying a second layer of conductive material on to the first layer of conductive material and the hole; applying a third layer of conductive material on to one or more first regions of the first and second layers of conductive material; and removing one or more second regions of the first and second layers of conductive material after applying the third layer of conductive material.
23. The method as set forth in claim 22 wherein the step of applying a third layer of conductive material further comprises: applying a first imaging material over the first and second layers of conductive material; and defining and developing the first regions of the first imaging material before the step of applying the third layer of conductive material to the first regions.
24. The method as set forth in claim 23 further comprising stripping the first imaging material.
25. The method as set forth in claim 22 wherein the step of removing second regions of the first and second layers of conductive material further comprises: applying a second imaging material over the first, second, and third layers of conductive material; and defining and developing the second regions of the second imaging material before the step of removing second regions of the first and second layers of conductive material.
26. The method as set forth in claim 22 further comprising stripping the second imaging material
27. The method as set forth in claim 22 wherein the step of removing second regions of the first and second layers of conductive material comprises using a laser to remove the second regions.
28. The method for making a printed wiring board according to claim 22 wherein the heavy conductor traces have a thickness ranging between about 0.0007 inches and 0.0042 inches and the thin conductor traces have a thickness ranging between about 0.000030 inches and 0.0007 inches.
PCT/US1999/014866 1998-07-10 1999-07-08 A method for making a printed wiring board with heavy and thin conductive traces WO2000003305A1 (en)

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US11385398A 1998-07-10 1998-07-10
US09/113,853 1998-07-10

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Citations (7)

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US3471631A (en) * 1968-04-03 1969-10-07 Us Air Force Fabrication of microminiature multilayer circuit boards
US4024631A (en) * 1975-11-24 1977-05-24 Xerox Corporation Printed circuit board plating process
US4104111A (en) * 1977-08-03 1978-08-01 Mack Robert L Process for manufacturing printed circuit boards
US4925525A (en) * 1988-04-11 1990-05-15 Minolta Camera Kabushiki Kaisha Process for producing a printed circuit board
US5377406A (en) * 1992-11-27 1995-01-03 Cmk Corporation Process for producing a printed circuit board
US5759416A (en) * 1995-11-24 1998-06-02 U.S. Philips Corporation Method of selectively removing a metallic layer from a non-metallic substrate
US5881455A (en) * 1993-05-19 1999-03-16 Murata Manufacturing Co., Ltd. Method of fabricating through-holed wiring board

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3471631A (en) * 1968-04-03 1969-10-07 Us Air Force Fabrication of microminiature multilayer circuit boards
US4024631A (en) * 1975-11-24 1977-05-24 Xerox Corporation Printed circuit board plating process
US4104111A (en) * 1977-08-03 1978-08-01 Mack Robert L Process for manufacturing printed circuit boards
US4925525A (en) * 1988-04-11 1990-05-15 Minolta Camera Kabushiki Kaisha Process for producing a printed circuit board
US5377406A (en) * 1992-11-27 1995-01-03 Cmk Corporation Process for producing a printed circuit board
US5881455A (en) * 1993-05-19 1999-03-16 Murata Manufacturing Co., Ltd. Method of fabricating through-holed wiring board
US5759416A (en) * 1995-11-24 1998-06-02 U.S. Philips Corporation Method of selectively removing a metallic layer from a non-metallic substrate

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