WO1999060614A1 - Poste tampon pour plaquettes et procede de transfert plaquette par plaquette entre des postes d'usinage - Google Patents

Poste tampon pour plaquettes et procede de transfert plaquette par plaquette entre des postes d'usinage Download PDF

Info

Publication number
WO1999060614A1
WO1999060614A1 PCT/US1999/009602 US9909602W WO9960614A1 WO 1999060614 A1 WO1999060614 A1 WO 1999060614A1 US 9909602 W US9909602 W US 9909602W WO 9960614 A1 WO9960614 A1 WO 9960614A1
Authority
WO
WIPO (PCT)
Prior art keywords
station
wafers
wafer
processing
work
Prior art date
Application number
PCT/US1999/009602
Other languages
English (en)
Inventor
Zvi Lapidot
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to EP99921607A priority Critical patent/EP1082755A1/fr
Priority to KR1020007012929A priority patent/KR20010043705A/ko
Priority to JP2000550142A priority patent/JP2002516485A/ja
Publication of WO1999060614A1 publication Critical patent/WO1999060614A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67763—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
    • H01L21/67778—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading involving loading and unloading of wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67745—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices

Definitions

  • This invention relates to a method and an apparatus for improving throughput
  • invention relates to a method and apparatus for improving and optimizing the rate of
  • FIG. 1 One such station is depicted in Figure 1 and generally
  • the station 10 comprises a transfer chamber 11 with a suitable
  • Two load lock chambers 13 are mounted on two other facets of the transfer
  • mini-environment also called Factory Interface, FI
  • a robot schematically indicated at 14 operates to transfer the
  • the mini-environment serves as a clean
  • Such a mini-environment may be a
  • Fremont, CA Fremont, CA. It includes an enclosure 16 and several (four in this example) wafer
  • the enclosure 16 houses a track robot 19 for
  • the robot 19 is available from Equipe Technologies of Sunnyvale, CA.
  • the robot 19 is also known as
  • the work stations could be differently structured and, for instance, comprise
  • pods or cassettes
  • transferring the pods between stations can increase the number
  • processing line and between adjacent work stations so as to eliminate, or at least
  • the present invention provides a method of transfer of wafers between two
  • preceding stations adjacent work stations, hereinafter called the "preceding" or A stations and the
  • the transfer of wafers to and from the buffer station is carried on by the transfer of wafers to and from the buffer station.
  • the buffer station can be a simple stage having
  • the buffer station includes an inspection or
  • Fig. 1 is a schematic plan view of a work station according to the prior
  • Fig. 2 is a schematic plan view of individual wafer transfer between
  • Fig. 3 is a schematic plan view of a second embodiment of the
  • Fig. 4 is a schematic plan view of a third embodiment of the present
  • Fig. 5 is a schematic plan view of a fourth embodiment of the present
  • Fig. 6 is a cut-away view of a buffer station suitable for use in the
  • Fig. 2 schematically illustrates an embodiment of the invention, comprising
  • the pod loaders by numerals 33-36 and 43-46; and the wafer aligners are
  • a buffer station 50 is placed between the two mini-
  • the buffer station can be implemented as a simple support
  • ca be a part of the mini-environments, or can include an inspection and/or
  • the buffer station 50 includes an inspection tool 51, such as, for example
  • the inspection tool 51 is schematically indicated as comprising a mechanical structure 52, which
  • Said wafer is rotated by turntable 53 and is scanned by scanning means, not
  • the scanning may be carried out by laser beams and the wafer be classified
  • reaction being defined by the intensity of the light scattered by each
  • the inspection tool 51 may comprise one or more
  • the wafer may be held stationary and the optical head
  • the wafers are individually
  • wafers are classified as approved or suspect wafers, according to said
  • a wafer inspection or control apparatus as described in the said patent application is located
  • Suspect wafers can be taken offline to another apparatus,
  • Transfers of the individual wafers are preferably carried out by robots 36
  • the amount of wafers that are so individually transferred is controlled by the
  • FAB controller so as to maximize throughput, or, in other words, to eliminate or
  • loading station A and unloading station B or, if more than two successive stations are
  • the production rate in a work station is determined not only by the time required for the various process stages, but also by
  • station A the overall throughput of station A is increase; and if station B, at a particular time,
  • this embodiment has the further advantage that they are inspected/controlled in
  • control is generally statistical in nature.
  • a statistical control is generally statistical in nature.
  • wafer transfer should receive as pertinent data inputs: a) the programmed processing
  • a program can be formulated to determine the ratio
  • a sampling plan may be implemented. If the wafer is to be inspected, the
  • inspection tool 51 inspects the wafer and, upon completion, indicated to the controller
  • track robot 43 retrieves the wafer from buffer station 50 and
  • processing requires the fab controller to synchronize the operations of the track robots
  • FIG. 1 also depicts (in broken lines) an optional dedicated robot 55. This
  • robot can be used to transfer wafers from the mini-environment 31 of station 30 to the
  • robot 55 may remove it from the fabrication line
  • buffer station 50 has no operative function. Rather, it merely serves as a waiting
  • the buffer station 50 may include a table 56 supporting a
  • the buffer station is
  • a buffer station 50' is inserted partially in station 30 and partially in station 40, and
  • buffer station 50' may include several chucks 58' for holding several wafers. This
  • Figure 6 depicts parts of the two mini-environments 31 and 41
  • Track robot 36 is depicted with its arm vertically retrieved
  • track robot 43 is depicted with its arm partially vertically elevated.
  • a wafer 59 is depicted resting on the middle chuck.
  • track robot 36 can place wafers on the chucks on its own
  • track robot 43 can retrieve the wafer on its own pace.
  • one or more wafer pods connected to any of pod loaders 33-36 and 43-46, can be any of pod loaders 33-36 and 43-46.
  • buffer used as a "buffer" pod for pods in a queue for the inspection station 51.

Abstract

L'invention concerne un poste tampon permettant d'effectuer un transfert plaquette par plaquette entre différentes postes d'usinage. Les plaquettes sont tout d'abord extraites d'une cassette par un robot de guidage au niveau d'un premier poste d'usinage, avant d'être traitées. Une fois achevé le traitement effectué à ce premier poste d'usinage, ledit robot de guidage saisit la plaquette et au lieu de la remettre dans le cassette, la place dans un poste tampon. Une fois le second poste d'usinage prêt à accepter cette plaquette, son robot de guidage extrait celle-ci dudit poste tampon pour ensuite l'insérer dans le second poste d'usinage, en vue d'un traitement. Une fois ce traitement achevé dans ce second poste de traitement, le robot de guidage insère alors la plaquette dans une cassette située dans le second poste de traitement.
PCT/US1999/009602 1998-05-18 1999-04-30 Poste tampon pour plaquettes et procede de transfert plaquette par plaquette entre des postes d'usinage WO1999060614A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP99921607A EP1082755A1 (fr) 1998-05-18 1999-04-30 Poste tampon pour plaquettes et procede de transfert plaquette par plaquette entre des postes d'usinage
KR1020007012929A KR20010043705A (ko) 1998-05-18 1999-04-30 워크 스테이션간에 웨이퍼당 이송을 위한 웨이퍼 버퍼스테이션과 방법
JP2000550142A JP2002516485A (ja) 1998-05-18 1999-04-30 ウェハバッファステーションおよびワークステーション間のウェハ毎の転送方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8022298A 1998-05-18 1998-05-18
US09/080,222 1998-05-18

Publications (1)

Publication Number Publication Date
WO1999060614A1 true WO1999060614A1 (fr) 1999-11-25

Family

ID=22156019

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/009602 WO1999060614A1 (fr) 1998-05-18 1999-04-30 Poste tampon pour plaquettes et procede de transfert plaquette par plaquette entre des postes d'usinage

Country Status (4)

Country Link
EP (1) EP1082755A1 (fr)
JP (1) JP2002516485A (fr)
KR (1) KR20010043705A (fr)
WO (1) WO1999060614A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1134641A1 (fr) * 2000-03-16 2001-09-19 Applied Materials, Inc. Appareil de stockage et de transport d'une cassette
WO2003060964A1 (fr) * 2002-01-15 2003-07-24 Applied Materials, Inc. Appareil et procede permettant d'ameliorer le rendement dans un outil a plusieurs chambres pour le traitement de tranches de semi-conducteur
WO2003100837A2 (fr) * 2002-05-23 2003-12-04 Applied Materials, Inc. Systeme de test de grands substrats
US7075323B2 (en) 2004-07-29 2006-07-11 Applied Materials, Inc. Large substrate test system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7578650B2 (en) * 2004-07-29 2009-08-25 Kla-Tencor Technologies Corporation Quick swap load port

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0187249A2 (fr) * 1984-11-30 1986-07-16 Kabushiki Kaisha Toshiba Appareil pour la production de dispositifs semi-conducteurs
EP0429270A2 (fr) * 1989-11-20 1991-05-29 Kokusai Electric Co., Ltd. Méthode et appareil pour la gravure en continu
EP0475604A1 (fr) * 1990-08-29 1992-03-18 Hitachi, Ltd. Dispositif de traitement sous vide et sa méthode de nettoyage
US5286296A (en) * 1991-01-10 1994-02-15 Sony Corporation Multi-chamber wafer process equipment having plural, physically communicating transfer means
WO1994014185A1 (fr) * 1992-12-04 1994-06-23 Materials Research Corporation Procede et appareil pour machine de traitement de tranches a module frontal avant sous vide___________________________________
EP0837494A2 (fr) * 1996-10-21 1998-04-22 Applied Materials, Inc. Procédé et dispositif de planification basé sur priorité de traitement de plaquettes dans une système à plusieurs chambres de manipulation de plaquettes semi-conductrices

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0187249A2 (fr) * 1984-11-30 1986-07-16 Kabushiki Kaisha Toshiba Appareil pour la production de dispositifs semi-conducteurs
EP0429270A2 (fr) * 1989-11-20 1991-05-29 Kokusai Electric Co., Ltd. Méthode et appareil pour la gravure en continu
EP0475604A1 (fr) * 1990-08-29 1992-03-18 Hitachi, Ltd. Dispositif de traitement sous vide et sa méthode de nettoyage
US5286296A (en) * 1991-01-10 1994-02-15 Sony Corporation Multi-chamber wafer process equipment having plural, physically communicating transfer means
WO1994014185A1 (fr) * 1992-12-04 1994-06-23 Materials Research Corporation Procede et appareil pour machine de traitement de tranches a module frontal avant sous vide___________________________________
EP0837494A2 (fr) * 1996-10-21 1998-04-22 Applied Materials, Inc. Procédé et dispositif de planification basé sur priorité de traitement de plaquettes dans une système à plusieurs chambres de manipulation de plaquettes semi-conductrices

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1134641A1 (fr) * 2000-03-16 2001-09-19 Applied Materials, Inc. Appareil de stockage et de transport d'une cassette
US6506009B1 (en) 2000-03-16 2003-01-14 Applied Materials, Inc. Apparatus for storing and moving a cassette
US6955517B2 (en) 2000-03-16 2005-10-18 Applied Materials, Inc. Apparatus for storing and moving a cassette
US7234908B2 (en) 2000-03-16 2007-06-26 Applied Materials, Inc. Apparatus for storing and moving a cassette
KR100905565B1 (ko) * 2000-03-16 2009-07-02 어플라이드 머티어리얼스, 인코포레이티드 카세트 저장 및 이송 장치
WO2003060964A1 (fr) * 2002-01-15 2003-07-24 Applied Materials, Inc. Appareil et procede permettant d'ameliorer le rendement dans un outil a plusieurs chambres pour le traitement de tranches de semi-conducteur
WO2003100837A2 (fr) * 2002-05-23 2003-12-04 Applied Materials, Inc. Systeme de test de grands substrats
WO2003100837A3 (fr) * 2002-05-23 2004-03-04 Applied Materials Inc Systeme de test de grands substrats
JP2005528786A (ja) * 2002-05-23 2005-09-22 アプライド　マテリアルズ　インコーポレイテッド 大型基板検査システム
US7129694B2 (en) 2002-05-23 2006-10-31 Applied Materials, Inc. Large substrate test system
US7075323B2 (en) 2004-07-29 2006-07-11 Applied Materials, Inc. Large substrate test system

Also Published As

Publication number Publication date
JP2002516485A (ja) 2002-06-04
EP1082755A1 (fr) 2001-03-14
KR20010043705A (ko) 2001-05-25

Similar Documents

Publication Publication Date Title
US6208751B1 (en) Cluster tool
EP0756316B1 (fr) Dispositif de traitement sous vide et ligne de fabrication de semi-conducteurs utilisant ce dispositif
US8292563B2 (en) Nonproductive wafer buffer module for substrate processing apparatus
US10672633B2 (en) Removable compartments for workpiece stocker
US8812150B2 (en) Semiconductor manufacturing process modules
US20090028669A1 (en) Removable compartments for workpiece stocker
US20030091410A1 (en) Reduced footprint tool for automated processing of microelectronic substrates
JP2003282669A (ja) 基板の搬送方法及びその装置
JP7349240B2 (ja) 基板倉庫及び基板検査方法
US20070023683A1 (en) Vacuum processing apparatus and vacuum processing method
EP2092556B1 (fr) Compartiments pour élément de stockage de pièces
US6156580A (en) Semiconductor wafer analysis system and method
US6401008B1 (en) Semiconductor wafer review system and method
WO1999060614A1 (fr) Poste tampon pour plaquettes et procede de transfert plaquette par plaquette entre des postes d'usinage
US20050121627A1 (en) System and method for serial ion implanting productivity enhancements
US20030082031A1 (en) Wafer handling device and method for testing wafers
US20240021457A1 (en) Substrate processing apparatus and substrate processing method
US6881914B2 (en) Apparatus and method for handling, storing and reloading carriers for disk-shaped items, such as semiconductor wafers or CDs
WO2024059234A1 (fr) Nettoyage embarqué de parties d'outillage dans un outil de liaison hybride
KR20230045765A (ko) EFEM(Equipment Front End Module) 및 이를 포함하는 파괴 분석 자동화 설비
JP2617790B2 (ja) 処理方法
KR20060040432A (ko) 복수의 기판을 이송하기 위한 반도체 제조용 기판 이송 장치

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP KR SG

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
ENP Entry into the national phase

Ref country code: JP

Ref document number: 2000 550142

Kind code of ref document: A

Format of ref document f/p: F

WWE Wipo information: entry into national phase

Ref document number: 1020007012929

Country of ref document: KR

WWE Wipo information: entry into national phase

Ref document number: 1999921607

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1999921607

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1020007012929

Country of ref document: KR

WWW Wipo information: withdrawn in national office

Ref document number: 1020007012929

Country of ref document: KR

WWW Wipo information: withdrawn in national office

Ref document number: 1999921607

Country of ref document: EP