WO1999059391A3 - Method and apparatus for data sample clock recovery - Google Patents

Method and apparatus for data sample clock recovery Download PDF

Info

Publication number
WO1999059391A3
WO1999059391A3 PCT/US1999/010225 US9910225W WO9959391A3 WO 1999059391 A3 WO1999059391 A3 WO 1999059391A3 US 9910225 W US9910225 W US 9910225W WO 9959391 A3 WO9959391 A3 WO 9959391A3
Authority
WO
WIPO (PCT)
Prior art keywords
time stamp
stamp values
difference value
difference
data sample
Prior art date
Application number
PCT/US1999/010225
Other languages
French (fr)
Other versions
WO1999059391A2 (en
Inventor
Robert W Moses
Gregory J Bartlett
Allen R Goldstein
Brian D Karr
Original Assignee
Digital Harmony Technologies L
Robert W Moses
Gregory J Bartlett
Allen R Goldstein
Brian D Karr
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Harmony Technologies L, Robert W Moses, Gregory J Bartlett, Allen R Goldstein, Brian D Karr filed Critical Digital Harmony Technologies L
Priority to JP2000549078A priority Critical patent/JP2002515718A/en
Priority to CA002330676A priority patent/CA2330676A1/en
Priority to AU37922/99A priority patent/AU3792299A/en
Priority to EP99920426A priority patent/EP1101303A2/en
Publication of WO1999059391A2 publication Critical patent/WO1999059391A2/en
Publication of WO1999059391A3 publication Critical patent/WO1999059391A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40058—Isochronous transmission
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/24—Loading of the microprogram
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40117—Interconnection of audio or video/imaging devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
    • H04N21/4363—Adapting the video stream to a specific local network, e.g. a Bluetooth® network
    • H04N21/43632—Adapting the video stream to a specific local network, e.g. a Bluetooth® network involving a wired protocol, e.g. IEEE 1394

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Software Systems (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stored Programmes (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Picture Signal Circuits (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Digital Computer Display Output (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

A method and apparatus is described for recovering data sample clock rates from received isochronous streams of data packets including associated time stamp values, such as in an IEEE 1394 bus-interconnected system. The difference between consecutive time stamp values is determined by successively latching the time stamp values and applying them to a subtracter circuit to produce a difference value. This difference value is then successively decremented by a down counter, with the down counter then producing a signal pulse and loading a next difference value upon completion of the count. The pulsed signal is applied to a phase-locked loop to provide a frequency multiple, and a clock signal is correspondingly produced that has a frequency proportional to the difference between the consecutive time stamp values. Data input buffer levels may be monitored and the clock signal frequency adjusted accordingly.
PCT/US1999/010225 1998-05-11 1999-05-11 Method and apparatus for data sample clock recovery WO1999059391A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2000549078A JP2002515718A (en) 1998-05-11 1999-05-11 Method and apparatus for recovering a data sample clock
CA002330676A CA2330676A1 (en) 1998-05-11 1999-05-11 Method and apparatus for data sample clock recovery
AU37922/99A AU3792299A (en) 1998-05-11 1999-05-11 Method and apparatus for data sample clock recovery
EP99920426A EP1101303A2 (en) 1998-05-11 1999-05-11 Method and apparatus for data sample clock recovery

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8502198P 1998-05-11 1998-05-11
US60/085,021 1998-05-11

Publications (2)

Publication Number Publication Date
WO1999059391A2 WO1999059391A2 (en) 1999-11-18
WO1999059391A3 true WO1999059391A3 (en) 2001-03-22

Family

ID=22188925

Family Applications (4)

Application Number Title Priority Date Filing Date
PCT/US1999/010255 WO1999059060A2 (en) 1998-05-11 1999-05-10 Method and system for distributing processing instructions with adata to be processed
PCT/US1999/010226 WO1999059047A2 (en) 1998-05-11 1999-05-11 Method and apparatus for low jitter clock recovery
PCT/US1999/010225 WO1999059391A2 (en) 1998-05-11 1999-05-11 Method and apparatus for data sample clock recovery
PCT/US1999/010224 WO1999059073A2 (en) 1998-05-11 1999-05-11 Method and system for providing an appliance user interface

Family Applications Before (2)

Application Number Title Priority Date Filing Date
PCT/US1999/010255 WO1999059060A2 (en) 1998-05-11 1999-05-10 Method and system for distributing processing instructions with adata to be processed
PCT/US1999/010226 WO1999059047A2 (en) 1998-05-11 1999-05-11 Method and apparatus for low jitter clock recovery

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US1999/010224 WO1999059073A2 (en) 1998-05-11 1999-05-11 Method and system for providing an appliance user interface

Country Status (5)

Country Link
EP (4) EP1076850A2 (en)
JP (4) JP2002514810A (en)
AU (4) AU3897099A (en)
CA (4) CA2330739A1 (en)
WO (4) WO1999059060A2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3424620B2 (en) * 1999-09-24 2003-07-07 日本電気株式会社 Isochronous packet transfer method, recording medium for transfer control program, bridge, and packet transfer control LSI
US6895009B1 (en) 2000-04-07 2005-05-17 Omneon Video Networks Method of generating timestamps for isochronous data
EP1198085B1 (en) 2000-10-10 2011-06-08 Sony Deutschland GmbH Cycle synchronization between interconnected sub-networks
DE10104876A1 (en) * 2001-02-03 2002-08-08 Bosch Gmbh Robert Circuit arrangement and method for the synchronized transmission of audio data streams in a bus system
DE10229372A1 (en) * 2002-06-29 2004-01-15 Deutsche Thomson-Brandt Gmbh Data transmitter, especially for OSI/SO 7-layer model data security layer, has time marker allocation unit that allocates generated time marker to current data packet or data packet to be generated
TWI347092B (en) 2006-04-11 2011-08-11 Realtek Semiconductor Corp Methods for adjusting sampling clock of sampling circuit and related apparatuses
GB2449932A (en) * 2007-06-08 2008-12-10 Tandberg Television Asa Timestamp conversion using samples
US7936794B2 (en) * 2007-08-07 2011-05-03 Avaya Inc. Clock management between two end points
GB2514572B (en) * 2013-05-29 2020-05-27 Grass Valley Ltd Re-timing sampled data
CN106933212B (en) * 2017-04-21 2019-12-10 华南理工大学 reconfigurable industrial robot programming control method in distributed manufacturing environment

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274681A (en) * 1991-03-27 1993-12-28 Nec Corporation Clock recovery circuit with memory storage level comparison with high, medium and low thresholds
EP0695063A2 (en) * 1994-07-25 1996-01-31 Sony Corporation Packet transmission system
EP0712250A2 (en) * 1994-11-09 1996-05-15 Sony Corporation Decode and encode systems and methods
US5526362A (en) * 1994-03-31 1996-06-11 Telco Systems, Inc. Control of receiver station timing for time-stamped data
WO1997042734A1 (en) * 1996-05-07 1997-11-13 Yamaha Corporation Method and system for transmitting data
EP0838926A2 (en) * 1996-10-22 1998-04-29 Sony Corporation Apparatus and method for transmitting and receiving isochronous data

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2645989A1 (en) * 1989-04-17 1990-10-19 Bull Sa MULTIFUNCTION COUPLER BETWEEN A CENTRAL COMPUTER UNIT AND THE DIFFERENT PERIPHERAL ORGANS OF THE SAME
EP0489204B1 (en) * 1990-12-04 1995-08-16 Hewlett-Packard Limited Reprogrammable data storage device
US5635979A (en) * 1994-05-27 1997-06-03 Bell Atlantic Dynamically programmable digital entertainment terminal using downloaded software to control broadband data operations
US6067500A (en) * 1995-08-14 2000-05-23 Aisin Aw Co., Ltd. Navigation system
US5922050A (en) * 1996-07-02 1999-07-13 Sun Microsystems, Inc. Method and apparatus for controlling a device on a network

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274681A (en) * 1991-03-27 1993-12-28 Nec Corporation Clock recovery circuit with memory storage level comparison with high, medium and low thresholds
US5526362A (en) * 1994-03-31 1996-06-11 Telco Systems, Inc. Control of receiver station timing for time-stamped data
EP0695063A2 (en) * 1994-07-25 1996-01-31 Sony Corporation Packet transmission system
EP0712250A2 (en) * 1994-11-09 1996-05-15 Sony Corporation Decode and encode systems and methods
WO1997042734A1 (en) * 1996-05-07 1997-11-13 Yamaha Corporation Method and system for transmitting data
EP0895378A1 (en) * 1996-05-07 1999-02-03 Yamaha Corporation Method and system for transmitting data
EP0838926A2 (en) * 1996-10-22 1998-04-29 Sony Corporation Apparatus and method for transmitting and receiving isochronous data

Also Published As

Publication number Publication date
WO1999059073A3 (en) 1999-12-29
WO1999059047A3 (en) 2000-04-06
WO1999059391A2 (en) 1999-11-18
CA2330970A1 (en) 1999-11-18
WO1999059073A9 (en) 2001-05-31
WO1999059073A2 (en) 1999-11-18
WO1999059047A2 (en) 1999-11-18
AU3792199A (en) 1999-11-29
JP2002515718A (en) 2002-05-28
CA2330676A1 (en) 1999-11-18
EP1076850A2 (en) 2001-02-21
AU3792299A (en) 1999-11-29
WO1999059060A3 (en) 1999-12-29
EP1076846A2 (en) 2001-02-21
CA2330740A1 (en) 1999-11-18
JP2002514810A (en) 2002-05-21
JP2002514820A (en) 2002-05-21
AU3894699A (en) 1999-11-29
WO1999059060A2 (en) 1999-11-18
CA2330739A1 (en) 1999-11-18
AU3897099A (en) 1999-11-29
JP2002514876A (en) 2002-05-21
EP1101303A2 (en) 2001-05-23
EP1076858A2 (en) 2001-02-21

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