WO1999053114A1 - Procede continu de pulverisation de films de nitrure de tantale - Google Patents

Procede continu de pulverisation de films de nitrure de tantale Download PDF

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Publication number
WO1999053114A1
WO1999053114A1 PCT/US1998/018178 US9818178W WO9953114A1 WO 1999053114 A1 WO1999053114 A1 WO 1999053114A1 US 9818178 W US9818178 W US 9818178W WO 9953114 A1 WO9953114 A1 WO 9953114A1
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WO
WIPO (PCT)
Prior art keywords
tantalum
nitrogen
film
target
tantalum nitride
Prior art date
Application number
PCT/US1998/018178
Other languages
English (en)
Inventor
Tony Chiang
Bingxi Sun
Peijun Ding
Barry Chin
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Publication of WO1999053114A1 publication Critical patent/WO1999053114A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/0021—Reactive sputtering or evaporation
    • C23C14/0036—Reactive sputtering
    • C23C14/0073—Reactive sputtering by exposing the substrates to reactive gases intermittently
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/0641—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation

Definitions

  • This application is a continuation-in-part of copending application Serial No. 09/058,432 filed April 10, 1998.
  • This invention relates to the deposition of improved barrier layers for copper metal lines and vias for the manufacture of semiconductor devices. More particularly, this invention relates to depositing tantalum-containing barrier layers having enhanced barrier performance. BACKGROUND OF THE INVENTION
  • conductive metal contacts and lines are deposited over dielectric layers, such as silicon oxide.
  • dielectric layers such as silicon oxide.
  • aluminum has been the metal conductor of choice. Since aluminum diffuses into silicon during elevated temperature processing, a barrier layer, particularly one including titanium nitride, is conventionally deposited between the substrate and the aluminum to prevent diffusion or "spiking" by the aluminum into the substrate.
  • Tantalum is a better conductor than aluminum, and it has a higher resistance to electromigration than aluminum. However, copper also diffuses into silicon as well as many other materials under conditions of elevated temperature and applied electric field. Thus a good barrier layer is also essential for copper lines and vias. Tantalum has been tried as a barrier layer for copper. Tantalum is a good conductor and a good wetting agent for overlying copper layers. Tantalum nitride, formed by sputter depositing tantalum in the presence of nitrogen gas, is a better barrier than tantalum alone, but it has a higher resistivity.
  • a barrier layer of tantalum and/or a tantalum nitride barrier layer which is much less conductive, must be as thin and as conformal as possible.
  • Conventional sputtering, particularly into small diameter, high aspect ratio openings, has been found to be inadequate to deposit thin conformal coatings into such openings.
  • Conventional sputtering is carried out in a high vacuum chamber using a target of the material to be sputtered, which is connected to a source of DC power.
  • a substrate is mounted on a support that is spaced from and parallel to the target.
  • Argon is passed into the chamber.
  • the negative voltage on the target attracts argon ions to the target surface after it is powered, where these argon ions impact and sputter off particles of the target material. These sputtered particles then deposit on the substrate.
  • sputtering does not occur only in the vertical direction, but in all directions except the horizontal.
  • Fig. 1 illustrates the buildup of target material 10 on the top 12 and upper sidewalls 14 of a high aspect ratio opening 16. This buildup prevents many sputtered particles from reaching the bottom 18 and the bottom sidewalls 20 of the opening 16.
  • the resultant coating, as of a barrier material is not as conformal as is required.
  • an improved sputtering chamber has been developed.
  • a high density plasma is formed in a sputtering chamber between the target and the substrate by means of an inductive coil coupled to a source of RF power.
  • particles are sputtered from the target, they pass through a plasma region in the vicinity of the coil and become ionized in this region.
  • the substrate is biased, as by powering the substrate support, the substrate has a negative potential and the positively charged sputtered ions are attracted to the substrate. They then impact the substrate in a highly perpendicular direction.
  • this improved sputtering chamber more of the sputtered particles deposit on the bottom and bottom sidewalls of high aspect ratio openings, significantly enhancing the bottom coverage and leading to more conformal sputtered layers .
  • the IMP chamber 170 includes a conventional target 172, as of tantalum, mounted on a top wall 173 of the chamber 170. A pair of opposing magnets 176, 178 are mounted over the top of the target 172. A substrate support 174, bearing a substrate 175 thereon, is mounted opposite to the target 172. A source of power 180 is connected to the target 172 and a source of RF power 182 is connected to the substrate support 174. A controller 200 regulates gas flows.
  • a helical coil 186 which can have one or more turns, is preferably made from the same material as the target 172.
  • the coil 186 is mounted between the target 172 and the substrate support 174, and is also connected to a source of RF power 188. Gases such as argon and nitrogen in vessels 192, 194, are metered to the chamber 170 by means of flow valves 196, 198 respectively.
  • the internal inductively coupled coil 186 provides a high density plasma in the region between the target 172 and the support electrode 174. If the pressure is too low, too few particles are present and sufficient metal ionization will not occur in the region of the powered coil.
  • a gate valve 199 is used to regulate the pumping speed and regulate the pressure in the chamber 170 to the desired range of about 10 millitorr up to 1 torr.
  • Improvements continue to be sought in the method of deposition to improve tantalum-containing barrier layers for copper lines and vias, and to ensure that a continuous process can produce improved barrier layers on successive substrates having uniform properties and long device life.
  • tantalum nitride barrier layers having improved density and film smoothness are obtained when bias is applied to the substrate support during deposition.
  • concentration of nitrogen in tantalum nitride films has a large effect on the robustness of tantalum-containing barrier layers.
  • the tantalum nitride barrier performance improves with increasing nitrogen content in the tantalum nitride film.
  • hysteresis drift occurs that in turn leads to a drift in film resistivity and thickness.
  • this hysteresis drift can be prevented by carrying out the following sequential steps during sputter deposition of tantalum-containing barrier layers : a) stabilizing a gas flow of argon in the absence of nitrogen in the sputtering chamber; b) igniting a plasma in the chamber, either using the stabilized argon alone or introducing a low level of nitrogen to the stabilized argon; c) depositing tantalum nitride from a stabilized mixture of argon and an amount of nitrogen at least equal to the amount introduced in step b) ; and d) turning off the flow of nitrogen while continuing sputtering to clean the tantalum target .
  • sequential layers of a first layer of a tantalum or tantalum-rich tantalum nitride film, a second tantalum nitride film and a final tantalum or tantalum-rich tantalum nitride film are deposited on the substrate.
  • the initial sputter deposition may be carried out in argon alone, to form a tantalum film, or a low level of nitrogen (generally less nitrogen than is required to form a TaN film) can also be introduced into the argon to form a tantalum-rich film.
  • the nitrogen gas flow is then introduced into the chamber to deposit a tantalum nitride film.
  • the target is cleaned to remove nitrogen-containing material prior to the beginning of the next deposition cycle.
  • the deposited tantalum-containing barrier films remain uniform in composition and barrier characteristics from one substrate to another .
  • FIG. 1 is a cross sectional view of an opening partially filled with material in accordance with prior art processes.
  • Fig. 2 is a schematic cross sectional view of a modified physical vapor deposition chamber useful in the present invention.
  • Fig. 3 is a schematic cross sectional view of a test MOS capacitor.
  • Fig. 4 is a graph of a TaN hysteresis curve of voltage versus nitrogen flow showing a rapid increase in the target voltage when the poison mode is reached.
  • Fig. 5 is a graph of resistivity and deposition rate versus nitrogen flow rate for tantalum nitride films.
  • Fig. 6 is a graph of MTTF in hours versus the value of x in TaN x .
  • the robustness of a tantalum-containing barrier layer for copper lines and vias can best be characterized by electrical testing of MOS test capacitors having a structure Si/SiOx/TaN barrier/Cu using a bias temperatures stress test (BTS) at 275°C and 2MV/cm.
  • BTS bias temperatures stress test
  • a typical metal-oxide semiconductor (MOS) test capacitor is shown in Fig. 3.
  • a silicon substrate 30 is covered with a dielectric layer 32, such as silicon oxide, generally about 1000 angstroms thick.
  • a thin barrier layer 34 is deposited and a conductive metal layer 36 is deposited over the barrier layer. The current through the oxide layer is measured. When copper diffuses through the barrier layer into the oxide layer, a catastrophic failure of the oxide is noted.
  • the median time to failure (MTTF) is used to evaluate the barrier performance. The failure distribution gives the standard deviation of the data points.
  • tantalum and tantalum-containing barrier films deposited by IMP technology have a very smooth surface morphology. This is true for deposition with or without wafer bias.
  • the surface of the film was almost as smooth as the silicon oxide which underlies the tantalum-containing or tantalum nitride barrier films. Thus no surface roughness is added to the device structure by the present tantalum- containing layers using an IMP deposition technique.
  • the density of tantalum nitride films is increased by biasing during deposition.
  • the resultant barrier layers are amorphous and dense, further contributing to the utility of the present films for making barrier layers that do not permit diffusion of an overlying metal layer, such as copper, through the barrier layer. This was shown in a comparison between tantalum nitride layers deposited without bias and with bias. The density and nitrogen content were measured by Rutherford Backscattering . When no bias was used during deposition, a
  • TaN 0-85 film had a density of 8.3 atoms/cm 3 .
  • a TaN 085 film had a higher density of 9.2 atoms/cm 3 .
  • an increase in the density of tantalum nitride films of about 9% is found when biasing is used during tantalum nitride sputter deposition.
  • Increasing the nitrogen content of tantalum nitride films also increases the density of the films, which in turn improves barrier performance .
  • barrier performance is linked to the nitrogen content of the tantalum nitride (TaN x ) films.
  • the amount of nitrogen in the tantalum nitride increases as the flow of nitrogen in the IMP chamber increases.
  • the resistivity of the films remains fairly constant until a threshold level is reached, generally when x in TaN x is about 1. Above the threshold level, the resistivity increases dramatically, as shown in Figs. 4 and 5. At that point the deposition rate also decreases rapidly, as shown in Fig. 5.
  • Fig. 6 is a graph of MTTF versus the nitrogen concentration in TaN films illustrating an increase in MTTF with an increase in nitrogen concentration.
  • Thermal anneal tests were also used to evaluate tantalum nitride performance. Film samples of tantalum nitride 100 angstroms thick containing various amounts of nitrogen on silicon substrates, with a 1500 angstrom thick layer of copper thereover, were thermally stressed at 600°C in a PVD chamber for 15 minutes. Sheet resistance and film appearance were compared before and after the anneal . Tantalum nitride having greater than about 30 atomic percent of nitrogen displayed no increase in resistivity after annealing. Secco etching was then used to remove the copper and the tantalum nitride layers, exposing the silicon surface. No etch pit formation was apparent, indicating good barrier performance, which improved with increasing nitrogen concentration up to about stoichiometric tantalum nitride layers.
  • the ideal nitrogen content of tantalum nitride barrier layers is the maximum nitrogen level that is below the threshold level when the resistivity increases rapidly, as
  • This hysteresis drift can be eliminated by shutting off the nitrogen flow entirely at the beginning of the tantalum nitride deposition, e.g., during the stabilization and ignition of a plasma in an IMP chamber, and at the end of the deposition.
  • sputtering a tantalum target in the absence of nitrogen for a few seconds at the end of each deposition cycle any tantalum nitride that has formed on the target will be sputtered off, presenting a clean, non-poisoned target for each new substrate admitted to the chamber. This is true also of the tantalum coil used in the IMP chamber.
  • TaN x layers were successively deposited to a thickness of about 250 angstroms on 9000 successive silicon dioxide coated wafers in an IMP chamber.
  • the resistivity values of the layers remained the same within a 2% deviation, indicating excellent repeatability.
  • the particle level in the IMP sputtering chamber remained very low even after processing 9000 consecutive wafers.
  • the tantalum nitride coverage at the bottom of openings 0.25 micron in diameter and 1.4 micron deep (aspect ratio of over 5.5:1) was uniform throughout.
  • the high nitrogen content TaN x films deposited in accordance with the invention are dense and amorphous; thus few pathways for diffusion of copper through these barrier layers exist .
  • a tantalum-rich film at the overlying copper interface may also improve copper nucleation when CVD copper layers are deposited, since a typical CVD copper deposition is based upon an electron transfer, disproportionation reaction.
  • the present process thus provides conformal step coverage, even in very high aspect ratio openings, and process flexibility in which the nitrogen content in TaN x layers, deposition pressure, temperature and bias power can be varied.
  • applicants have described the present invention terms of specific embodiments, one skilled in the art will recognize that various changes can be made to the deposition method of tantalum nitride films which are meant to be included within the scope of the appended claims .
  • the improvement in properties of tantalum-containing films having a high nitrogen content, deposited while biasing the substrate will be had whether the tantalum nitride is deposited in an IMP chamber or in a conventional PVD chamber.
  • the invention is meant to include the use of additional

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Abstract

On améliore les propriétés de barrière des films barrière de nitrure de tantale déposés en phase vapeur par procédé physique (PVD) sur un substrat en polarisant ce dernier pendant le dépôt. La majeure partie du film barrière est constituée de TaNx, où x est inférieur ou égal à 1 et le film barrière présente une résistivité s'élevant jusqu'à environ 500 microohms/cm. Un procédé continu de dépôt de couches de nitrure de tantale sur des couches successives de substrats consiste à stabiliser un flux constitué uniquement d'argon, à déposer par pulvérisation une première couche de tantale ou une couche riche en tantale, à ajouter de l'azote pour déposer du nitrure de tantale tout en polarisant le substrat et en maintenant un taux d'azote élevé dans le film, puis, en fermant le flux d'azote, à déposer du tantale ou un film riche en tantale, de façon à éliminer tout dépôt de nitrure de tantale sur la surface de la cible de tantale. Ce procédé permet d'éviter une hystérésis de la composition et des propriétés des films barrières due aux dépôts successifs.
PCT/US1998/018178 1998-04-10 1998-09-29 Procede continu de pulverisation de films de nitrure de tantale WO1999053114A1 (fr)

Applications Claiming Priority (2)

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US5843298A 1998-04-10 1998-04-10
US09/058,432 1998-04-10

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003072846A1 (fr) * 2002-02-28 2003-09-04 Trikon Technologies Limited Procédé de dépôt d'une couche barrière
WO2003094225A1 (fr) * 2002-04-29 2003-11-13 Infineon Technologies Ag Procede de remplissage d'un trou de contact
WO2002093648A3 (fr) * 2001-05-11 2003-12-31 Ibm Interconnexion de dispositif semi-conducteur
EP1916707A2 (fr) 2003-05-02 2008-04-30 Air Products and Chemicals, Inc. Procédés pour le dépôt de films métalliques par les processus CVD ou ALD sur des couches de barrière de diffusion
JP2022513997A (ja) * 2018-12-21 2022-02-09 アプライド マテリアルズ インコーポレイテッド 極紫外線マスク吸収体、及びその製造のためのプロセス
CN114481016A (zh) * 2022-01-21 2022-05-13 四川科尔威光电科技有限公司 一种改善氮化钽薄膜均匀性的制备工艺

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4976839A (en) * 1988-07-25 1990-12-11 Fujitsu Limited Method of forming a barrier layer between a silicon substrate and an aluminum electrode of a semiconductor device
US5281485A (en) * 1990-10-26 1994-01-25 International Business Machines Corporation Structure and method of making Alpha-Ta in thin films
US5707498A (en) * 1996-07-12 1998-01-13 Applied Materials, Inc. Avoiding contamination from induction coil in ionized sputtering
US5725739A (en) * 1996-07-08 1998-03-10 Micron Technology, Inc. Low angle, low energy physical vapor deposition of alloys
US5783282A (en) * 1996-10-07 1998-07-21 Micron Technology, Inc. Resputtering to achieve better step coverage of contact holes

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4976839A (en) * 1988-07-25 1990-12-11 Fujitsu Limited Method of forming a barrier layer between a silicon substrate and an aluminum electrode of a semiconductor device
US5281485A (en) * 1990-10-26 1994-01-25 International Business Machines Corporation Structure and method of making Alpha-Ta in thin films
US5725739A (en) * 1996-07-08 1998-03-10 Micron Technology, Inc. Low angle, low energy physical vapor deposition of alloys
US5707498A (en) * 1996-07-12 1998-01-13 Applied Materials, Inc. Avoiding contamination from induction coil in ionized sputtering
US5783282A (en) * 1996-10-07 1998-07-21 Micron Technology, Inc. Resputtering to achieve better step coverage of contact holes

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002093648A3 (fr) * 2001-05-11 2003-12-31 Ibm Interconnexion de dispositif semi-conducteur
CN100365811C (zh) * 2001-05-11 2008-01-30 国际商业机器公司 半导体器件的互连
WO2003072846A1 (fr) * 2002-02-28 2003-09-04 Trikon Technologies Limited Procédé de dépôt d'une couche barrière
US6860975B2 (en) 2002-02-28 2005-03-01 Trikon Technologies Limited Barrier layer and method of depositing a barrier layer
WO2003094225A1 (fr) * 2002-04-29 2003-11-13 Infineon Technologies Ag Procede de remplissage d'un trou de contact
US7390737B2 (en) 2002-04-29 2008-06-24 Infineon Technologies Ag Method for filling a contact hole and integrated circuit arrangement with contact hole
CN100419994C (zh) * 2002-04-29 2008-09-17 因芬尼昂技术股份公司 填充接触孔的方法及具接触孔的集成电路装置
US7825510B2 (en) 2002-04-29 2010-11-02 Infineon Technologies Ag Method for filling a contact hole and integrated circuit arrangement with contact hole
EP1916707A2 (fr) 2003-05-02 2008-04-30 Air Products and Chemicals, Inc. Procédés pour le dépôt de films métalliques par les processus CVD ou ALD sur des couches de barrière de diffusion
EP1953809A2 (fr) 2003-05-02 2008-08-06 Air Products and Chemicals, Inc. Procédés pour le dépôt de films métalliques par les processus CVD sur des couches de barrière de diffusion
JP2022513997A (ja) * 2018-12-21 2022-02-09 アプライド マテリアルズ インコーポレイテッド 極紫外線マスク吸収体、及びその製造のためのプロセス
CN114481016A (zh) * 2022-01-21 2022-05-13 四川科尔威光电科技有限公司 一种改善氮化钽薄膜均匀性的制备工艺

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