WO1999050890A1 - Procede de fabrication de dispositifs electroniques multicouches a couches minces - Google Patents

Procede de fabrication de dispositifs electroniques multicouches a couches minces Download PDF

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Publication number
WO1999050890A1
WO1999050890A1 PCT/US1999/006453 US9906453W WO9950890A1 WO 1999050890 A1 WO1999050890 A1 WO 1999050890A1 US 9906453 W US9906453 W US 9906453W WO 9950890 A1 WO9950890 A1 WO 9950890A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrates
thin film
conductor
light emitting
organic light
Prior art date
Application number
PCT/US1999/006453
Other languages
English (en)
Inventor
Sigurd Wagner
Original Assignee
Trustees Of Princeton University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trustees Of Princeton University filed Critical Trustees Of Princeton University
Priority to US09/647,193 priority Critical patent/US6893896B1/en
Priority to AU32030/99A priority patent/AU3203099A/en
Publication of WO1999050890A1 publication Critical patent/WO1999050890A1/fr
Priority to US10/945,610 priority patent/US7115983B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H01L21/02288—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating printing, e.g. ink-jet printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • This invention relates to large-area electronics and to methods for manufacturing thin film electronics continuously on separate carrier substrate foils, and then to combining these foils using anisotropic electrical conductors or light guides.
  • the present invention maintains high-speed manufacturing while the various component functions are manufactured separately under conditions tailored to optimize component performance and yield.
  • the method involves the production of each function or group of functions on a separate flexible substrate, and bonding these flexible substrates to each other by using anisotropic electrically conducting or optical lightguide adhesives. The bonding is performed by laminating the flexible substrates to each other via the adhesive in a continuous process.
  • Anisotropic conductors conduct in one direction (i.e. top to bottom) but do not conduct sideways. 3
  • FIG. 1 is a schematic drawing of a pixel for a display of organic light emitting diodes driven by an active matrix of thin film transistors made on a steel back plane.
  • FIG. 2 is a diagram of a co-laminated thin film transistor using anisotropic electrically conducting adhesive.
  • An active-matrix liquid-crystal display is an example of such a product. It consists of a light source, a plane of transistor electronics, a layer of liquid crystal sandwiched between transparent conductors and polarizers, and a plane of color filters.
  • Such products are made by separately manufacturing the individual components, such as the light source, the transistor back plane, and the color filter plane, followed by assembly and filling of the liquid crystal material.
  • the separate manufacture allows the individual optimization of the performance of each component.
  • separate manufacture is necessary to obtain the desired functionality.
  • the transistor back plane of a liquid crystal display could not be manufactured after assembly, because assembly renders the required substrate surface inaccessible.
  • integration of several functions on one substrate leads to savings in cost, improvement of yield, and increased functionality.
  • Macroelectronic products are expected to have very low cost per unit area, rather than per function as is the case for conventional microelectronics. This requirement is apparent for typical examples of future macroelectronic products, such as disposable, intelligent shipping/shopping labels, digital wallpaper, and dial-your-pattern dresses. These products may include transistor electronics, input/output devices such as antennae, optoelectronic functions including photodetectors and light-emitting diodes, and microelectromechanical devices.
  • FIG. 1 shows a pixel for a display of organic light emitting diodes driven by an active matrix of thin film transistors made on a steel back plane. In such devices, thin film transistors must make good electrical contact to the OLEDs to provide sufficient drive current.
  • This is an active matrix emissive display which consists of a back plane of thin film transistors that drive organic light emitting diodes. Such a pixel is shown in the paper by Wu. et al. Integration of
  • the display shown in FIG. 1 is manufactured in a sequence of steps that adds the TFT and OLED layers to one substrate.
  • a substrate foil for example, stainless steel, has patterned TFT circuits added first.
  • the OLED circuits are then placed on the substrate.
  • a transparent encapsulation layer (not shown) is then applied.
  • the top contact to the OLED layer must be transparent to transmit the light, which is emitted from the organic semiconductor. In this structure this contact is made in one of the last processing steps.
  • the present invention addresses this problem by making the TFT back plane and the OLEDs separately, and connecting them electrically with an anisotropic conductor, which conducts only in the direction perpendicular to the layers.
  • This sequence of steps is illustrated in FIG. 2. More particularly, the OLED's 6 are formed on a transparent conductor 4 which is, in turn formed onto a transparent substrate/encapsulation 2.
  • the back plane comprises thin film transistors (TFT's) formed onto structural substrate 10. When the substrate 10 is conducted as is the case for metal foils, an insulated barrier layer 12 must be deposited between the TFT layer and the substrate.
  • the front plane OLED's and the back plane TFT's are connected together with an anistropic conductive adhesive 8. The resultant structure is the finished thin film display.
  • the OLEDs are made on a transparent conductor, which in turn is deposited on a transparent substrate. In this way, the best possible electrical contact to the OLEDs is made, and the transparent substrate ultimately serves as the transparent encapsulant.
  • the other electrical contact to the OLEDs may be opaque and is made of a suitable metal.
  • the two planes, TFT and OLED are then laminated to each other, using an adhesive foil of anisotropic conductor (for example, ARclad® 8257 from Adhesives Research, Inc., a 1-mil thick acrylic product).
  • the final assembly step therefore is the co- lamination of TFT foil, anisotropic conductor foil, and OLED foil. It is important to note that the proper TFT-OLED connections are made automatically by this procedure, as long as the TFT and OLED planes are 7 aligned with each other.
  • the same principle can be used to co-laminate component planes with anisotropic light guides, if optical interconnects are desired.
  • the lamination step may be repeated to combine more than two active planes in one product.
  • Having a body of easily deformable adhesive also provides another advantage in production yield and product lift.
  • the anisotropic conductor will accommodate mechanical strain between the circuit planes that it connects. If a rigid connection were used, any strain developing during fabrication or in produce use will be accommodated by the layer with the lowest elastic modulus. This may be an active layer, for example, the organic light-emitter. Straining this layer may destroy the OLED. Straining the adhesive layer will only lead to local shifts in the contact alignment, which will be self-correcting due to the anisotropic conduction or light guiding.
  • Anisotropic conductors are used today to make connections between groups of passive conductors on to different planes.
  • One well-known application is the surface-mount of integrated driver circuits to the row and column conductors of liquid crystal displays.
  • the use of a sheet of an anisotropically conducting adhesive for the direct connection of two active circuit planes is new. The problem solved here is coming into being only now, as macroelectronic integrated circuits are developed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

L'invention concerne la fabrication à grande vitesse de dispositifs électroniques multicouches à couches minces, même si les diverses fonctions de composants sont fabriquées séparément dans des conditions prévues pour optimiser les performances et le rendement des composants. Chaque fonction ou groupe de fonctions est fabriqué(e) sur un substrat souple séparé. Ces substrats souples sont liés les uns aux autres au moyen de films adhésifs qui constituent des conducteurs électriques anisotropes ou des guides de lumière optiques. On effectue la liaison en laminant des substrats souples les uns aux autres dans un procédé en continu, en utilisant le conducteur anisotrope comme couche de liaison.
PCT/US1999/006453 1998-03-27 1999-03-26 Procede de fabrication de dispositifs electroniques multicouches a couches minces WO1999050890A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US09/647,193 US6893896B1 (en) 1998-03-27 1999-03-26 Method for making multilayer thin-film electronics
AU32030/99A AU3203099A (en) 1998-03-27 1999-03-26 Method for making multilayer thin-film electronics
US10/945,610 US7115983B2 (en) 1998-03-27 2004-09-21 Multilayer, thin-film electronic devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7974698P 1998-03-27 1998-03-27
US60/079,746 1998-03-27

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US09647193 A-371-Of-International 1999-03-26
US10/945,610 Division US7115983B2 (en) 1998-03-27 2004-09-21 Multilayer, thin-film electronic devices

Publications (1)

Publication Number Publication Date
WO1999050890A1 true WO1999050890A1 (fr) 1999-10-07

Family

ID=22152544

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US1999/006454 WO1999050889A2 (fr) 1998-03-27 1999-03-26 Isolants imprimes pour dispositifs electroniques actifs et passifs
PCT/US1999/006453 WO1999050890A1 (fr) 1998-03-27 1999-03-26 Procede de fabrication de dispositifs electroniques multicouches a couches minces

Family Applications Before (1)

Application Number Title Priority Date Filing Date
PCT/US1999/006454 WO1999050889A2 (fr) 1998-03-27 1999-03-26 Isolants imprimes pour dispositifs electroniques actifs et passifs

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AU (2) AU3203099A (fr)
WO (2) WO1999050889A2 (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004068536A3 (fr) * 2003-01-30 2005-01-20 Univ Cape Town Dispositif semi-conducteur a film mince et procede de fabrication d'un dispositif semi-conducteur a film mince
WO2006080839A2 (fr) * 2005-01-25 2006-08-03 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Dispositif electronique comprenant un composant electronique et des elements d'encapsulation
US7776724B2 (en) 2006-12-07 2010-08-17 Innovalight, Inc. Methods of filling a set of interstitial spaces of a nanoparticle thin film with a dielectric material
US7851336B2 (en) 2008-03-13 2010-12-14 Innovalight, Inc. Method of forming a passivated densified nanoparticle thin film on a substrate
US8247312B2 (en) 2008-04-24 2012-08-21 Innovalight, Inc. Methods for printing an ink on a textured wafer surface

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0105145D0 (en) 2001-03-02 2001-04-18 Koninkl Philips Electronics Nv Thin film transistors and method of manufacture
DE10151131A1 (de) * 2001-10-17 2003-05-08 Infineon Technologies Ag Verfahren zum Erzeugen einer strukturierten Schicht auf einem Substrat
GB2388709A (en) 2002-05-17 2003-11-19 Seiko Epson Corp Circuit fabrication method
US7906415B2 (en) 2006-07-28 2011-03-15 Xerox Corporation Device having zinc oxide semiconductor and indium/zinc electrode

Citations (8)

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Publication number Priority date Publication date Assignee Title
US4796975A (en) * 1987-05-14 1989-01-10 Amphenol Corporation Method of aligning and attaching optical fibers to substrate optical waveguides and substrate optical waveguide having fibers attached thereto
US4810637A (en) * 1985-05-07 1989-03-07 Thomson-Csf Non-linear control element for a flat electrooptical display screen and a method of fabrication of said control element
US5049527A (en) * 1985-06-25 1991-09-17 Hewlett-Packard Company Optical isolator
US5249245A (en) * 1992-08-31 1993-09-28 Motorola, Inc. Optoelectroinc mount including flexible substrate and method for making same
US5471552A (en) * 1995-02-22 1995-11-28 Industrial Technology Research Institute Fabrication of static-alignment fiber-guiding grooves for planar lightwave circuits
US5496743A (en) * 1992-02-28 1996-03-05 At&T Corp. Method of making an article comprising a semiconductor device
US5699073A (en) * 1996-03-04 1997-12-16 Motorola Integrated electro-optical package with carrier ring and method of fabrication
US5698452A (en) * 1994-04-25 1997-12-16 Lucent Technologies Inc. Method of making integrated detector/photoemitter with non-imaging director

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5132248A (en) * 1988-05-31 1992-07-21 The United States Of America As Represented By The United States Department Of Energy Direct write with microelectronic circuit fabrication
US5385848A (en) * 1993-09-20 1995-01-31 Iowa Thin Film Technologies, Inc Method for fabricating an interconnected array of semiconductor devices
US5820932A (en) * 1995-11-30 1998-10-13 Sun Chemical Corporation Process for the production of lithographic printing plates
JP3268723B2 (ja) * 1996-03-25 2002-03-25 シャープ株式会社 アクティブマトリクス基板および液晶表示装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4810637A (en) * 1985-05-07 1989-03-07 Thomson-Csf Non-linear control element for a flat electrooptical display screen and a method of fabrication of said control element
US5049527A (en) * 1985-06-25 1991-09-17 Hewlett-Packard Company Optical isolator
US4796975A (en) * 1987-05-14 1989-01-10 Amphenol Corporation Method of aligning and attaching optical fibers to substrate optical waveguides and substrate optical waveguide having fibers attached thereto
US5496743A (en) * 1992-02-28 1996-03-05 At&T Corp. Method of making an article comprising a semiconductor device
US5249245A (en) * 1992-08-31 1993-09-28 Motorola, Inc. Optoelectroinc mount including flexible substrate and method for making same
US5698452A (en) * 1994-04-25 1997-12-16 Lucent Technologies Inc. Method of making integrated detector/photoemitter with non-imaging director
US5471552A (en) * 1995-02-22 1995-11-28 Industrial Technology Research Institute Fabrication of static-alignment fiber-guiding grooves for planar lightwave circuits
US5699073A (en) * 1996-03-04 1997-12-16 Motorola Integrated electro-optical package with carrier ring and method of fabrication

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004068536A3 (fr) * 2003-01-30 2005-01-20 Univ Cape Town Dispositif semi-conducteur a film mince et procede de fabrication d'un dispositif semi-conducteur a film mince
WO2006080839A2 (fr) * 2005-01-25 2006-08-03 Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno Dispositif electronique comprenant un composant electronique et des elements d'encapsulation
WO2006080839A3 (fr) * 2005-01-25 2006-12-28 Tno Dispositif electronique comprenant un composant electronique et des elements d'encapsulation
US7776724B2 (en) 2006-12-07 2010-08-17 Innovalight, Inc. Methods of filling a set of interstitial spaces of a nanoparticle thin film with a dielectric material
US7851336B2 (en) 2008-03-13 2010-12-14 Innovalight, Inc. Method of forming a passivated densified nanoparticle thin film on a substrate
US8273669B2 (en) 2008-03-13 2012-09-25 Innovalight, Inc. Method of forming a passivated densified nanoparticle thin film on a substrate
US8247312B2 (en) 2008-04-24 2012-08-21 Innovalight, Inc. Methods for printing an ink on a textured wafer surface

Also Published As

Publication number Publication date
WO1999050889A2 (fr) 1999-10-07
AU3203099A (en) 1999-10-18
WO1999050889A3 (fr) 1999-12-23
AU3203199A (en) 1999-10-18

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