WO1999038329A2 - Architecture compatible systemes mpeg-4 - Google Patents
Architecture compatible systemes mpeg-4 Download PDFInfo
- Publication number
- WO1999038329A2 WO1999038329A2 PCT/IB1999/000038 IB9900038W WO9938329A2 WO 1999038329 A2 WO1999038329 A2 WO 1999038329A2 IB 9900038 W IB9900038 W IB 9900038W WO 9938329 A2 WO9938329 A2 WO 9938329A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- mpeg
- operating system
- architecture
- buffer
- packet data
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
- H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding
Definitions
- the present invention relates to an MPEG-4 Systems compliant architecture.
- This invention has applications in relation with the MPEG-4 standard, for the streaming of MPEG-4 multimedia data.
- MPEG-4 Systems The Systems part of the MPEG-4 standard defines the architecture to access MPEG-4 multimedia data (video, audio, 2D and 3D graphics).
- MPEG-4 Systems is, more precisely, described in the following document "MPEG-4 Systems", ISO/TEC JTC1/3C29/WG11 N 1901, 21 November 1997.
- Such an architecture is complex, since it provides access to an arbitrary number of streams, such as audio and video streams for instance, originated from a large number of sources (networks, broadcasting, storage,).
- the standard specifies, for the synchronization of audio and video data, a mechanism allowing to introduce, by means of time-stamps, a temporal information into said different streams.
- bitrate for instance, mobile networks, Internet.
- bitrate variations occur (for Internet, depending on the time in the day ; for mobile networks, depending on the distance to the nearest base station).
- MPEG-4 compliant architecture the topology of which has to be handled with respect to a so- called “configuration” that may be fixed but generally evolves dynamically during the session
- an optimal architecture implementation has to ensure an appropriate buffer management.
- the problems to be solved in this context then concern the exchange of information between the different modules of said architecture, in order to avoid drawbacks such as :
- the invention relates to an architecture characterized in that it is subdivided into key modules, a specific task managed by a multi-threading operating system being assigned to each part of said architecture, and the strategy for the buffer management being optimally based on specific synchronization primitives provided by the multi-threading operating system.
- An implementation of MPEG-4 Systems has to be able to instantiate dynamically the differents components of a configuration, whatever this one is very simple (for instance, a movie composed of an audio flow and a video flow) or very complex (for example, for an application of interactive multi-user virtual reality with teleconferencing).
- the technical solution according to the invention that defines a generic architecture for every implementation of MPEG-4 Systems based on microprocessor(s) with a multi-threading operating system, is a reply to this problem.
- the proposed architecture that uses basic primitives present in all multi-threading environments, is indeed modular, flexible, dynamic, extensible, and easy to implement and to manage.
- multi-threading operating systems are optimized for the target processor and are built to be able to efficiently manage the synchronization of numerous tasks.
- - Fig.l depicts an implementation of an MPEG-4 Systems buffer partitioning model (on the so-called Win32 operating system);
- Fig.2 illustrates the control management with semaphores, used to keep the different threads efficient.
- the proposed solution addresses the following issues.
- key modules for an optimal buffer management are defined, which implies a specific generic partitioning of MPEG-4 Systems.
- Each of these modules is then implemented as a task that is managed by a multi-threading operating system (with the use, in order to manage the filling of the buffers in an optimal way, of specific synchronization primitives provided by said multi -threading operating system).
- the strategy for the buffer management is defined.
- Fig.l TransMux, FlexMux, Elementary Stream.
- a decoder buffer (audio, video,...) is also defined (and represented in Fig.l), in order to read Access Units (AUs) and produce frames that can be played (images, sounds), but this task is not part of the one carried out by the demultiplexer.
- FMX FlexMux thread
- DEC Decoder thread
- AUs Access Units
- FIFO First-In, First-Out
- synchronization primitives which is done by means of semaphores (or : counters) that keep the different threads efficient.
- Each of these semaphores controls each respective buffer (FM-PDU, AL-PDU, AU) in the demultiplexer.
- For each decoder there is also one semaphore controlling the decoder buffer, and one more for signalling to the TransMux to have to stop if the AU buffer becomes too large.
- the first operation is done by the TransMux TMX that reads data on the local disk DK or on the network NW ;
- the regulation of the TransMux TMX is made by the AU feedback semaphore controlling that the AU buffer is not in a critical state.
- the principle of this buffer management strategy is to keep the buffer sizes as small as possible. When the number of AL-PDUs is sufficient to reconstruct an AU, it has to be done immediately. Thus there is always data present for decoding.
- TransMux Two types of TransMuxes can be differentiated : slow ones (network access), and fast ones (disk access).
- the disk accesses are quick and stable in terms of latency, and, with such types of accesses, it is then not needed to store many data in the different buffers, since no loss would occur and the maximal critical value could be rather low.
- network accesses can introduce some latency (Internet, for example), so that it is important to store more data in the buffers in order not to let the decoder starve. In the case of more than one decoder, it must however be indicated that the
- TransMux has to be stopped only when all the AU buffers have reached the critical maximum value in order not to have starving decoding threads (it is therefore assumed that the multiplexing strategy has been adapted for that purpose on the sending side).
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Computing Systems (AREA)
- Theoretical Computer Science (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
- Communication Control (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53808799A JP2001518272A (ja) | 1998-01-27 | 1999-01-14 | Mpeg−4システム迎合アーキテクチャ |
EP99900029A EP0978199A2 (fr) | 1998-01-27 | 1999-01-14 | Architecture compatible systemes mpeg-4 |
KR1019997008809A KR100639894B1 (ko) | 1998-01-27 | 1999-01-14 | 엠펙-4 시스템 적응 아키텍쳐 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP98400160 | 1998-01-27 | ||
EP98400160.2 | 1998-01-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1999038329A2 true WO1999038329A2 (fr) | 1999-07-29 |
WO1999038329A3 WO1999038329A3 (fr) | 1999-09-30 |
Family
ID=8235248
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB1999/000038 WO1999038329A2 (fr) | 1998-01-27 | 1999-01-14 | Architecture compatible systemes mpeg-4 |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0978199A2 (fr) |
JP (1) | JP2001518272A (fr) |
KR (1) | KR100639894B1 (fr) |
CN (1) | CN1150768C (fr) |
WO (1) | WO1999038329A2 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100705992B1 (ko) | 1998-07-17 | 2007-04-12 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 코드화된 데이터를 디멀티플렉싱하는 장치 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5668599A (en) * | 1996-03-19 | 1997-09-16 | International Business Machines Corporation | Memory management for an MPEG2 compliant decoder |
EP0863676A2 (fr) * | 1997-02-26 | 1998-09-09 | Discovision Associates | Gestionnaire de mémoire pour décodeur MPEG |
EP0909091A1 (fr) * | 1997-10-07 | 1999-04-14 | CANAL+ Société Anonyme | Gestionnaire de mémoire |
-
1999
- 1999-01-14 JP JP53808799A patent/JP2001518272A/ja not_active Abandoned
- 1999-01-14 CN CNB998000663A patent/CN1150768C/zh not_active Expired - Fee Related
- 1999-01-14 KR KR1019997008809A patent/KR100639894B1/ko not_active IP Right Cessation
- 1999-01-14 WO PCT/IB1999/000038 patent/WO1999038329A2/fr not_active Application Discontinuation
- 1999-01-14 EP EP99900029A patent/EP0978199A2/fr not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5668599A (en) * | 1996-03-19 | 1997-09-16 | International Business Machines Corporation | Memory management for an MPEG2 compliant decoder |
EP0863676A2 (fr) * | 1997-02-26 | 1998-09-09 | Discovision Associates | Gestionnaire de mémoire pour décodeur MPEG |
EP0909091A1 (fr) * | 1997-10-07 | 1999-04-14 | CANAL+ Société Anonyme | Gestionnaire de mémoire |
Also Published As
Publication number | Publication date |
---|---|
EP0978199A2 (fr) | 2000-02-09 |
WO1999038329A3 (fr) | 1999-09-30 |
CN1150768C (zh) | 2004-05-19 |
CN1256047A (zh) | 2000-06-07 |
KR100639894B1 (ko) | 2006-10-31 |
JP2001518272A (ja) | 2001-10-09 |
KR20010005738A (ko) | 2001-01-15 |
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