WO1999038293A2 - Systeme et procede de commutation asynchrone de cellules composites, et modules de port d'entree et de port de sortie correspondants - Google Patents
Systeme et procede de commutation asynchrone de cellules composites, et modules de port d'entree et de port de sortie correspondants Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3009—Header conversion, routing tables or routing tags
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5649—Cell delay or jitter
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
- H04L2012/566—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly using the ATM layer
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5672—Multiplexing, e.g. coding, scrambling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
Definitions
- the field of the invention is that of transfer, and asynchronous switching, of cells.
- the invention typically relates to the transfer of synchronous channels (for example 64 kbit / s channels of a digital multiplex), using asynchronous cell switches initially designed to switch broadband services.
- an essential condition to be respected is the transfer delay for each synchronous channel through a switching node (for example in ITU Rec. Q-551: average transfer delay 900 ⁇ s; with 95% less than or equal to 1500 ⁇ s).
- a switching node for example in ITU Rec. Q-551: average transfer delay 900 ⁇ s; with 95% less than or equal to 1500 ⁇ s.
- a first category of solutions is based on the use of standardized ATM cells in "composite" mode (that is to say for several channels), so as to reduce the enormous increase in bandwidth when an ATM cell (from 424 bits) is used to transfer a single 8-bit channel sample, which results in 53 times more bandwidth.
- a second category of solutions is based on the use of smaller cells to each transfer an individual channel sample. Even in this case, however, the required bandwidth remains high, and the management of switching is complex.
- a first objective of the invention is to provide a switching system and method implementing a solution offering higher efficiency for reduced complexity.
- Another object of the invention is to provide such a system and such a method, improving the existing narrowband switching nodes using conventional synchronous switches (PCM), by replacing these by asynchronous cell switches.
- PCM synchronous switches
- the invention also aims to provide such a system and such a method, integrating broadband and narrowband services in switching nodes implementing asynchronous cell switching techniques.
- asynchronous switching system of cells each comprising a header field and a data field, of the type providing interconnection of incoming and outgoing links, each of said links multiplexing data belonging to at least two channels, said system comprising input port modules and output port modules interconnected by at least one stage of intermediate switching elements, in which:
- - at least some of said input modules comprise means for forming composite cells comprising: - means for storing channel data received from the incoming channels on the incoming links of the input port module; means for constructing channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; and means for selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination; - And in which at least some of said output modules comprise means for processing said composite cells, comprising: means for extracting and recognizing said blocks of channel data received in the data field of a composite cell, by means said associated explicit channel identities;
- said channel data blocks can be of fixed and identical length, or of variable length.
- the length of each of said channel data blocks is specified by an indicator associated with each of said channel data blocks; or that the length of each of said channel data blocks is fixed for each connection to an outgoing channel, and known to the destination output port module.
- said variable lengths are multiples of a basic elementary length.
- Said selective multiplexing means can dynamically group blocks of channel data in various ways, and in particular: - without following a predetermined order, according to the order of reception of said channel data; according to a pre-established order; according to a pre-established order dynamically modified, at each transmission cycle; - in a random or quasi-random order, modified at each transmission cycle.
- said selective multiplexing means limit the number of channel data blocks to a maximum number of acceptable channel data blocks in the data field of a composite cell.
- said selective multiplexing means take account of a maximum duration for assembling a composite cell, and ensure the emission of a composite cell which is not completely filled when said maximum duration has elapsed.
- the length of the data field of said composite cells is variable.
- said length of the data field is advantageously dynamically adapted as a function of the number and / or the length of the channel data blocks that said data field contains.
- the invention also relates to the input port modules and the output port modules as such, for an asynchronous switching system as described above.
- Such an input module comprising means for forming composite cells comprising: means for storing channel data received from the incoming channels on the incoming links of the input port module; means for constructing channel data blocks each comprising channel information to be transmitted extracted from the channel data received and at least one explicit channel identity associated with said channel information to be transmitted; - and means for selective multiplexing of channel data blocks intended for a common destination corresponding to at least one and the same destination output port module, in the data field of at least one composite cell to be transmitted to said common destination; is characterized in that said explicit channel identity designates: - either the address of a synchronous channel entering an input port module; - either the address of at least one outgoing synchronous channel in an output port module.
- such an output module comprising means for processing said composite cells, comprising: means for extracting and recognizing said blocks of channel data received in the data field of a composite cell, by means of said identities of explicit associated channels; and means for transmitting to at least one outgoing link the channel data belonging to the different channels, as a function of said associated explicit channel identities;
- said explicit channel identity denotes:
- Figure 1 illustrates in a simplified manner a switching system to which the invention can be applied
- Figure 2 is a functional diagram of an input CCTM according to the invention
- Figures 3A and 3B show two embodiments of the translation table used by the ICRC module of Figure 2
- Figure 4 shows the structure of the CCC module of Figure 2
- FIG. 5 illustrates the buffer memories used by the CAU module of FIG. 2
- - Figures 6A and 6B illustrate the operation of an output CCTM, according to two embodiments. 1 - Glossary
- the following abbreviations will be used in particular:
- ASC asynchronous switching network
- CCTM end port module (input or output);
- connection reference identifier connection reference identifier
- NCE number of channel data blocks in a cell
- NCHEIC - NBCHE: number of bytes per channel
- TNCDC total number of channels per output CCTM
- NCFC number of cells completely filled
- NARCH number of channels already received for an output CCTM
- TNCL total number of cells
- - NCHELC number of channel data blocks in an incomplete cell (last cell);
- ICRU module for receiving input channels
- CTU cell transmission module
- ICHS incoming channel sample
- - CAU cell assembly module
- ICHI incoming channel identity
- ICRC module for managing the routing of incoming channels
- OCLD outgoing cell data
- - CCC channel grouping control module
- ICHRD routing data of incoming channels
- CHCI channel grouping instructions
- ICTT translation table for incoming channels
- DCCTM recipient CCTM
- - OCHI identity of the outgoing channel
- CCCM channel group management memory
- TNCDC total number of channels per output CCTM
- NARCH number of channels already received
- CCCL channel grouping control logic
- CHBM cell header buffer
- DSBM data buffer
- - SLPM memory of pointers of chained list of intervals
- SLLM chained list of intervals memory
- SSAP first interval address pointer
- LSAP pointer to last interval address
- CHTI channel type indicator
- - CHEP position of a channel data block in a cell.
- N is the total number of synchronous channels; P is the maximum number of channels 1 4 per CCTM 1 5; Q is the maximum number of CCTMs 1 5 of switching node 1 1.
- a CCTM ends with external interfaces which are multiplex links of several channels, for example links at a primary rate of 2.048 Mbit / s, multiplexing 32 channels at 64 kbit / s.
- the CCTMs are connected to the asynchronous switch (ASC) by means of interfaces 1 6 transferring cells.
- ASC asynchronous switch
- Each interface between a CCTM and the ASC can in fact correspond to one or more physical links, but globally equivalent to a bit rate of B Mbit / s. 2-2
- each CCTM can transmit or receive a maximum of B / 424 cells per second (B being the total bit rate available at the ASC interface).
- composite cells is based on the grouping of several (S) samples of S different channels of the same synchronous multiplex frame (typically 1 25 ⁇ s) in the data field ("payload") of each ATM cell, these S channel samples to be transferred to a destination CCTM (consequently, these S incoming channels are channels which must be transferred to at least S outgoing channels all belonging to the same destination CCTM).
- S synchronous multiplex frame
- each channel sample comprises 8 bits
- S MAX 48 channels, in its 48 byte data field.
- the maximum filling cannot always be obtained, since it depends on the distribution of traffic between the incoming channels and the outgoing channels.
- each input CCTM would distribute its P channels equally to Q output CCTM, i.e. it would connect P / Q channels between each pair of CCTMs. entry and exit.
- a filling at an average rate for example, a grouping of 8 channels per composite cell when P is 1024 and Q is 1 28; such a grouping makes it possible to use 1 28 cells per frame.
- the least favorable traffic distribution case that is to say leading to the maximum number of "composite" cells per frame, (therefore to the highest load of cell traffic at the CCTM / ASC), corresponds to the case where an input CCTM supports: Q- l cells with only one channel each, respectively to Q- l output CCTM;
- the main characteristic of this approach consists in transferring several (S) channel samples, typically all belonging to S different channels (and therefore only one sample per channel), grouped together ("clustered" in English) in a single cell, but with an explicit channel identification respectively associated with each of the channel samples. As described below, this can be the identification of the input channel in the input CCTM, or the identity of the output channel in the output CCTM.
- the data field of an ATM cell can contain up to 21 blocks channel data (1 0 + 8 bits each).
- the channel data blocks to be transmitted to a given outgoing CCTM are grouped dynamically according to an optimal mode (as is presented below, several optimal techniques can be envisaged), with the property that this dynamic grouping can always be carried out independently of the groupings carried out in previous cycles.
- One possible technique is to consider the total number of channels to switch to each outgoing CCTM to fill ATM cells with the first available input channel samples, and to transmit a cell when it is completely full, or when the it is detected that all the channels expected for the outgoing CCTM in question have been received.
- this type of method would lead to the construction of a first full cell with 21 blocks of channel data, and of a second incomplete cell with a single block of data channel.
- it could for example be a connection belonging to the fourth set of channels. In this case, cell 4 would now carry S4 2 channels, instead of 3.
- the dynamic grouping of channels according to the invention ensures at each cycle an optimal self-adapting assembly of the channels into cells whatever the changes in the traffic distribution, and without requiring any configuration management to associate sets of channels and particular cells.
- the number of channels per cell (S) is a statistical variable whose value strongly depends on the distribution of traffic between the input CCTMs and the output CCTMs. Up to a certain point, this is also true in the technique according to the invention, as long as cells of fixed size are used. In this case, the ASC transfers fixed-length cells carrying a variable number of channels, some of the cells being used efficiently (fully), while others are not. Due to the principle of the semi-permanent allocation of channels in structured sets of channels, namely cells, the corresponding management in the approach using conventional "composite” cells would become even more complex if we tried to apply it. to the variable cell technique. Conversely, the new technique according to the invention, based on a self-adaptive approach to the dynamic (re) grouping of channels, leads to optimal use of cells of variable size.
- this dynamic (re) grouping mechanism can use a list of channel data blocks (channel sample + channel identity) to assemble cells of variable length, the length of this list being known at each cycle, ie as a fixed length, either as a length derived from the current number of active channels (and possibly other parameters).
- channel x in CCTM x, channel x is known to be connected to channel y in CCTM y; - in the cell transferred between CCTM x and CCTM y, the identification of the outgoing channel (y channel) is used; in the CCTM y, the address of the output channel is directly available, since it is received explicitly.
- CCTM y but it is unclear to which specific outgoing channel; in the cell transferred between the CCTM x and the CCTM y, the identification of the input channel (channel x) is used; in CCTM y, the input channel x of the input CCTM x is known to be connected to the output channel y.
- variant A In addition to the different localization of the data defining the association between the input and output channels of the connection (chx / CCTM x to chy / CCTM y) these two architectural variants have the following differences: in variant A , only the output channel identities are required in the cell; in variant B, in addition to the individual identity of each input channel, there must be a direct or indirect indication (see paragraph 3-2-3) of the origin of the cell, namely the CCTM x entry; when the output channel can be freely selected (typically from the free channels of an outgoing multiplex line managed by a CCTM output), the selection of a free output channel takes place, within the framework of variant A, in the CCTM y, and therefore the identity of the selected channel y must be communicated to the CCTM x.
- the request can be made by the CCTM x for the input channel x and therefore the CCTM y can locally select an output channel y without having to communicate the identity of the latter to the CCTM x.
- the connection establishment time can be reduced; when considering the case of point-to-multipoint connections between an input channel x and several (k) output channels y 1 , y 2 , ... y k possibly belonging to different CCTMs y, variant A as such is not appropriate, because it is desirable to send only a single copy of the channel data to each CCTM concerned therein.
- variant B is more suitable for point-to-multipoint connections of this type, since: in CCTM x, it is known that the canql x must be connected to at least one channel y in CCTM y ] ; y 2 , ...., y k . Consequently, the CCTM x makes the necessary copies of the channel x data for the k CCTM y recipients; in each CCTM y concerned, the channel x can also be locally associated with several outgoing channels y ] t y 2 / , y ; which are known and managed locally.
- ASC asynchronous cell switches
- CCTM interconnect terminal modules
- connection when the prior establishment of a connection path is a necessary condition in the ASC to allow the latter to route cells between incoming and outgoing CCTMs;
- both variants A and B can be used (i.e. the use of an input or output channel identity in the cells).
- the connection reference identifier CRI
- the CRI being implicitly present in the header field of the cell for its routing (for example, the identifier "VCI / VPI" in the case of cells Standardized ATM).
- the individual cells are routed only on the basis of their destination addresses, that is to say the outgoing CCTMs and there, without connection paths being established beforehand between the CCTMs.
- variant B provision must be made to add in the cell the explicit identification of the transmitting CCTM x (since the cell normally provides in this case only the identity of the recipient CCTM y in its field of -head).
- the channel data blocks can be grouped in cells according to their real arrival time, so as to be able to minimize the waiting times in the input CCTM; the number of channel data blocks per cell (as well as the cell length to be used in the case of variable-length cells) can be determined dynamically, based on the current number of input channels to be routed to each CCTM y, so as to minimize the traffic load of the cells; alternatively, the number of blocks of channel data per second, and possibly the length of the cells, can be changed dynamically (i.e. change at each cycle) so as to randomize the start time of a cell to the ASC and thus reduce the time correlation of the arrival of cells in an output CCTM compared to the synchronous arrival of channel data in the input CCTMs.
- additional frame information can be added to the cell, for example under the form of a bit designating an A or B frame in the uncertain case where a received channel can belong to any one of two consecutive frames.
- This technique known in itself can be used in combination with the principle (dynamic) grouping of channels according to the invention, as well with a common frame indicator per cell, when all the channels of a cell belong to the same frame, than with an individual frame indicator per channel sample, if it is more generally planned to transmit in the same cell channel samples belonging to different frames.
- ASC "without connection”
- cell transport protocol cells of variable length, of the type of cells with multiple intervals ("multislot”); format of cells with multiple intervals: M intervals of 8 bytes each: first interval: (cell header) containing (at least): - CCTM y of destination (CCTM y of output)
- Original CCTM x input CCTM x
- NCE channel data blocks
- CHE channel data blocks
- a further optimization of the cell size would therefore consist in placing (at least) a first channel data block (CHEl) in the first interval of the cell, so that a small cell comprising a single interval may be sufficient to route a single channel data block.
- CHEl first channel data block
- NBCHE1 ([NCHEIC / 4 J ru + 1) * 8 / NCHEIC where: NCHEIC is the number of multiplex channels in the cell; ru is the function delivering the first integer greater than or equal to the calculated value.
- the efficiency characterized by the NBCHEI report shows that a factor between 2.5 and 3 is obtained with a number of channels per cell between 1 2 and 1 6.
- We can therefore limit in practice the maximum length d 'such a cell at N 4 or 5 intervals.
- the maximum length of a cell is 5 intervals (ie 1 6 CHE at most per cell).
- TNCDC total number of channels per output CCTM y
- the grouping technique is such that dividing TNCDC by 1 6 (always assuming that 1 6 is the maximum number of channel data blocks per cell) gives: a quotient which is the number of completely filled cells (NCFC), that is, each containing 1 6 channel data blocks; a remainder which is the number of channel data blocks conveyed by an additional cell that is incompletely filled (if this remainder is not zero).
- each of the two above parameters can be coded with 8 bits, for the range from 1 to 256 (by convention it is assumed that the value 0 is known in a way separate).
- TNCL which can vary from 1 to 1 6) here represents the total number of cells (to be used for the CCTM concerned), and NCHELC (also varying from 1 to 1 6) represents the number of channel data blocks in the last cell. Consequently, it can be noted that, among the TNCL cells, the first TNCL-1 cells are always completely filled and that the last cell comprises NCHELC channel data blocks which are less than or equal to 1 6 (that is that is, the last cell can be a completely or partially filled cell).
- FIG. 2 is a functional diagram of an exemplary embodiment of an input CCTM (or incoming CCTM), in which the ICRU module
- the ICRU module delivers an ICHS 23 input channel sample to CAU 24 and an ICHI 25 input channel identity to the ICRC module.
- the ICRU 21 modules also provide all the termination functions required with external synchronous channel interfaces.
- the CAU module 24 provides outgoing cell data (OCLD) to the CTU module 22 which performs the termination functions with the interface at the cell level, with the switch ASC.
- OCLD outgoing cell data
- the ICRC module 26 uses the ICHI identity (chx) 25 received to determine the corresponding routing data, that is to say the identity of the destination CCTM (CCTM y) which is transmitted to the CCC module 28 (module channel grouping control), and in the case of version A the identity of the output channel (chy).
- a connection control function not illustrated in the figure
- the ICRC module 26 updates the total number of channels by destination CCTM (TNCDC) managed by the CCC module 28 by sending TNCDC update information (TNCDCU ) 21 0 to the latter.
- the CCC module 28 uses the destination CCTM information received (DCCTM) 21 1 to develop the instructions 2 1 1 for appropriate channel grouping (CHCI) for the CAU module 24, according to the technique of (re) grouping of channels described above. .
- the CAU module 24 receives the input channel sample 23 (ICHS) as well as the transferred channel identity 21 2 (TCHI), and ensures the necessary assembly of the channel data block in the cell at multiple intervals in function of the instructions CHCI 2 1 1 of the module CCC 28.
- the module ICRC 26 is organized around a translation table for the input channels (ICTT) as illustrated in FIG. 3A and 3B. The entry of this ICTT 31 table selected by the ICHI data
- DCCTM destination CCTMs 33
- OCHI output channel 34
- the CCC module 28 is organized around a memory 41 for channel group management (CCCM) as illustrated in FIG. 4.
- CCCM channel group management
- Each memory line of the CCCM 41 selected by one of the particular CCTMs contains the two TNCDC parameters 42 ( total number of channels per destination CCTM) and NARCH 43 (number of channels already received) as defined above.
- the two parameters TNCDC 42 and NARCH 43 are transmitted to a channel grouping control logic (CCCL) after incrementation 45 of the value NARCH 44 when a channel is received (this incremented value is then written in the NARCH field of the address concerned in the CCCM memory).
- CCCL channel grouping control logic
- the module CCCL 44 executes the logic operations required to implement the channel grouping mechanism described above, and generates the instructions 21 1 for assembling the appropriate channels (CHCI) for the module CAU 24.
- the TNCDC parameter total number of channels per destination CCTM
- the TNCDC parameter (total number of channels per destination CCTM) must be updated (46), that is to say incremented or decremented, each time information 47 for updating the TNCDC (TNCDU ) is sent by the ICRC 26 module indicating that a channel must be added or removed from the TNCDC for one of the CCTMs (connection establishment or release).
- the CAU 24 module is organized around two buffer memories used to assemble cells at multiple intervals, one for cell headers (first intervals) and the other for the cell data field (data intervals) as shown in Figure 5. This particular structure makes it possible to construct the cell header of a new cell while the first channel data block (for this cell) is received, which is stored in the second memory.
- the first buffer memory 51 is the header memory (CHBM) which comprises K 64-bit entries, each memory line containing the header of a cell, (that is to say the first interval of a cell), which is constructed when a new cell must be assembled for a destination CCTM.
- the second buffer memory 52 is the data memory (DSBM) which comprises K D 64-bit inputs (8 bytes per interval), each data interval containing up to 4 blocks of channel data.
- Each buffer memory 51 and 52 (CHBM and DSDM) is managed as a conventional shared buffer memory, in which any available interval memory location can be allocated to a cell by a function for managing the available interval memory locations (the available intervals are typically managed as a FIFO stack or a linked list of available locations).
- the size of these buffer memories CHBM 51 and DSDM 52 (that is to say the number of memory locations of intervals K H and K D ) is chosen as a function of the probability that there is a need for more than K H and K D locations for storing intervals respectively for all the cells simultaneously being assembled or awaiting transmission.
- a conventional linked list technique is used to chain the addresses of consecutive cell intervals, using two control memories 53 and 54 address of intervals: a memory 53 of the pointers of list of intervals (SLPM); a memory 54 of linked list of intervals (SLLM).
- the SLPM memory 53 has Q entries, each entry corresponding to a particular destination CCTM (DCCTM) and containing two interval address pointers, namely: the pointer 55 of a first interval address (FSAP) which designates the address of the first interval of the cell (cell header) stored in the memory CHBM 51; the last interval address (LSAP) pointer 56 which designates the address of the last current cell interval stored in the DSDM memory 52.
- DCCTM destination CCTM
- FSAP first interval address
- LSAP last interval address
- the CCC module 28 delivers channel grouping instructions to the CAU module 24 each time a new channel is received and must be assembled in a cell.
- three channel reception situations can be encountered by the CCC 28 module (always assuming that the cell assembly technique is such that the CCC 28 module always knows the number of channels group in each cell): first channel of a cell; intermediate channel of a cell; last channel of a cell.
- CHTI channel type indicator
- the module CCC 28 provides the following information to the module CAU 24: the identity of the destination CCTM (DCCTM); the position of the channel data block (CHEP) in the cell.
- DCCTM destination CCTM
- CHEP channel data block
- the CCC module 28 indicates the number of channel data blocks in the cell to the CAU module 24.
- the CAU module 24 adds the data block of the corresponding channel in a cell as follows, according to the channel type indicator (CHTI ) given by the CCC 28 module: a - first channel
- a new cell is created for the destination CCTM concerned, which requires: the allocation of a new first interval (cell header) in the memory CHBM 51; allocating a new data interval in the DSBM memory 52 (for the second interval of the cell).
- These selected addresses are stored as follows, in interval address control memories: in the entry of the concerned DCCTM of SLPM 53, the first interval supplied is registered as a pointer for first interval address (FSAP) and the data interval is registered as the last interval address (LSAP) pointer; in the SLLM memory 54, the link between the first two intervals is established by writing the address of the data interval (that is to say the second interval) in the memory line corresponding to the first interval.
- FSAP pointer for first interval address
- LSAP last interval address
- the contents of these two intervals are prepared as follows, in the buffer memories: in the memory CHBM 51, the cell header is constructed by writing the information required for the cell, comprising: the identity of the destination CCTM concerned (to which the cell will be routed); - the identity of the issuing CCTM (required only in the case of version B); the number of channel data blocks in the cell (NCHEIC) delivered by the CCC module 28 as part of the channel grouping instructions; - in DSBM memory 52, the data block of the channel received (i.e.
- the channel sample and the channel identity is stored in the new data interval provided in the 16 bit field defined by the position of the channel data block (CHEP) provided by the CCC module 28 in the form of part of the channel grouping instructions, namely position # 1 in this case.
- CHEP channel data block
- the CAU module 24 reads the pointers 56 of address of the last interval (LSAP) in the memory SLPM 53 to find the address of the last current data interval where the data block of the channel received channel must be stored in DSBM memory 52 at the position defined by the CHEP pointer supplied by the CCC 28 module.
- LSAP last interval
- the CAU 24 When a fourth channel entry is entered in a data interval, the latter is completely full and a new data interval is required and allocated to the cell in advance. Consequently, the address of the next data interval is written: in the memory SLPM 53 as an address counter for the last interval (update of the LSAP); in the memory SLLM 54 as a new interval address in the memory line of the interval which has just been completed (update of the linked list), c- last channel
- the CAU 24 In the case of a last channel, the CAU 24 first stores the last block of channel data received in the memory DSBM 52, at the position designated by the pointer CHEP, in the same way as in the case of an intermediate channel. Then, the cell being complete, the latter is transferred to a cell transmission queue to exit the ASC, via the CTI.
- the cell output queue is a simple linked list of intervals, such that all the intervals of a cell remain linked to each other, and that the first interval d 'a new cell is linked to the last interval of the previous cell; this list of cells awaiting transmission is managed by two cell output queue pointers: - a first interval address pointer (FQSAP
- LQSAP 58 a last interval address pointer
- the operation of the output CCTMs is relatively simple, when using the dynamic channel grouping technique presented above, because the latter eliminates the need for any configuration management associating sets of channels with particular cells in the output CCTM.
- the output CCTM simply extracts the different blocks of channel data, and transfers the channel samples to a memory for receiving TSSRM channel samples 61, such as 'illustrated in Figures 6A and 6B, using the associated channel identities as described below depending on whether one implements versions A ( Figure 6A) or B ( Figure 6B) presented above.
- each channel identity of a data block transmitted in the cell is the output channel CHy (for CHI), and this channel identity can be used directly to address the memory TSSRM to memorize the channel samples received.
- each channel identity of a transmitted data block is that of the input channel CHx (ICHI).
- a translation is therefore necessary to determine which output channel CHy should be associated with the input channel CHx of the starting CCTM.
- a more economical technique consists in using an addressable memory 62 (CAM) comprising P memory lines (one per outgoing channel), each line comprising the connected CHx / CCTMx address; such a CAM memory makes it possible to determine which line CHy contains the address of the incoming channel. Then, the output channel CHy delivered by the memory CAM is used in the same way as in the context of version A, to store the sample channel at the address CHy of the memory TSSRM. In version A or B, the TSSRM memory is read synchronously to output the stored channel samples according to the rhythm of the synchronous time frame.
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Abstract
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Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU21671/99A AU2167199A (en) | 1998-01-26 | 1999-01-25 | System and method for asynchronous switching of composite cells, and corresponding input port and output port modules |
EP99901625A EP0993723A2 (fr) | 1998-01-26 | 1999-01-25 | Systeme et procede de commutation asynchrone de cellules composites, et modules de port d'entree et de port de sortie correspondants |
US09/381,727 US6807177B2 (en) | 1998-01-26 | 1999-01-25 | System and method for asynchronous switching of composite cells, and corresponsing input port and output port modules |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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FR9800774A FR2774242B1 (fr) | 1998-01-26 | 1998-01-26 | Systeme et procede de commutation asynchrone de cellules composites, et modules de port d'entree et de port de sortie correspondants |
FR98/00774 | 1998-01-26 |
Publications (2)
Publication Number | Publication Date |
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WO1999038293A2 true WO1999038293A2 (fr) | 1999-07-29 |
WO1999038293A3 WO1999038293A3 (fr) | 1999-09-30 |
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Application Number | Title | Priority Date | Filing Date |
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PCT/FR1999/000141 WO1999038293A2 (fr) | 1998-01-26 | 1999-01-25 | Systeme et procede de commutation asynchrone de cellules composites, et modules de port d'entree et de port de sortie correspondants |
Country Status (5)
Country | Link |
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US (1) | US6807177B2 (fr) |
EP (1) | EP0993723A2 (fr) |
AU (1) | AU2167199A (fr) |
FR (1) | FR2774242B1 (fr) |
WO (1) | WO1999038293A2 (fr) |
Families Citing this family (8)
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WO2001020858A1 (fr) * | 1999-09-16 | 2001-03-22 | Telefonaktiebolaget Lm Ericsson (Publ) | Emulation dynamique de circuits par commutateurs a mode de transfert asynchrone (atm) |
US7088704B1 (en) * | 1999-12-10 | 2006-08-08 | Lucent Technologies Inc. | Transporting voice telephony and data via a single ATM transport link |
WO2002080493A1 (fr) * | 2001-03-29 | 2002-10-10 | British Telecommunications Public Limited Company | Conversion de protocole |
US7260393B2 (en) * | 2003-09-23 | 2007-08-21 | Intel Corporation | Systems and methods for reducing communication unit scan time in wireless networks |
US8081572B1 (en) | 2006-01-11 | 2011-12-20 | Juniper Networks, Inc. | Hierarchical packet scheduling |
US7649913B2 (en) * | 2006-10-20 | 2010-01-19 | D&S Consultants, Inc. | Method and system for mitigating traffic congestions in a communication network |
CN102414991B (zh) * | 2009-04-24 | 2014-11-05 | 诺基亚公司 | 用于解码器的数据重排 |
BR112013033330A2 (pt) * | 2011-06-24 | 2017-01-31 | Halliburton Energy Services Inc | método, dispositivo de armazenamento legível por máquina, e, sistema |
Citations (3)
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US5301189A (en) * | 1991-08-19 | 1994-04-05 | Siemens Aktiengesellschaft | Telecommunication network having ATM switching centers and STM switching centers |
WO1995034977A1 (fr) * | 1994-06-13 | 1995-12-21 | Telefonaktiebolaget Lm Ericsson | Procede et n×ud de commutation destines a commuter des cellules stm dans un commutateur atm emule par circuit |
WO1997033406A1 (fr) * | 1996-03-08 | 1997-09-12 | Ntt Mobile Communications Network Inc. | Systeme et procede de transmission atm multiplex a cellules courtes |
Family Cites Families (6)
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US5550820A (en) * | 1992-09-29 | 1996-08-27 | Com 21, Inc. | Multiple protocol personal communications network system |
US5544163A (en) * | 1994-03-08 | 1996-08-06 | Excel, Inc. | Expandable telecommunications system |
KR100200558B1 (ko) * | 1996-11-04 | 1999-06-15 | 서평원 | Atm망에서의 고정전송속도 트래픽의 셀 분할과 조립에 관한 장치와 방법 |
KR100290999B1 (ko) * | 1997-06-11 | 2001-07-12 | 윤종용 | 음성 통화서비스가 가능한 에이티엠 스위치장치 및 방법 |
JPH11136710A (ja) * | 1997-10-28 | 1999-05-21 | Fujitsu Ltd | セル伝送ネットワークにおける通信データのディジタル1リンク中継システム |
US6356546B1 (en) * | 1998-08-11 | 2002-03-12 | Nortel Networks Limited | Universal transfer method and network with distributed switch |
-
1998
- 1998-01-26 FR FR9800774A patent/FR2774242B1/fr not_active Expired - Fee Related
-
1999
- 1999-01-25 WO PCT/FR1999/000141 patent/WO1999038293A2/fr active Application Filing
- 1999-01-25 EP EP99901625A patent/EP0993723A2/fr not_active Withdrawn
- 1999-01-25 US US09/381,727 patent/US6807177B2/en not_active Expired - Fee Related
- 1999-01-25 AU AU21671/99A patent/AU2167199A/en not_active Abandoned
Patent Citations (3)
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US5301189A (en) * | 1991-08-19 | 1994-04-05 | Siemens Aktiengesellschaft | Telecommunication network having ATM switching centers and STM switching centers |
WO1995034977A1 (fr) * | 1994-06-13 | 1995-12-21 | Telefonaktiebolaget Lm Ericsson | Procede et n×ud de commutation destines a commuter des cellules stm dans un commutateur atm emule par circuit |
WO1997033406A1 (fr) * | 1996-03-08 | 1997-09-12 | Ntt Mobile Communications Network Inc. | Systeme et procede de transmission atm multiplex a cellules courtes |
Non-Patent Citations (1)
Title |
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COVINGTON W O ET AL: "VOICE TRANSPORT OF AN ATM BROADBAND NETWORK" COMMUNICATIONS TECHNOLOGY FOR THE 1990'S AND BEYOND, DALLAS, NOV. 27 - 30, 1989, vol. 3, 27 novembre 1989 (1989-11-27), pages 1921-1925, XP000091280 INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS * |
Also Published As
Publication number | Publication date |
---|---|
FR2774242A1 (fr) | 1999-07-30 |
US20030193939A1 (en) | 2003-10-16 |
EP0993723A2 (fr) | 2000-04-19 |
FR2774242B1 (fr) | 2000-02-11 |
US6807177B2 (en) | 2004-10-19 |
AU2167199A (en) | 1999-08-09 |
WO1999038293A3 (fr) | 1999-09-30 |
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