WO1999028964A1 - Method for producing electronic device and foreign matter analyser therefor - Google Patents

Method for producing electronic device and foreign matter analyser therefor Download PDF

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Publication number
WO1999028964A1
WO1999028964A1 PCT/JP1998/005439 JP9805439W WO9928964A1 WO 1999028964 A1 WO1999028964 A1 WO 1999028964A1 JP 9805439 W JP9805439 W JP 9805439W WO 9928964 A1 WO9928964 A1 WO 9928964A1
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WIPO (PCT)
Prior art keywords
foreign matter
electronic device
manufacturing
foreign
analyzing
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Application number
PCT/JP1998/005439
Other languages
French (fr)
Japanese (ja)
Inventor
Hidefumi Ibe
Kenji Watanabe
Akira Shimase
Masataka Shiba
Tsutomu Sakamoto
Original Assignee
Hitachi, Ltd.
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Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Publication of WO1999028964A1 publication Critical patent/WO1999028964A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device in a production line required for early start-up of the yield of semiconductor devices such as a memory, an ASIC or other LSI, a magnetic disk device, a liquid crystal, etc.
  • semiconductor devices such as a memory, an ASIC or other LSI, a magnetic disk device, a liquid crystal, etc.
  • the process of a semiconductor device can be divided into several hundred steps if it is subdivided in units of equipment, and foreign matter 6 generated during the manufacturing process is usually the same as that of a film 8 formed in a certain process, as shown in FIG.
  • the film 7 that adheres to the upper surface and is formed in the next process is formed on the foreign material 6.
  • foreign substances are often present in a state of being sandwiched between several films.
  • Defective semiconductor devices are usually subjected to quality inspection at the stage where they have a single function, such as after the completion of a wiring process. In memory devices, devices that detect bad bits are often used for this purpose.
  • foreign matter analysis is performed offline to determine the cause, and countermeasures are taken.However, analyzing a large number of foreign matters and identifying the cause based on the results often takes a very long time. This is a necessary task. In any case, the process range where foreign matter is generated is limited to some extent Yes, but it is extremely difficult to quickly identify equipment and take effective measures.
  • the foreign matter generator cannot be specified.
  • it is necessary to further cope with the film formation process In some cases, it is necessary to determine by analyzing the film before the second and third steps. If the film element structures before the generation of foreign matter are arranged in the order of, for example, FGH, it is necessary to extract and determine the steps in that order from a database on processes. Once the foreign matter generation process has been identified in this way, the next step is to trace the history of the wafer and use the equipment used in the relevant process (it is often necessary to use multiple equipment in the same process, so it is necessary to identify which equipment There is. The above analysis also requires a long time.
  • An object of the present invention is to provide a method of manufacturing a high-yield electronic device and a foreign-matter analyzing apparatus for the same, which can identify a cause and a generator of foreign matter on a semiconductor device during manufacture within one day. Disclosure of the invention
  • the following are the basic components in order to be able to specify the cause of generation of foreign matter on a semiconductor device and the device in a short time.
  • the initial motion analyzer includes a device for exposing a cross section of a foreign substance of a device and a device for specifying a constituent element and a structure of a film adjacent to the foreign substance cross section and the foreign substance.
  • FIG. 1 is a diagram showing the general concept of the present invention
  • FIG. 3 is a diagram showing an example of a cross section of a device including foreign matter.
  • FIG. 3 is a diagram showing an example of a current state of a foreign matter separating procedure of a semiconductor device.
  • FIG. 4 is a diagram showing a cause of foreign matter generation in a semiconductor device.
  • FIG. 5 is a diagram showing an example of a configuration of an initial analyzer required for short-time identification of the device.
  • FIG. 5 is a diagram showing a top view of one embodiment of an initial analyzer according to the present invention.
  • FIG. 6 is a diagram showing a side view of one embodiment of the initial analysis apparatus according to the present invention.
  • FIG. 1 is a diagram showing the general concept of the present invention
  • FIG. FIG. 3 is a diagram showing an example of a cross section of a device including foreign matter.
  • FIG. 3 is a diagram showing an example of a current state of a foreign matter separating procedure of a semiconductor
  • FIG. 7 is a view showing a side view of one embodiment of the initial analysis apparatus according to the present invention.
  • FIG. 8 is a diagram showing the overall appearance of an embodiment of the initial motion analyzer according to the present invention
  • FIG. 9 is a diagram showing one of the positional relationships between the AES and the FIB sample according to the present invention.
  • FIG. 10 is a diagram showing one of the positional relationships between the AES and the FIB sample according to the present invention
  • FIG. 11 is a diagram related to the present invention.
  • Fig. 1 shows one of the positional relationships between the samples excavated by AES and FIB.
  • Fig. 12 shows the relationship between the incident angle of ions and the sputter efficiency.
  • FIG. 13 The figure is a diagram showing one of the positional relationships between AES and FIB according to the present invention
  • FIG. 14 is a diagram showing one of the positional relationships between AES and FIB according to the present invention.
  • Fig. 15 shows the method of returning foreign matter to the focus of FIB and AES when the stage is rotated.
  • Fig. 16 shows the integration of AES and FIB.
  • FIG. 17 is a diagram showing the positional relationship of each part in the apparatus from the top and the side.
  • FIG. 17 is a diagram showing the arrangement of shirts for preventing AES contamination by FIB.
  • the figure shows the support structure of the equipment that assists accurate alignment when FIB and AES are used in a single container.Fig.
  • FIG. 19 shows the case where FIB and AES are used in a single container.
  • FIG. 20 is a diagram showing an outline of a vacuum container for simplifying loading and unloading
  • FIG. 20 is a diagram showing an embodiment of the initial motion analyzer according to the present invention.
  • Fig. 21 shows an example when LI MS-TOF is used.
  • Fig. 21 shows an example of a computer screen for registering a film formation structure in the coordinates of foreign particles.
  • Fig. 22 Is different
  • Fig. 23 shows an example of a computer screen that assists in analyzing a film formation structure in object coordinates.
  • Fig. 23 shows a computer screen that assists in analyzing a film formation structure in foreign object coordinates.
  • FIG. 24 shows an example of a computer screen that uses the foreign matter generation process / apparatus for specific support.
  • a wafer is assumed as a semiconductor device for simplicity.
  • the present invention can be similarly applied to magnetic disks other than wafers and thin film transistors (FT).
  • FT thin film transistors
  • the system configuration is as follows.
  • the first-movement analysis station 1 is located adjacent to the production line to save time during wafer transfer and to prevent foreign substances from adhering unnecessarily during wafer transfer.
  • the initial motion analyzer can measure the structure and element distribution of the device cross section including foreign matter.
  • the system includes software that analyzes or supports analysis of the film formation structure at arbitrary coordinates of the device.
  • this system can be applied to a prototyping line as well, and it is possible to eliminate defects caused by foreign matter and foreign substances at an early stage.
  • the process is set by the analysis station 1 linked to the optical particle inspection device 2 several times during several hundreds of detailed processes.
  • the foreign substance inspection device 2 obtains in advance the size and coordinates of the foreign substance, cluster information (characteristics of the arrangement of the foreign substances), and the like, and then performs analysis. This information is Of course, it is necessary to locate the object, but it is a source of information for selecting foreign substances to be analyzed.
  • the cross-sectional image alone cannot identify the process, equipment, and causative substance of the foreign substance, perform elemental analysis of the foreign substance and / or elemental analysis of the adjacent film, and refer to the database on the film formation process and equipment information. Identify the process, equipment, and causative substance of the foreign matter.
  • the wafer size is currently 20 cm to 30 cm in diameter, and the sample stage is desirably 30 cm in diameter or more. With this size, the magnetic disk is less than 10 cm in diameter and can be analyzed as is.
  • liquid crystal displays have a diagonal length of 12 or 13 inches, so a sample stage of about 30 to 35 cm can be used. As the size is expected to increase further in the future, the size of the stage must be correspondingly increased.
  • the procedure for analyzing foreign matter according to the present invention will be described with reference to the cross-sectional structural view of the semiconductor device shown in FIG. While confirming the cross section with SEM, the foreign material cross section 6 and the surrounding film structure are exposed by FIB.
  • the spatial resolution AES is used as the elemental analyzer because of the limitations.
  • the elemental analysis on the line 9 including the foreign matter 6 and the upper and lower films 7 and 8 is performed by AES, and the constituent elements of the foreign matter 6 and the components of the upper and lower films 7 and 8 are measured. In this way, the material, thickness, etc. of the films 7 and 8 above and below the foreign matter 6 are known. I understand.
  • the equipment used in the relevant process can be specified from the history record of the wafer, and the operating conditions of the equipment can be found. Since the AES line analysis takes time, three points analysis of the foreign material 6 and one point in the cross section of the upper and lower films 7 and 8 may achieve the purpose in some cases.
  • FIG. 1 One embodiment of the analyzer according to the present invention is shown in FIG.
  • the FIB 10 and the AES 11 are separated from each other, and the two can be isolated by the gate valve 12.
  • the wafer is first set in the load mechanism 13, vacuum-evacuated in advance, the gate valve 12 is opened, the wafer is introduced into the processing chamber 23 for the FIB 10, and after being positioned in the stage drive mechanism, Observe the appearance using the SIM function provided with SEM14 or FIB10.
  • the stage drive mechanism is premised on XY Z three-axis drive unless otherwise specified.
  • the positional relationship between the FIB column 10 and the SEM column 14 is adjusted in advance so that the electron beam is focused on the processing point by the FIB. For this reason, it is possible to monitor the progress of the processing at a certain frequency during the processing of the cross section in the FIB and monitor the progress of the processing to determine the processing end point with high accuracy.
  • An infrared heater 19 is installed in the loading mechanism 13 so that the wafer can be baked if necessary. After that, the wafer was opened with the gate valve 12 between it and the AES 11, introduced into the analysis chamber 28 for the AES 11, and positioned, and then, if necessary, cut out with the ion gun 17.
  • Adsorbed atoms are removed, and cross-section observation and elemental analysis are performed using the SEM function attached to AE S11.
  • F Since the hole is drilled vertically in IB10, AES is attached to the vacuum container 28 diagonally so that the cross section can be seen.
  • the AES is a form that uses a combination of the SCA for the electron gun 21 and the detector. After the measurement is completed, it is pulled out of unload chamber 20 and moved to the next process or locked out.
  • the analyzer is a separate container, AES, which requires a particularly high degree of vacuum, has good maintainability, such as maintaining the degree of vacuum, but requires only two positions on the stage. Times needed. However, it is easy to detect relatively large holes drilled by the FIB in the analysis chamber, and this is not an essential minus.
  • FIGS. 5 and 6 Another embodiment in which the FIB column 10 and the AES column 11 are installed in different chambers is shown in FIGS. 5 and 6.
  • the wafer to be analyzed introduced from the loading chamber 13 is introduced into the processing chamber 23 via the gate valve 12 and is usually placed at a plurality of predetermined positions by the FIB 10.
  • Cross-section processing is performed.
  • electrons are irradiated from the electron shower 25 to the region including the ion beam irradiation region in order to avoid movement of the processing position due to accumulation of ion charges.
  • the secondary particle detector 24 can detect both secondary ions and secondary electrons.
  • a scintillator and a photomultiplier tube are installed in a channeltron, microchannel plate, or microphone channel plate. The structure of the detector combined is taken. The wafer for which the cross-section processing has been completed moves to the analysis chamber 28 via the gate valve 12 next.
  • the CMA-type detector used as the AES lens tube 1 is equipped with electron beam focusing and scanning functions.
  • Analyze target by detecting with secondary electron detector 27 The SEM image is obtained, and it is used to perform beam positioning to the analysis position after moving to the predetermined position on the stage. Therefore, the analysis chamber 28 is equipped with a rare gas ion gun 26 to remove a natural oxide film or the like covering the surface to be analyzed. Next, the object to be analyzed is irradiated with an electron beam by AES 11 and analyzed. This operation is repeated for a plurality of specified locations, and the analysis data acquisition ends. After that, the wafer is taken out to the loading chamber 20 via the gate valve 12. The above is the processing / analysis process in the apparatus of the present embodiment.
  • One of the advantages of this embodiment is that the AES analysis in the analysis chamber 28 requires an ultra-high vacuum, but the processing chamber 23 does not require an ultra-high vacuum. This reduces the load on the processing chamber 23 to vacuum. This reduces the restrictions on having a drive in the processing chamber 23 ⁇ . Further, processing can be advanced in the processing chamber 23 while the analysis is being performed in the analysis chamber 28. Furthermore, since the chamber is evacuated to a vacuum inside the processing chamber 23, it is evacuated for the time required for processing before the wafer is introduced into the analysis chamber 28. ⁇ ⁇ C can be introduced, and there is no need to provide a preliminary evacuation time until degassing from the sample, which is usually required in ultra-high vacuum, is reduced. The total time required for these rework and analysis processes can be reduced.
  • the loading chamber 20 is also provided on the analysis chamber 28 side at the time when the analysis in the analysis chamber 28 is completed. This is because the wafer cannot be taken out to the processing chamber 23 side because the holder on which the wafer is placed is inserted. However, when returning the processed wafer to the line after processing and analysis, it may be necessary to refill the processing traces. At this time, the next item is not put in the processing chamber 23, but is added from the analysis chamber 28. It is necessary to return to ethiamba 23. In this case, an improved device configuration is shown in the following embodiment. Another advantage of the present embodiment is that since an ultra-high vacuum is not required for the processing chamber 23, the etching gas and the deposition gas are supplied from the gas supply device 22 to the processing chamber 23 via the nozzle. In addition, it is possible to increase the processing speed and implement backfilling.
  • the next wafer cannot be introduced into the processing chamber 23 in order to backfill the processing trace, and the advantage of using another chamber is partially lost in that case. Therefore, the device configuration shown in FIGS. 7 and 8 was adopted.
  • the loading chamber 13 was provided on the side of the analysis chamber 23, but this was eliminated, and the standby chamber 31 was provided at the end of the processing chamber 23. The system was provided. With this method, the wafer after the analysis is returned to the processing chamber 23, and when backfilling the processing traces, the wafer that has been processed in the processing chamber 23 is transferred to the temporary standby chamber 31.
  • the wafer having been analyzed is moved from the analysis chamber 28 to the processing chamber 23, and is introduced into the mouthing chamber 13 via the gate valve 12 as it is.
  • the stage is moved below the evacuation chamber 31, the evacuation wafer is lowered, and introduced into the analysis chamber 28 via the gate valve 12.
  • the analyzed wafer is returned from the loading chamber 13 to the processing chamber 23 and backfilled.
  • the analysis of the introduced wafer is being performed in the analysis chamber 28 2.
  • the wafer once returned to the processing chamber 23 is further moved to the loading chamber 13, but in order to avoid this, a chamber similar to the retraction chamber 31 is also provided on the analysis chamber 28 side. It is sufficient to transfer the wafer between the evacuation chambers, but the analysis chamber 28 is a chamber that requires an ultra-high vacuum.
  • the CMA in the analysis chamber has strict restrictions on the distance from the sample (working distance), and the z-axis is usually adjusted by adjusting the stage height to the position where the secondary electron yield is highest.
  • it is possible to assist the Z-axis positioning mechanism by providing the Z-axis stage with a positioning mechanism based on the electric capacity and the scattering direction of light.
  • Fig. 9 shows FIB 10 and AES 11 housed in the same container without a separating wall such as a gate valve.
  • a separating wall such as a gate valve.
  • the enclosure and wafer of FIB 10 and AES 11 are shown. Only the positional relationship of 4 is shown. The advantage is that the time and complexity of moving between containers in the case of FIGS. 4 to 8 can be avoided.
  • Fig. 9 shows FIB 10 and AES 11 housed in the same container without a separating wall such as a gate valve.
  • FIB 10 and AES 11 are arranged at a fixed interval, and after the FIB 10 exposes a vertical cross section of the foreign matter, the movement amount is known when measuring AES 11 At a distance of, the position of the foreign matter is aligned on the optical axis of the AES 11 and the cross section of the foreign matter is obliquely inclined to AES 11 for observation and analysis. In this case, extra time is required for positioning, but there is ample room for the layout of FIB 10 and AES 11 and the design becomes easier.
  • the advantage is that atoms that are sparsely packed by 0 are less likely to contaminate the surroundings, including AES.
  • FIG. 10 is a view showing another embodiment.
  • the CMA type AES 11 and the tip of the FIB 10 are not in contact with each other. 1 and FIB 10 are both tilted from the surface of wafer 4. You. In this case, there is a difficulty in accurately focusing both on the foreign matter, but even when using the SEM function as shown in Fig. 11, the excavation surface 34 and the foreign matter 6 can be seen from just above the cross section. The observable point, as well as the foreign matter and the surrounding structure, are cut obliquely, so that they have the advantage of being enlarged in the depth direction and easy to see.
  • the tilt angle of FIB is preferably 30 ° or more and 90 ° or less, more preferably about 60 °, with respect to the vertical direction from the viewpoint of sputtering efficiency. Also, if the angle is 60 °, the cross section is doubled, which is advantageous in evaluating the film structure. This arrangement has a large time-saving effect in that there is no movement between the beam axes of the analyzer and only one alignment with the foreign matter is required.However, atoms sputtered by the FIB can damage the AES electrodes and the surface of the structure. It may contaminate, change properties and deteriorate.
  • FIG. 13 shows an arrangement in which FIB 10 and AES 11 form a right angle when viewed from above while maintaining the inclination of FIB 10 and AES 10.
  • Fig. 14 shows an arrangement between Fig. 10 and Fig. 13 where the FIB 10 optical axis is taken from a direction of 135 ° with respect to the AES 11 optical axis.
  • Fig. 15 summarizes such a method of positioning foreign objects when the rotary stage is mounted on the XYZ stage. That is, suppose that the coordinates of the center of rotation are (X 0, Y 0) with respect to the foreign object coordinates (X, y) defined on the XY stage. The angle formed by the mapping of the optical axes of FIB and AES onto the horizontal plane.
  • FIG. 16 conceptually shows the whole image of the apparatus in the case of FIG. 10.
  • the wafer is transferred from the wafer case 39 to the loading chamber 13 and the main chamber 37 by the wafer introduction mechanism 42. Automatically introduced.
  • FIB 10 when FIB 10 is provided in the vicinity of AES 11, there is a concern that irradiated ions of FIB or ions resputtered by the irradiated ions may contaminate the detector portion of AES and change its characteristics.
  • Fig. 17 shows an example in which a shutter 45 is provided at the end of the AES 11 to avoid such contamination of the AES 11, and the shutter 45 is connected to the AES 11 during excavation with the FIB.
  • Orange (4) Install it so as to cover the electron inlet, and in the case of AES, rotate the rotating port (44) to enable AES analysis.
  • FIG. 18 shows an example of such a device.
  • the main body of the FIB is supported by a column 47, and a bellows 48 is provided in the middle so that the shaft position can be changed, and the optical axis is adjusted at the position of the bolt 49.
  • the ion pump 46 is supported by another support column 47 so that the weight of the ion pump 46 is not burdened, and the ion pump 46 is connected to the FIB main body 10 by a bellows 49.
  • Fig. 19 shows a modified example of the mouth mechanism when FIB 11 and AES 11 become a body container. Open 1 and do it manually.
  • a wafer chuck mechanism can be provided for automation.
  • a wafer is introduced into the load lock chamber in the foreground, and is evacuated once while being baked with an infrared lamp or the like as necessary, and then introduced into the measurement chamber 37. After drilling, analyze with AES11.
  • the optical axis of the optical microscope 40 does not coincide with AES 11 and FIB 10, but is effective for confirming the positional relationship between the foreign object and the peripheral devices in advance.
  • Fig. 20 shows a conceptual diagram of the equipment when LIMS-TOF (Laser Induced Time-of-Flight Mass Spectrometer) is used instead of AES.
  • a pilot beam using a He-Ne laser beam or the like is applied to a specific position, and a laser beam for abrasion (for evaporating and ionizing foreign matter) is incident on the same position from the beam introduction window 60 and the objective lens 6 1 Focus on foreign matter on 3 2.
  • Part of the foreign matter is ionized, accelerated by the extraction electrode 52, and relocated by the orbit deflection electrode 54.
  • the mass-Z charge ratio of the region (proportional to the square of the time of flight) can be determined.
  • this method can obtain information on the structure of organic substances and isotopes, and is characterized by a large amount of information.
  • the degree of vacuum AES 11 requires a degree of vacuum of 10-8 Pa, whereas the order of 10-4 Pa is sufficient, so that maintenance is easy. is there.
  • the laser is a probe, there is no charge on the sample, which is advantageous when measuring insulators and organic substances.
  • foreign matter is a destructive inspection, it is not suitable for line analysis and repeated measurement such as EDX.
  • the following describes in detail the process of generating foreign substances based on the results of the analysis by the initial analysis equipment group and the above-mentioned database group, the equipment, and the method for quickly identifying the causative substance.
  • Database ( e ) is difficult to maintain directly as a database Peri, not easy to use. This is because not only does the capacity itself become enormous, but also because of the frequent changes associated with process improvements, an enormous amount of time is required for database maintenance.
  • the database (e) relating to the materials on the individual devices is constructed by registering each element, not each coordinate.
  • a specific construction method will be described with reference to an example of a computer screen shown in FIG. Fig. 21 shows the screen assuming software built with Visua 1 Basic, but the following functions can be realized in other software development environments as well.
  • the device base Y, product, and process ID are specified, then the deposition process AA is specified, and then the materials used in the process of forming the corresponding element are listed A. Select from C to F from ⁇ F, and enter and register the film thickness.
  • a device pattern image is displayed on the screen as shown in Fig. 22 in order to identify the elements that originally exist above and below the foreign matter, and the operator is informed of the foreign matter position and what elements are arranged in the vicinity thereof. Specify. The operator registers elements above and below the foreign object in the foreign object coordinates as A and B from the lists A to G. If the element can be specified, the material and thickness for each element are
  • Virtual material layered from below The process of generating foreign matter can be specified to some extent only by illustrating the typical film structure.
  • a film cannot be formed by the plasma process, and the resist is a thick film formation process with a thickness of several ⁇ m, but it does not remain on the product in principle. Therefore, it is preferable to give these processes a virtual thickness (for example, 100 nm) and display them on the screen.
  • a virtual thickness for example, 100 nm
  • the process is visualized on a screen, which is advantageous in identifying the cause process. is there. On the screen, both the strict evaluation result of the layer structure and such a virtual film structure diagram may be displayed.
  • the re-generation device can be specified by the history database (b) of the wafer, and the re-generation source can be specified by the database (d).
  • the support tool as shown in Fig. 24 will be used to determine the constituent elements and structure of the foreign matter, the materials used for the relevant equipment, and the results of the generated foreign matter. By comparison, it is possible to quickly identify the causative substance, the cause of occurrence, and the countermeasure of the foreign substance.
  • ADVANTAGE OF THE INVENTION it is possible to ultimately analyze a defect caused by a foreign substance in an electronic device such as a highly integrated semiconductor device in a short time. This makes it possible to maintain mass production of fasteners, and is extremely suitable for the manufacture of electronic devices.

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Length-Measuring Devices Using Wave Or Particle Radiation (AREA)

Abstract

In an electronic device production line, in order to analyze the elements of a foreign matter on a device and the cross sectional structure of the foreign matter and the periphery thereof in a short time, the material surface of the foreign matter is exposed, the elements contained in the exposed surface and the cross section around the foreign matter, the arrangement of the device elements and the thicknesses of films are analyzed, a causal apparatus which has generated the foreign matter is specified by comparing the results of analysis with the design and production information on the device, and a countermeasure is taken for the apparatus, thus producing an electronic device. Both an apparatus for exposing the cross section containing a foreign matter and an apparatus for analyzing the distributions of elements and compounds existing on a line in the plane of the foreign matter including the cross section containing the foreign matter are arranged on the production line as a foreign matter analyzer. The step, process or apparatus causing a defect due to a foreign matter in a large-scale integrated electronic device can be specified in an extremely short time, and the production line can be started in a short time while maintaining high yield mass production.

Description

明 細 書 電子デバイスの製造方法及びその異物分析装置 技術分野  Description: ELECTRONIC DEVICE MANUFACTURING METHOD AND PARTICLE ANALYZER
この発明は、 メモリ、 A S I Cなどの L S I、 磁気ディスク装置、 液 晶などの半導体デバイスの歩留リの早期立ち上げのために必要な生産ラ ィンにおける半導体デバイスの製造方法およびその異物分析装置に関す る。 背景技術  The present invention relates to a method for manufacturing a semiconductor device in a production line required for early start-up of the yield of semiconductor devices such as a memory, an ASIC or other LSI, a magnetic disk device, a liquid crystal, etc. About. Background art
半導体デバイスの歩留リは、 立ち上げ初期はリソグラフィ一工程での パターン相互の合わせずれに起因するいわゆるプロセス上の不良が多い。 一方、 プロセス上の不良が改善された後も半導体デバイスの歩留リは高 々 7 0 %であリ、 十分に高いものではなく、 この原因は半導体デバイス 生産工程における異物に起因するとされる。  In the early stages of startup of semiconductor devices, there are many so-called process defects due to misalignment of patterns in one lithography step. On the other hand, even after the process defects have been improved, the yield of semiconductor devices is at most 70%, which is not sufficiently high. This is attributed to foreign matter in the semiconductor device production process.
半導体デバイスの工程は、 装置単位で細かく分けると数百工程程度に なり、 製造中に発生する異物 6は、 第 2図に例を示すように、 通常はあ る工程で形成された膜 8の上に付着し、 直後の工程で形成される膜 7が 異物 6の上に形成される。 さらにその後の工程で形成される膜が積み上 げられるため、 異物は多数の膜のどこかに挟まった状態で存在すること が多い。 半導体デバイスの不良は、 通常は配線工程終了後など、 一通リ の機能を有する段階で、 品質検査にかけられる。 メモリデバイスでは、 不良ビッ トを検出する装置がこの目的で多く使用される。 しかしながら、 このような不良ビッ トに対応する異物が上部から確認されても、 異物の 上には発生以後のプロセスによる数多くの膜が形成されているため、 異 物の上面からの位置の確認、 外観像観察、 元素分析だけでは、 異物の発 生工程 ·装置の特定は不可能である。 The process of a semiconductor device can be divided into several hundred steps if it is subdivided in units of equipment, and foreign matter 6 generated during the manufacturing process is usually the same as that of a film 8 formed in a certain process, as shown in FIG. The film 7 that adheres to the upper surface and is formed in the next process is formed on the foreign material 6. Further, since the films formed in the subsequent steps are stacked, foreign substances are often present in a state of being sandwiched between several films. Defective semiconductor devices are usually subjected to quality inspection at the stage where they have a single function, such as after the completion of a wiring process. In memory devices, devices that detect bad bits are often used for this purpose. However, even if a foreign substance corresponding to such a defective bit is confirmed from the upper part, since a large number of films are formed on the foreign substance by processes subsequent to the generation, the abnormalities are different. It is not possible to identify the process of generating foreign substances and the equipment simply by confirming the position from the top of the object, observing the appearance, and elemental analysis.
一方、 個々の中間工程中でも適宜、 S E Mによる外観検査、 素子の測 長、 あるいは光学的手法による外観検査、 散乱光によって異物の位置、 概略の大きさを検出する異物検査装置などで検査が行われ、 検出された 異物についての情報がデ一タベースに保存される。 しかしながらこう し た中間工程での異物の発生を、 全ての細かい工程で確認することは所要 時間を考えると不可能に近いため、 上記の検査は必要以上に全体工程の 時間を長く しない範囲で間欠的に適用される。 ある範囲の工程で異物の 発生数が多かったリ、 致命性が高かったリ した場合、 対策が検討される。 本来の手順と しては、 考えられる全ての要因を抽出し、 それらの要因毎 に評価可能な試験条件が選定 ·実施され、 結果を見て最適なプロセス条 件と原因の絞リ込みが実施されるべきである。  On the other hand, during each individual intermediate process, appearance inspection using SEM, element measurement, or appearance inspection using an optical method, and inspection using a foreign object inspection device that detects the position and approximate size of foreign objects using scattered light are performed. Information about the detected foreign matter is stored in a database. However, it is almost impossible to confirm the generation of foreign matter in such an intermediate process in all the detailed processes, considering the required time.Therefore, the above inspection is intermittent as long as the overall process time is not unnecessarily extended. Is applied. If a large number of foreign substances are generated or fatal in a certain range of processes, countermeasures will be considered. As the original procedure, all possible factors are extracted, test conditions that can be evaluated for each of these factors are selected and implemented, and based on the results, the optimal process conditions and causes are narrowed down. It should be.
しかしながら、 実際には異物検査の合間には 1 0ステップ程度の工程 すなわち装置が介在してぉリ、 それぞれの装置毎に多様な運転条件があ ることを考えれば、 全ての可能な条件について試験を実施することは事 実上不可能である。 そこで、 実際には第 3図に示すように、 技術者の経 験に基づいて、 例えば超音波洗浄などの追加工程をある装置 Cの後で加 えてみて結果を見たリ、 装置 Aの運転条件を変えてみたリ という試験が 順次実施され、 良好な結果が得られた場合、 当面それが適用されるが、 原因を明確に把握した上での対策ではないため、 プロセス条件が多少と も変化した時に異物が大量に発生することを予測し、 事前に対応するこ とは不可能である。 場合によっては、 異物の分析をオフラインで実施し、 原因を突き止めた上で対策することもあるが、 数多くの異物を分析し、 その結果から原因を特定することは、 多くの場合極めて長期間を要する 作業になる。 いずれにしても、 異物が発生した工程範囲はある程度限定 できるが、 迅速に装置を特定し、 効果的な対策を施すことは極めて困難 である。 However, in practice, it takes about 10 steps between foreign particle inspections, that is, equipment is interposed, and considering that there are various operating conditions for each equipment, all possible conditions are tested. Is virtually impossible to implement. Therefore, as shown in Fig. 3, based on the technician's experience, we added an additional process such as ultrasonic cleaning after a certain device C, and saw the results. Tests in which the conditions were changed were successively performed, and if good results were obtained, they would be applied for the time being.However, because this was not a measure that took a clear grasp of the cause, the process conditions were somewhat It is impossible to anticipate the occurrence of a large amount of foreign matter when it changes, and to respond in advance. In some cases, foreign matter analysis is performed offline to determine the cause, and countermeasures are taken.However, analyzing a large number of foreign matters and identifying the cause based on the results often takes a very long time. This is a necessary task. In any case, the process range where foreign matter is generated is limited to some extent Yes, but it is extremely difficult to quickly identify equipment and take effective measures.
以上の検査には、 異物の成分分析は通常は行わない。 これは成分分析 に時間がかかるためと、 異物の多くは S i 02 , A 1 , W粒子など、 プ 口セスで用いる成膜材料が大部分で、 単に分析するだけでは、 第 2図に 示したように発生以後の異物上の成膜成分も現われるため、 異物の発生 工程、 装置、 原因物質の特定が困難で、 手間を掛けて分析しても、 分析 によって決定的な情報が得られる確率が低いためでもある。 各成膜ステ ップの終了後、 常に異物検査を実施すれば発生装置は特定できるが、 ス ル一ピッ トは極めて低くなる。 これを改善するには、 例えば、 異物上に 通常存在する発生以後の成膜を剥がして異物の最表面を露出させる操作 が必要であるが、 この操作にも時間がかかリ、 確実性に乏しい。 こう し た操作の手間を省くために、 デバイスの断面を露出させる手段として F I B (Focused Ion Beam 集束イオンビーム法) を用い、 掘削面を斜め から S EM (Scanning E 1 e c t r o nM i c r o s c 0 p e ) で観察する手段が、 特開 平 1一 1 8 1 5 2 9号公報に提案されている。 In the above inspections, component analysis of foreign substances is not usually performed. This is a because it takes time to component analysis, many foreign substances, such as S i 0 2, A 1, W particles, in the film forming material is largely used in the flop opening processes, merely analyzing, in Figure 2 As shown, film formation components on foreign matter appear after the occurrence, so it is difficult to identify the process, equipment, and causative substance of the foreign matter, and even if the analysis is troublesome, analysis can provide definitive information. It is also because the probability is low. If a foreign substance inspection is always performed after each deposition step, the generator can be identified, but the throughput is extremely low. To remedy this, for example, it is necessary to remove the film that normally exists on the foreign material after the occurrence and expose the outermost surface of the foreign material. This operation takes time and requires certainty. poor. To save time in the operation with this, as a means for exposing the device cross-section using a FIB (Focused Ion Beam focused ion beam method), in S EM drilling surface from an oblique (Scanning E 1 ectro nM icrosc 0 pe) A means for observing is proposed in Japanese Patent Application Laid-Open No. H11-189529.
この手法では、 S EMに EDX (Energy Dispersive X-ray analysis) が付随している場合は、 断面の元素分析も行えるが、 EDXは空間分解 能が悪く ( Ι μ πι程度) 、 サブミクロンデバイスで問題になる 0. 1 m径の異物や、 各プロセスで形成される 1 0〜 1 0 0 nm程度の厚さの 膜の断面分析は、 極めて困難である。 現状の分析機器では、 空間分解能 1 0 n m程度、 深さ情報は 1 0 A程度の最表面の分析を行える A E S (ォージェ電子分光分析) が目的に合致したものと考えられる。  In this method, if the SEM is accompanied by EDX (Energy Dispersive X-ray analysis), elemental analysis of the cross section can be performed. However, EDX has poor spatial resolution (about Ιμπι). It is extremely difficult to analyze the cross-section of a 0.1 m diameter foreign matter or a film with a thickness of about 100 to 100 nm formed in each process. With the current analytical instruments, AES (Auger electron spectroscopy), which can analyze the outermost surface with a spatial resolution of about 10 nm and depth information of about 10 A, is considered to have met the purpose.
一方、 上記の手法で仮に異物、 及び異物の上下の膜の元素 ·化合物が 分析できても、 異物発生装置の特定はできない。 発生装置を特定するた めには、 さらに成膜プロセスとの対応をと リ、 異物発生の前工程がどれ かを、 場合によってはその 2、 3工程前の膜の分析も実施して見極める 必要がある。 異物発生以前の膜元素構造が、 例えば F— G— Hの順で並 んでいたら、 その順になる工程をプロセスに関するデータベースから抽 出 ·決定する必要がある。 こう して、 異物発生工程が特定できたら、 次 にウェハの履歴をたどって、 該当する工程で使用した装置 (同じ工程で 複数の装置を使うことが多いので、 どの装置かを特定する必要がある。 ) を決定する。 以上のような解析も長時間作業になる。 On the other hand, even if the above method can analyze foreign matter and the elements and compounds of the films above and below the foreign matter, the foreign matter generator cannot be specified. In order to identify the generator, it is necessary to further cope with the film formation process, In some cases, it is necessary to determine by analyzing the film before the second and third steps. If the film element structures before the generation of foreign matter are arranged in the order of, for example, FGH, it is necessary to extract and determine the steps in that order from a database on processes. Once the foreign matter generation process has been identified in this way, the next step is to trace the history of the wafer and use the equipment used in the relevant process (it is often necessary to use multiple equipment in the same process, so it is necessary to identify which equipment There is. The above analysis also requires a long time.
本発明の目的は、 製造中の半導体デバイス上の異物の発生原因および 発生装置を 1 日以内に特定できる高歩留リの電子デバイスの製造方法及 びその異物分析装置を提供することにある。 発明の開示  SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a high-yield electronic device and a foreign-matter analyzing apparatus for the same, which can identify a cause and a generator of foreign matter on a semiconductor device during manufacture within one day. Disclosure of the invention
本発明では、 短時間で半導体デバイス上の異物の発生原因、 装置の特 定を可能にするために、 以下を基本構成要素とする。  In the present invention, the following are the basic components in order to be able to specify the cause of generation of foreign matter on a semiconductor device and the device in a short time.
( 1 ) 半導体生産ラインに初動分析装置 (分析ステーショ ン) を設置す る。  (1) Install an initial analyzer (analysis station) on the semiconductor production line.
( 2 ) 初動分析装置は、 デバイスの異物の断面を露出させる装置と、 異 物断面および異物に隣接する膜の構成元素や構造を特定する装置を 含む。  (2) The initial motion analyzer includes a device for exposing a cross section of a foreign substance of a device and a device for specifying a constituent element and a structure of a film adjacent to the foreign substance cross section and the foreign substance.
( 3 ) 異物の断面および異物を含む上下 ·周辺の構造、 材料情報と'設計、 デバイスの製造履歴から、 異物の発生工程 ·装置の迅速な特定を可 能にする支援ソフ トウェアとデータベースとを生産管理システムの 中に含む。 図面の簡単な説明  (3) Based on the cross-section of the foreign material, the upper and lower structures including the foreign material, the surrounding structure, material information and design, and the manufacturing history of the device, a process for generating the foreign material and supporting software and a database that enable rapid identification of equipment are provided. Included in the production management system. BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 本発明の全体的な概念を示す図でぁリ、 第 2図は、 半導体 デバイスの異物を含む断面の例を示す図であり、 第 3図は、 半導体デバ イスの異物分折手順の現状の一例を示す図でぁリ、 第 4図は、 半導体デ バイスの異物発生原因、 装置の短時間特定に必要な初動分析装置の構成 の一例を示す図でぁリ、 第 5図は、 本発明に関わる初動分析装置の 1実 施例の上面を示す図でぁリ、 第 6図は、 本発明に関わる初動分析装置の 1実施例の側面を示す図でぁリ、 第 7図は、 本発明に関わる初動分析装 置の 1実施例の側面を示す図であり、 第 8図は、 本発明に関わる初動分 析装置の実施例の全体外観を示す図でぁリ、 第 9図は、 本発明に関わる AE Sと F I Bの試料との位置関係の一つを示す図であリ、 第 1 0図は、 本発明に関わる AE Sと F I Bの試料との位置関係の一つを示す図であ リ、 第 1 1図は、 本発明に関わる AE Sと F I Bによって掘削された試. 料との位置関係の一つを示す図でぁリ、 第 1 2図は、 イオンの入射角と スパッタ効率の関係を示す図でぁリ、 第 1 3図は、 本発明に関わる AE Sと F I Bの位置関係の一つを示す図でぁリ、 第 1 4図は、 本発明に関 わる AE Sと F I Bの位置関係の一つを示す図であリ、 第 1 5図は、 ス テージを回転させた場合に異物を F I Bと AE Sの焦点に戻す手法を説 明する図であリ、 第 1 6図は、 AE Sと F I Bを一体化した装置におけ る各部品の位置関係を上面および側面から示した図でぁリ、 第 1 7図は、 F I Bによる AE Sの汚染を防ぐためのシャツタの配置を示す図であリ、 第 1 8図は、 F I Bと AE Sを単一容器で用いる場合の正確な軸あわせ を補佐する機器の支持構造を示す図であリ、 第 1 9図は、 F I Bと AE Sを単一容器で用いる場合のウェハの搬出入を簡略にするための真空容 器概要を示す図でぁリ、 第 2 0図は、 本発明に関わる初動分析装置の実 施例を示す図であって、 元素 ·構造分析のために L I MS—TOFを用 いた場合の一例を示す図でぁリ、 第 2 1図は、 異物座標での成膜構造を 登録するためのコンピュータ画面の例を示す図でぁリ、 第 2 2図は、 異 物座標での成膜構造を解析するための支援となるコンピュータ画面の例 を示す図でぁリ、 第 2 3図は、 異物座標での成膜構造を解析するための 支援となるコンピュータ画面の例を示す図でぁリ、 第 2 4図は、 異物発 生工程 · 装置を特定の支援に用いるコンピュータ画面の一例を示す図で ある。 発明を実施するための最良の形態 FIG. 1 is a diagram showing the general concept of the present invention, and FIG. FIG. 3 is a diagram showing an example of a cross section of a device including foreign matter. FIG. 3 is a diagram showing an example of a current state of a foreign matter separating procedure of a semiconductor device. FIG. 4 is a diagram showing a cause of foreign matter generation in a semiconductor device. FIG. 5 is a diagram showing an example of a configuration of an initial analyzer required for short-time identification of the device. FIG. 5 is a diagram showing a top view of one embodiment of an initial analyzer according to the present invention. FIG. 6 is a diagram showing a side view of one embodiment of the initial analysis apparatus according to the present invention. FIG. 7 is a view showing a side view of one embodiment of the initial analysis apparatus according to the present invention. FIG. 8 is a diagram showing the overall appearance of an embodiment of the initial motion analyzer according to the present invention, and FIG. 9 is a diagram showing one of the positional relationships between the AES and the FIB sample according to the present invention. FIG. 10 is a diagram showing one of the positional relationships between the AES and the FIB sample according to the present invention, and FIG. 11 is a diagram related to the present invention. Fig. 1 shows one of the positional relationships between the samples excavated by AES and FIB. Fig. 12 shows the relationship between the incident angle of ions and the sputter efficiency. Fig. 13 The figure is a diagram showing one of the positional relationships between AES and FIB according to the present invention, and FIG. 14 is a diagram showing one of the positional relationships between AES and FIB according to the present invention. Fig. 15 shows the method of returning foreign matter to the focus of FIB and AES when the stage is rotated.Fig. 16 shows the integration of AES and FIB. FIG. 17 is a diagram showing the positional relationship of each part in the apparatus from the top and the side. FIG. 17 is a diagram showing the arrangement of shirts for preventing AES contamination by FIB. The figure shows the support structure of the equipment that assists accurate alignment when FIB and AES are used in a single container.Fig. 19 shows the case where FIB and AES are used in a single container. Wafer FIG. 20 is a diagram showing an outline of a vacuum container for simplifying loading and unloading, and FIG. 20 is a diagram showing an embodiment of the initial motion analyzer according to the present invention. Fig. 21 shows an example when LI MS-TOF is used. Fig. 21 shows an example of a computer screen for registering a film formation structure in the coordinates of foreign particles. Fig. 22 Is different Fig. 23 shows an example of a computer screen that assists in analyzing a film formation structure in object coordinates. Fig. 23 shows a computer screen that assists in analyzing a film formation structure in foreign object coordinates. FIG. 24 shows an example of a computer screen that uses the foreign matter generation process / apparatus for specific support. BEST MODE FOR CARRYING OUT THE INVENTION
本発明では、 半導体デバイスと して簡単のためにウェハを想定する。 ウェハ以外の磁気ディスク、 丁 F T (Thin Fi lm Trans istor) でも本発 明を同様に適用できる。  In the present invention, a wafer is assumed as a semiconductor device for simplicity. The present invention can be similarly applied to magnetic disks other than wafers and thin film transistors (FT).
本発明では第 1図に示すように、 以下を骨子とするシステム構成とす る。  In the present invention, as shown in FIG. 1, the system configuration is as follows.
( 1) ウェハの搬送の時間を節約するためと、 ウェハの搬送中に無用に 異物を付着させないために、 生産ラインに隣接した位置での初動分 析ステーショ ン 1の配置。  (1) The first-movement analysis station 1 is located adjacent to the production line to save time during wafer transfer and to prevent foreign substances from adhering unnecessarily during wafer transfer.
( 2 ) 初動分析装置においては、 異物を含むデバイス断面の構造、 元素 分布を測定できる。  (2) The initial motion analyzer can measure the structure and element distribution of the device cross section including foreign matter.
( 3 ) デバイスの任意座標において成膜構造を解析または解析を支援す るソフ トウェアをシステムに含む。  (3) The system includes software that analyzes or supports analysis of the film formation structure at arbitrary coordinates of the device.
以上のシステム構成を骨子にした半導体デバイス生産システムにおい ては、 試作ラインにおいても本システムが適用可能でぁリ、 異物起因の 不良の早期撲滅が可能である。 第 1図の例では、 デバイスの初期工程 5 からスタート し、 数百に及ぶ細かい工程の途中何回かに、 光学的な異物 検査装置 2に連動した分析ステーション 1による工程を設定しておリ、 異物検査装置 2によリ異物の大きさと座標、 クラスター情報 (異物相互 の配置の特徴) などを事前に入手した上で分析を行う。 この情報は、 異 物の位置出しのために必要なのは当然であるが、 分析するべき異物を選 定するための情報源となる。 In a semiconductor device production system based on the above system configuration, this system can be applied to a prototyping line as well, and it is possible to eliminate defects caused by foreign matter and foreign substances at an early stage. In the example shown in Fig. 1, starting from the initial process 5 of the device, the process is set by the analysis station 1 linked to the optical particle inspection device 2 several times during several hundreds of detailed processes. The foreign substance inspection device 2 obtains in advance the size and coordinates of the foreign substance, cluster information (characteristics of the arrangement of the foreign substances), and the like, and then performs analysis. This information is Of course, it is necessary to locate the object, but it is a source of information for selecting foreign substances to be analyzed.
第 1図の例では先ず、 S EMまたは F I Bに付属する S I M (Scanni ng Ion Microscope) で異物を確認し、 外観像をデータベース 3に格納 するとともに、 評価 '対策スタッフに直ちにフィー ドバック、 原因を究 明し、 発生した装置 4に対策を施す。 異物外観に関するデータを蓄積す れば、 外観だけで異物の原因 · 工程 ·装置が判明することも期待できる。 次に異物の断面が露出するように F I Bで掘削し、 断面像を取得する。 同様に、 異物と周辺の膜構造だけで異物の原因 · 工程 ·装置が判明する 場合もある。 外観像と異物検査装置 2の情報から、 F I Bで掘削する異 物を選択することも可能である。 断面像だけで異物の発生工程、 装置、 原因物質が特定できないときは、 異物の元素分析あるいは隣接する膜の 元素分析あるいは双方を行い、 成膜プロセスや装置情報に関するデータ ベースを援用することによリ、 異物の発生工程、 装置、 原因物質を特定 する。 分析を効率的に行うため及び場合によっては分析ウェハを生産ラ ィンに戻すために、 ゥヱハは分割せずに丸ごと試料ステージに载せるこ とが望ましい。 DRAMの場合、 ウェハの大きさは現在直径 2 0 c m〜 3 0 c mであリ、 試料ステージは直径 3 0 c m以上の大きさが望ましい。 この大きさがあれば、 磁気ディスクは直径 1 0 c m以下であるのでその まま分析できる。 液晶ディスプレイは、 現在対角線の長さが 1 2、 1 3 ィンチであるので試料ステージは約 3 0〜 3 5 c mあれば対応できる。 今後予想される一層の大型化には、 それに対応してステージの大型化も 必要である。  In the example shown in Fig. 1, first of all, foreign substances are checked using the SIM (Scanning Ion Microscope) attached to the SEM or FIB. And take action on the generated device 4. By accumulating data on the appearance of foreign matter, it can be expected that the cause, process, and equipment of the foreign matter can be identified only by the appearance. Next, excavation is performed with FIB so that the cross section of the foreign material is exposed, and a cross section image is obtained. Similarly, in some cases, the cause, process, and equipment of the foreign matter can be determined only by the foreign matter and the surrounding film structure. It is also possible to select a foreign object to be excavated by the FIB from the appearance image and the information of the foreign object inspection device 2. If the cross-sectional image alone cannot identify the process, equipment, and causative substance of the foreign substance, perform elemental analysis of the foreign substance and / or elemental analysis of the adjacent film, and refer to the database on the film formation process and equipment information. Identify the process, equipment, and causative substance of the foreign matter. In order to carry out the analysis efficiently and, in some cases, to return the analysis wafer to the production line, it is desirable that the wafer can be put on the entire sample stage without being divided. In the case of DRAM, the wafer size is currently 20 cm to 30 cm in diameter, and the sample stage is desirably 30 cm in diameter or more. With this size, the magnetic disk is less than 10 cm in diameter and can be analyzed as is. Currently, liquid crystal displays have a diagonal length of 12 or 13 inches, so a sample stage of about 30 to 35 cm can be used. As the size is expected to increase further in the future, the size of the stage must be correspondingly increased.
第 2図の半導体デバイスの断面構造図によリ、 本発明の異物の分析手 順を説明する。 S EMで断面を確認しながら、 F I Bによリ、 異物断面 6および周辺の膜構造を露出させる。 前述したように、 空間分解能に関 する制約のため、 元素分析装置と しては AE Sを用いる。 AE Sによリ 異物 6 と上下の膜 7、 8を含む線 9上の元素分析を行い、 異物 6の構成 元素、 異物上下の膜 7、 8の成分を測定する。 このように、 異物 6の上 下の膜 7、 8の材料、 厚さなどが判明するので、 使用材料、 成膜厚さを 記録した製品の製造工程との対応付けにょリ、 異物の発生工程が分かる。 ウェハの履歴の記録から該当する工程で使用した装置が特定でき、 装置 の運転条件なども分かる。 AE Sの線分析は時間がかかるため、 異物 6 と上下の膜 7 , 8の断面内一点ずつ、 3箇所の点分析で目的を達成でき る場合もある。 The procedure for analyzing foreign matter according to the present invention will be described with reference to the cross-sectional structural view of the semiconductor device shown in FIG. While confirming the cross section with SEM, the foreign material cross section 6 and the surrounding film structure are exposed by FIB. As mentioned earlier, the spatial resolution AES is used as the elemental analyzer because of the limitations. The elemental analysis on the line 9 including the foreign matter 6 and the upper and lower films 7 and 8 is performed by AES, and the constituent elements of the foreign matter 6 and the components of the upper and lower films 7 and 8 are measured. In this way, the material, thickness, etc. of the films 7 and 8 above and below the foreign matter 6 are known. I understand. The equipment used in the relevant process can be specified from the history record of the wafer, and the operating conditions of the equipment can be found. Since the AES line analysis takes time, three points analysis of the foreign material 6 and one point in the cross section of the upper and lower films 7 and 8 may achieve the purpose in some cases.
以下、 本発明の詳細をハードウェアの面から説明する。 本発明での分 析装置の一実施例を第 4図に示す。 実施例では F I B 1 0と AE S 1 1 を別容器と しておリ、 ゲ一トバルブ 1 2によリ両者を隔離できるように なっている。 ウェハはまずロード機構 1 3にセッ トされ、 あらかじめ真 空引きしたのち、 ゲートバルブ 1 2を開け、 F I B 1 0用の加工チャン バ 2 3に導入され、 ステージ駆動機構にょリ位置出しの後、 S EM 1 4 または F I B 1 0に付属する S I M機能を用い、 外観観察する。 ステー ジ駆動機構は、 本発明では特に断わらない限リ、 XY Z 3軸駆動を前提 とする。 F I Bによる加工点に電子ビームが集束するように、 F I B鏡 筒 1 0と S EM鏡筒 1 4の位置関係を予め合わせてある。 このため、 F I Bでの断面加工中に一定の頻度で S EM観察にょリ、 加工の進行をモ ニタして、 加工の終点を精度良く定めることができる。 ロード機構 1 3 には赤外線ヒータ 1 9が設置され、 必要な場合にはウェハがベーキング できる。 その後ウェハは A E S 1 1 との間のゲートバルブ 1 2を開け、 AE S 1 1用の分析チャンバ 2 8に導入し、 位置出しの後、 必要な場合 にはイオンガン 1 7で切リ出した断面の吸着原子を除去し、 AE S 1 1 に付属する S EM機能を用いて断面観察、 元素分析を行う。 この場合 F I B 1 0で垂直に穴を開けているため、 A E Sは断面を見込むように真 空容器 2 8に斜めに取リ付ける。 図の例では A E Sと して電子銃 2 1 と 検出器に S C Aの組み合わせを用いる形式をとつた。 測定終了後、 アン ロード室 2 0から引き出され、 次工程へ移るかロッ トアウ トする。 第 4 図の例の場合、 分析器が別容器になっているので、 特に高い真空度が要 求される A E Sについては、 真空度の保持などメンテナンス性は良いが、 ステージ上の位置合わせが 2回必要になる。 但し、 F I Bで掘削した比 較的大きな穴を分析チャンバで検出するのは容易であリ、 本質的なマイ ナスとはならない。 Hereinafter, details of the present invention will be described in terms of hardware. One embodiment of the analyzer according to the present invention is shown in FIG. In the embodiment, the FIB 10 and the AES 11 are separated from each other, and the two can be isolated by the gate valve 12. The wafer is first set in the load mechanism 13, vacuum-evacuated in advance, the gate valve 12 is opened, the wafer is introduced into the processing chamber 23 for the FIB 10, and after being positioned in the stage drive mechanism, Observe the appearance using the SIM function provided with SEM14 or FIB10. In the present invention, the stage drive mechanism is premised on XY Z three-axis drive unless otherwise specified. The positional relationship between the FIB column 10 and the SEM column 14 is adjusted in advance so that the electron beam is focused on the processing point by the FIB. For this reason, it is possible to monitor the progress of the processing at a certain frequency during the processing of the cross section in the FIB and monitor the progress of the processing to determine the processing end point with high accuracy. An infrared heater 19 is installed in the loading mechanism 13 so that the wafer can be baked if necessary. After that, the wafer was opened with the gate valve 12 between it and the AES 11, introduced into the analysis chamber 28 for the AES 11, and positioned, and then, if necessary, cut out with the ion gun 17. Adsorbed atoms are removed, and cross-section observation and elemental analysis are performed using the SEM function attached to AE S11. In this case F Since the hole is drilled vertically in IB10, AES is attached to the vacuum container 28 diagonally so that the cross section can be seen. In the example shown in the figure, the AES is a form that uses a combination of the SCA for the electron gun 21 and the detector. After the measurement is completed, it is pulled out of unload chamber 20 and moved to the next process or locked out. In the case of the example in Fig. 4, since the analyzer is a separate container, AES, which requires a particularly high degree of vacuum, has good maintainability, such as maintaining the degree of vacuum, but requires only two positions on the stage. Times needed. However, it is easy to detect relatively large holes drilled by the FIB in the analysis chamber, and this is not an essential minus.
F I B鏡筒 1 0と A E S鏡筒 1 1 とを別チャンバに設置した別な実施 例を、 第 5図と第 6図に示す。 この場合、 ローデイングチャンバ 1 3力 ら導入された分析すべきウェハは、 ゲ一トバルブ 1 2を介して加工チヤ ンバ 2 3に導入され、 F I B 1 0によリ通常複数箇所の所定の位置に断 面加工が施される。 また、 F I B加工中はイオン電荷の蓄積による加工 位置の移動を避けるため、 電子シャワー 2 5から電子をイオンビーム照 射領域を含む領域に照射する。 この時はイオンビーム照射によって発生 する 2次イオンを検出して、 加工対象の表面凹凸像を得るが、 S E M鏡 筒 1 4からの電子ビームで S E M画像を得る場合には、 2次電子を検出 する必要がぁリ、 2次粒子検出器 2 4は 2次イオン、 2次電子両者を検 出できる、 例えば、 チャンネルトロンやマイクロチャンネルプレート、 あるいは、 マイク口チャンネルプレートにシンチレータと光電子増倍管 を組み合わせた検出器の構成をとることになる。 断面加工が終了したゥ ェハは、 次にゲ一トバルブ 1 2を介して分析チャンバ 2 8に移動する。 A E S鏡筒 1 1 と して使用する C M Aタイプの検出器内には、 電子ビー ム集束 · 走査機能が装備されておリ、 この機能と電子ビーム照射によつ て発生する 2次電子を 2次電子検出器 2 7で検出することで、 分析対象 の S E M像が得られ、 これを用いてステージで所定位置へ移動した後の 分析位置へのビーム位置決めを実施する。 そこで、 分析チャンバ 2 8に は希ガスイオンガン 2 6が装備されておリ、 分析対象の表面を覆った自 然酸化膜などを除去する。 次に A E S 1 1によリ分析対象に電子ビーム を照射して分析を行う。 この操作を定められた複数箇所について繰リ返 し、 分析データ取得が終了する。 後はウェハをゲートバルブ 1 2を介し て、 ローデイングチャンバ 2 0に取リ出す。 以上が本実施の形態の装置 での加工 ·分析工程である。 Another embodiment in which the FIB column 10 and the AES column 11 are installed in different chambers is shown in FIGS. 5 and 6. In this case, the wafer to be analyzed introduced from the loading chamber 13 is introduced into the processing chamber 23 via the gate valve 12 and is usually placed at a plurality of predetermined positions by the FIB 10. Cross-section processing is performed. During FIB processing, electrons are irradiated from the electron shower 25 to the region including the ion beam irradiation region in order to avoid movement of the processing position due to accumulation of ion charges. At this time, secondary ions generated by ion beam irradiation are detected to obtain a surface unevenness image of the processing object, but when an SEM image is obtained with the electron beam from the SEM column 14, secondary electrons are detected. The secondary particle detector 24 can detect both secondary ions and secondary electrons.For example, a scintillator and a photomultiplier tube are installed in a channeltron, microchannel plate, or microphone channel plate. The structure of the detector combined is taken. The wafer for which the cross-section processing has been completed moves to the analysis chamber 28 via the gate valve 12 next. The CMA-type detector used as the AES lens tube 1 is equipped with electron beam focusing and scanning functions. Analyze target by detecting with secondary electron detector 27 The SEM image is obtained, and it is used to perform beam positioning to the analysis position after moving to the predetermined position on the stage. Therefore, the analysis chamber 28 is equipped with a rare gas ion gun 26 to remove a natural oxide film or the like covering the surface to be analyzed. Next, the object to be analyzed is irradiated with an electron beam by AES 11 and analyzed. This operation is repeated for a plurality of specified locations, and the analysis data acquisition ends. After that, the wafer is taken out to the loading chamber 20 via the gate valve 12. The above is the processing / analysis process in the apparatus of the present embodiment.
本実施の形態での利点の一つは、 分析チャンバ 2 8の A E S分析には 超高真空が必須であるが、 加工チャンバ 2 3には超高真空は必要ないた め、 チャンバを分離したことで加工チャンバ 2 3側の真空に対する負担 を軽減したことである。 これによリ、 加工チャンバ 2 3內には駆動部を 入れることへの制限が減少する。 また、 分析チャンバ 2 8で分析中に、 加工チャンバ 2 3で加工を進めることができる。 さらに、 加工チャンバ 2 3内で真空排気しているため、 分析チャンバ 2 8へウェハを導入する までに、 加工に要する時間だけ排気されておリ、 加工終了後、 即座に分 析チャンバ 2 8にゥヱハを導入可能で、 通常超高真空に必要とされてい るサンプルからの脱ガスが減少するまでの予備排気時間を実質設ける必 要がない。 これらにょリ加工 ·分析工程の全所要時間を短縮できる。 本 実施の形態で分析チャンバ 2 8側にもローディングチャンバ 2 0を設け たのは、 分析チャンバ 2 8での分析が終了した時点で、 加工チャンバ 2 3には加工中あるいは加工終了した次のウェハを載置したホルダが入つ ているため、 加工チャンバ 2 3側へウェハを取リ出すことができないた めである。 ただし、 加工 ·分析が終了したウェハをラインに戻すことを 考えた場合、 加工跡を埋め戻す必要が生じることがある。 この時には次 のゥヱハを加工チヤンバ 2 3に入れておかず、 分析チヤンバ 2 8から加 ェチヤンバ 2 3に戻す必要があるが、 この場合については次の実施の形 態で改良した装置構成を示す。 なお、 本実施の形態での別の利点は加工 チャンバ 2 3に超高真空を必要と しないため、 ガス供給装置 2 2からノ ズルを介して加工チャンバ 2 3へのエッチングガスゃデポジションガス の導入が可能となることもぁリ、 これによリ加工速度の向上と、 埋め戻 しの実施が実現できる。 One of the advantages of this embodiment is that the AES analysis in the analysis chamber 28 requires an ultra-high vacuum, but the processing chamber 23 does not require an ultra-high vacuum. This reduces the load on the processing chamber 23 to vacuum. This reduces the restrictions on having a drive in the processing chamber 23 內. Further, processing can be advanced in the processing chamber 23 while the analysis is being performed in the analysis chamber 28. Furthermore, since the chamber is evacuated to a vacuum inside the processing chamber 23, it is evacuated for the time required for processing before the wafer is introduced into the analysis chamber 28.ゥ ヱ C can be introduced, and there is no need to provide a preliminary evacuation time until degassing from the sample, which is usually required in ultra-high vacuum, is reduced. The total time required for these rework and analysis processes can be reduced. In the present embodiment, the loading chamber 20 is also provided on the analysis chamber 28 side at the time when the analysis in the analysis chamber 28 is completed. This is because the wafer cannot be taken out to the processing chamber 23 side because the holder on which the wafer is placed is inserted. However, when returning the processed wafer to the line after processing and analysis, it may be necessary to refill the processing traces. At this time, the next item is not put in the processing chamber 23, but is added from the analysis chamber 28. It is necessary to return to ethiamba 23. In this case, an improved device configuration is shown in the following embodiment. Another advantage of the present embodiment is that since an ultra-high vacuum is not required for the processing chamber 23, the etching gas and the deposition gas are supplied from the gas supply device 22 to the processing chamber 23 via the nozzle. In addition, it is possible to increase the processing speed and implement backfilling.
上記実施の形態では、 加工跡を埋め戻すには加工チャンバ 2 3に次の ウェハを導入しておく ことはできず、 別チャンバにした利点が、 その場 合一部失われる問題があった。 そこで、 第 7図と第 8図に示す装置構成 とした。 ここでは第 5図、 第 6図に示した実施例では分析チャンバ 2 3 側にローデイングチャンバ 1 3があったが、 それを無く し、 替わリに加 ェチャンバ 2 3端に待機チャンバ 3 1を設ける方式とした。 この方式で あれば、 分析が終了したゥヱハを加工チャンバ 2 3に戻し、 加工跡の埋 め戻しを実施する際には、 加工チャンバ 2 3内で加工の終了したウェハ を一時待機チャンバ 3 1に引き上げておき、 分析チャンバ 2 8から分析 が終了したウェハを加工チャンバ 2 3へ移動させ、 そのまま、 ゲートバ ルブ 1 2を介して口一ディングチャンバ 1 3へ導入しておく。 次にステ —ジを待避チャンバ 3 1下に移動させ、 待避していたウェハを降ろし、 ゲートバルブ 1 2を介して分析チャンバ 2 8へ導入する。 その上で、 口 —ディングチャンバ 1 3から分析済みのゥヱハを加工チャンバ 2 3に戻 し、 埋め戻しを実施する。 その間、 分析チャンバ 2 8內では導入したゥ ェハの分析が実施されていることになる。 ここで、 一度加工チャンバ 2 3に戻したウェハをさらにローデイングチャンバ 1 3まで移動させてい るが、 これを避けるためには待避チャンバ 3 1 と同様のチャンバを分析 チャンバ 2 8側にも設け、 待避チャンバ間でウェハの受け渡しを行えば よいが、 分析チャンバ 2 8は超高真空を必要とするチャンバであリ、 極 力機構部を装備させることを回避することを考え、 今回は移動の手間は かかるが超高真空の維持に優先度を与えて、 本方式を採用することをし た。 なお、 本方式では一時的に待機に解放されるローデイングチャンバ を分析チャンバ 2 8側に設置せず、 分析チャンバ 2 8は常に真空に引か れたま.まの加工チャンバ 2 3にしか開放されない構成としたため、 上記 実施の形態に比べ、 分析チャンバ 2 8の超高真空が容易である。 In the above embodiment, the next wafer cannot be introduced into the processing chamber 23 in order to backfill the processing trace, and the advantage of using another chamber is partially lost in that case. Therefore, the device configuration shown in FIGS. 7 and 8 was adopted. Here, in the embodiment shown in FIGS. 5 and 6, the loading chamber 13 was provided on the side of the analysis chamber 23, but this was eliminated, and the standby chamber 31 was provided at the end of the processing chamber 23. The system was provided. With this method, the wafer after the analysis is returned to the processing chamber 23, and when backfilling the processing traces, the wafer that has been processed in the processing chamber 23 is transferred to the temporary standby chamber 31. The wafer having been analyzed is moved from the analysis chamber 28 to the processing chamber 23, and is introduced into the mouthing chamber 13 via the gate valve 12 as it is. Next, the stage is moved below the evacuation chamber 31, the evacuation wafer is lowered, and introduced into the analysis chamber 28 via the gate valve 12. Then, the analyzed wafer is returned from the loading chamber 13 to the processing chamber 23 and backfilled. During that time, the analysis of the introduced wafer is being performed in the analysis chamber 28 2. Here, the wafer once returned to the processing chamber 23 is further moved to the loading chamber 13, but in order to avoid this, a chamber similar to the retraction chamber 31 is also provided on the analysis chamber 28 side. It is sufficient to transfer the wafer between the evacuation chambers, but the analysis chamber 28 is a chamber that requires an ultra-high vacuum. Considering avoiding the provision of a force mechanism, this time it took time and effort to move, but the priority was given to maintaining an ultra-high vacuum, and this method was adopted. In this method, the loading chamber that is temporarily released to standby is not installed on the analysis chamber 28 side, and the analysis chamber 28 is always evacuated and is opened only to the processing chamber 23. Therefore, the ultrahigh vacuum of the analysis chamber 28 is easier than in the above embodiment.
尚、 分析チャンバ内の CMAは、 試料との距離 (ワーキングディスタ ンス) に関する制約が厳しく、 z軸の位置合わせは通常は 2次電子の収 率の最も高い位置にステージ高さを合わせる方法が取られるが、 Z軸ス テ一ジに、 電気容量や光の散乱方向による位置合わせ機構を設けること によリ、 Z軸の位置合わせ機構を補佐することもできる。  The CMA in the analysis chamber has strict restrictions on the distance from the sample (working distance), and the z-axis is usually adjusted by adjusting the stage height to the position where the secondary electron yield is highest. However, it is possible to assist the Z-axis positioning mechanism by providing the Z-axis stage with a positioning mechanism based on the electric capacity and the scattering direction of light.
第 9図は、 F I B 1 0と AE S 1 1をゲートバルブのような隔離壁を 持たない同一容器に納めたものであって、 簡単のため F I B 1 0と AE S 1 1の匡体とウェハ 4の位置関係だけを示してある。 第 4図〜第 8図 の場合の容器間を移動する際の時間や機構の複雑さを回避できる点にメ リ ッ 卜がある。 第 9図の例では、 F I B 1 0と AE S 1 1を一定の間隔 離して配置し、 F I B 1 0で異物の垂直方向の断面を露出させた後、 A E S 1 1の測定時には移動量を既知の間隔に設定して A E S 1 1の光軸 上に異物の位置を合わせ、 異物断面を斜めに傾けた AE S 1 1によリ観 察、 分析する。 この場合位置出しのために余分な時間がかかることにな るが、 F I B 1 0と AE S 1 1の配置に空間的な余裕があリ、 設計が容 易になるという点と後述する F I B 1 0によってスパックされた原子が AE Sを含め、 周辺を汚染しにくい点にメ リ ッ トがある。  Fig. 9 shows FIB 10 and AES 11 housed in the same container without a separating wall such as a gate valve. For simplicity, the enclosure and wafer of FIB 10 and AES 11 are shown. Only the positional relationship of 4 is shown. The advantage is that the time and complexity of moving between containers in the case of FIGS. 4 to 8 can be avoided. In the example of Fig. 9, FIB 10 and AES 11 are arranged at a fixed interval, and after the FIB 10 exposes a vertical cross section of the foreign matter, the movement amount is known when measuring AES 11 At a distance of, the position of the foreign matter is aligned on the optical axis of the AES 11 and the cross section of the foreign matter is obliquely inclined to AES 11 for observation and analysis. In this case, extra time is required for positioning, but there is ample room for the layout of FIB 10 and AES 11 and the design becomes easier. The advantage is that atoms that are sparsely packed by 0 are less likely to contaminate the surroundings, including AES.
第 1 0図は別な実施例を示す図であって、 同一異物に同時に焦点を合 わせるため、 CMAタイプの AE S 1 1 と F I B 1 0の先端部が接触し ないよう、 AE S 1 1 , F I B 1 0ともにウェハ 4の面からは傾けてあ る。 この場合、 異物に両者の焦点を精度良く合わす点に難点があるが、 第 1 1図に示すように S EM機能を用いる場合も含めて、 掘削面 3 4、 異物 6の断面のほぼ直上から観察できる点、 また異物および周辺の構造 も斜めに切削するため深さ方向に拡大されて見やすくなるメ リ ッ トがぁ る。 これは F I B 1 1のイオンの光軸と AE Sの入射電子の光軸 3 3の 光軸がほぼ 9 0° をなすように配置することによリ実現できる。 実際に は F I Bの掘削面はイオンの光軸よリは鈍るので、 9 0° ょリ 5° 程度 狭く したほう が、 実際の面は A E Sに対し正対するようになる。 FIG. 10 is a view showing another embodiment. In order to focus on the same foreign matter at the same time, make sure that the CMA type AES 11 and the tip of the FIB 10 are not in contact with each other. 1 and FIB 10 are both tilted from the surface of wafer 4. You. In this case, there is a difficulty in accurately focusing both on the foreign matter, but even when using the SEM function as shown in Fig. 11, the excavation surface 34 and the foreign matter 6 can be seen from just above the cross section. The observable point, as well as the foreign matter and the surrounding structure, are cut obliquely, so that they have the advantage of being enlarged in the depth direction and easy to see. This can be realized by arranging the optical axis of the FIB 11 and the optical axis 33 of the incident electron of the AES so that the optical axis is approximately 90 °. Actually, the excavation surface of the FIB is duller than the optical axis of the ions, so making it 90 ° or 5 ° narrower makes the actual surface directly opposite AES.
F I Bの傾け角は、 第 1 2図に示すように、 スパッタ効率の面からは 垂直上方に対し 3 0° 以上 9 0° 以下で、 特に 6 0° 程度傾けることが 望ましい。 また、 6 0° にすれば断面は 2倍に拡大されるため膜構造の. 評価の上で有利となる。 この配置では、 分析装置のビーム軸間の移動が なく、 異物への位置合わせも一回で済む点で時間節約効果も大きいが、 F I Bによってスパッタされた原子が AE Sの電極や構造体表面を汚染 し、 特性の変化、 劣化を招く可能性がある。  As shown in FIG. 12, the tilt angle of FIB is preferably 30 ° or more and 90 ° or less, more preferably about 60 °, with respect to the vertical direction from the viewpoint of sputtering efficiency. Also, if the angle is 60 °, the cross section is doubled, which is advantageous in evaluating the film structure. This arrangement has a large time-saving effect in that there is no movement between the beam axes of the analyzer and only one alignment with the foreign matter is required.However, atoms sputtered by the FIB can damage the AES electrodes and the surface of the structure. It may contaminate, change properties and deteriorate.
第 1 3図は、 F I B 1 0、 AE S 1 0の傾きをそのままにして上方か ら見た時に F I B 1 0と AE S 1 1が直角を為すように配置したもので ある。 この配置にすると、 位置合わせの容易さ、 スパッタ効率の高さの メ リ ッ トの他、 垂直断面 3 5の像が得られる点が、 コンタク トホールの 断面をとつてその内部の分析などをする場合に有利になる。  FIG. 13 shows an arrangement in which FIB 10 and AES 11 form a right angle when viewed from above while maintaining the inclination of FIB 10 and AES 10. With this arrangement, in addition to the advantages of easy alignment and high sputter efficiency, the point at which an image of the vertical cross section 35 can be obtained is analyzed through the cross section of the contact hole. It will be advantageous in the case.
第 1 4図は、 第 1 0図と第 1 3図の中間の配置で、 例えば A E S 1 1 の光軸に対し 1 3 5° の方向から F I B 1 0の光軸を取った場合で、 掘 削面には正対できないが、 両面 3 4、 3 5を一回で分析できる点にメ リ ッ トがある。 AE S 1 1の場合、 超高真空を必要とするため、 複雑な駆 動機構を真空容器内に設けることは極力避けたいが、 ステージに Z軸周 リの回転機構を設ければ、 第 1 3図の配置でも垂直断面 3 5、 斜め断面 3 4の両方を分析することが可能である。 Fig. 14 shows an arrangement between Fig. 10 and Fig. 13 where the FIB 10 optical axis is taken from a direction of 135 ° with respect to the AES 11 optical axis. Although it is not possible to confront the cut surface, there is an advantage in that both sides 34 and 35 can be analyzed at once. In the case of AES 11, an ultra-high vacuum is required, so it is desirable to avoid installing a complicated driving mechanism inside the vacuum vessel as much as possible. However, if a rotating mechanism around the Z axis is provided on the stage, Vertical section 35, oblique section It is possible to analyze both 3 and 4.
ステージに回転機構を付加すれば、 F I Bと AE Sの光軸の水平面へ の写像がなす角度に関係なく、 斜め加工面、 垂直加工面の双方を観察で きる。 ある異物を観察しているときに改めて回転して見直す場合は、 簡 単な座標変換をして分析点への異物の位置合わせを自動的に行う。 第 1 5図に X Y Zステージの上に回転ステージが乗っている場合についてこ のよ うな異物の位置合わせの手法をまとめた。 すなわち、 XYステージ の上で定義された異物座標 (X , y ) に対し、 回転中心の座標が (X 0, Y 0 ) にあるとする。 F I Bと AE Sの光軸の水平面への写像がなす角 をひとする。 このとき回転ステージを反時計まわリに πΖ2— α回転さ せれば、 AE Sから正面の方向に掘削穴の垂直側面が観察できる。 但し、 この状態では異物は、 F I B, AE Sの焦点から遠く離れた位置に移動 しているので、 以下の距離だけ X、 Y方向にステージを移動させれば、 異物は焦点に戻ってくる。  By adding a rotation mechanism to the stage, it is possible to observe both oblique and vertical machining surfaces, regardless of the angle between the optical axis of the FIB and AES mapped to the horizontal plane. If you rotate a new object and observe it again while observing a certain foreign object, simple coordinate conversion is performed and the foreign object is automatically aligned with the analysis point. Fig. 15 summarizes such a method of positioning foreign objects when the rotary stage is mounted on the XYZ stage. That is, suppose that the coordinates of the center of rotation are (X 0, Y 0) with respect to the foreign object coordinates (X, y) defined on the XY stage. The angle formed by the mapping of the optical axes of FIB and AES onto the horizontal plane. At this time, if the rotary stage is rotated πΖ2-α counterclockwise, the vertical side surface of the borehole can be observed from the AES in the front direction. However, in this state, the foreign matter has moved far away from the focal point of the FIB and AES. Therefore, if the stage is moved in the X and Y directions by the following distance, the foreign matter returns to the focal point.
X方向 : X — X。— d cos ( α + y )  X direction: X — X. — D cos (α + y)
Υ方向 : y— Υ。― dsin(a + 7 )  Υ direction: y—Υ. ― Dsin (a + 7)
ここで、 d = ( (x-Xo) 2+ (y-Yo) 2) 1/2 Where d = ((x-Xo) 2 + (y-Yo) 2 ) 1/2
Figure imgf000016_0001
Figure imgf000016_0001
第 1 6図は、 第 1 0図の場合の装置の全体像を概念的に示したもので、 ゥヱハはウェハケース 3 9からウェハ導入機構 4 2によりローディング チャンバ 1 3、 メインチャンバ 3 7へと自動的に導入される。  FIG. 16 conceptually shows the whole image of the apparatus in the case of FIG. 10. The wafer is transferred from the wafer case 39 to the loading chamber 13 and the main chamber 37 by the wafer introduction mechanism 42. Automatically introduced.
前述したように、 AE S 1 1の近傍に F I B 1 0を設けた場合、 F I Bの照射イオンまたは照射イオンによリスパッタされたイオンが AE S の検出器部分を汚染し、 特性を変化させる懸念がある。 第 1 7図は、 こ のような AE S 1 1の汚染を避けるために、 AE S 1 1の先端にシャッ タ 4 5を設けた例で、 F I Bで掘削中はシャッタ 4 5を AE Sのォ一ジ ェ電子取リ入れ口を庇うように設置し、 A E S分忻する場合は回転口ッ ド 4 4を回転させて A E S分析を可能とする。 As described above, when FIB 10 is provided in the vicinity of AES 11, there is a concern that irradiated ions of FIB or ions resputtered by the irradiated ions may contaminate the detector portion of AES and change its characteristics. is there. Fig. 17 shows an example in which a shutter 45 is provided at the end of the AES 11 to avoid such contamination of the AES 11, and the shutter 45 is connected to the AES 11 during excavation with the FIB. Orange (4) Install it so as to cover the electron inlet, and in the case of AES, rotate the rotating port (44) to enable AES analysis.
F I B鏡筒、 A E S鏡筒ともに重量物であリ、 通常はイオンポンプを 装着しているため、 両者の光軸を合わせるためには操作性について工夫 が必要である。 第 1 8図は、 こうような工夫の一例を示したもので。 F I Bの本体は支柱 4 7で支え、 軸位置が可変になるように中間にベロー ズ 4 8を設け、 ボルト 4 9の位置で光軸を調整する。 この時、 イオンポ ンプ 4 6の重量が負担にならないように、 イオンポンプ 4 6は別な支柱 4 7によって支え、 F I B本体 1 0との間をべローズ 4 9によつて連結 する。  Both the FIB and AES barrels are heavy, and usually have ion pumps, so operability must be devised to match the optical axes of both. Figure 18 shows an example of such a device. The main body of the FIB is supported by a column 47, and a bellows 48 is provided in the middle so that the shaft position can be changed, and the optical axis is adjusted at the position of the bolt 49. At this time, the ion pump 46 is supported by another support column 47 so that the weight of the ion pump 46 is not burdened, and the ion pump 46 is connected to the FIB main body 10 by a bellows 49.
第 1 9図は、 F I B 1 1 と A E S 1 1がー体容器になった場合の口一 ド機構の変形例を示したもので、 ロード機構を 2系統設け、 ウェハの出 し入れは扉 5 1を開けて手動で行う。 ウェハチャック機構を設け自動化 することもできる。 同図においては、 例えば手前のロードロック室にゥ ェハを導入し、 必要に応じて赤外ランプ等でベーキングしながら、 一旦 真空引きした上で測定チャンバ 3 7に導入し、 F I B 1 0による掘削後、 A E S 1 1で分析する。 光学顕微鏡 4 0は光軸は A E S 1 1 , F I B 1 0と一致していないが、 事前に異物の周辺デバィスとの位置関係を確認 するために有効である。  Fig. 19 shows a modified example of the mouth mechanism when FIB 11 and AES 11 become a body container. Open 1 and do it manually. A wafer chuck mechanism can be provided for automation. In the same figure, for example, a wafer is introduced into the load lock chamber in the foreground, and is evacuated once while being baked with an infrared lamp or the like as necessary, and then introduced into the measurement chamber 37. After drilling, analyze with AES11. The optical axis of the optical microscope 40 does not coincide with AES 11 and FIB 10, but is effective for confirming the positional relationship between the foreign object and the peripheral devices in advance.
第 2 0図は、 A E Sの代わりに L I M S— T O F (レーザ誘起飛行時 間型質量分析計) を用いた場合の装置概念図を示したもので、 F I B 1 0で断面を掘削した後、 断面の特定の位置に H e - N e レーザ光などを 用いたパイロッ トビームをあて、 同じ位置にアブレーシヨ ン (異物を蒸 発 · イオン化する) 用のレーザビームをビーム導入窓 6 0から入射し、 対物レンズ 6 1によリウヱハ 3 2上の異物に集光する。 異物の一部はィ オン化し、 引き出し電極 5 2により加速され、 軌道偏向電極 5 4によリ 軌道を偏向後、 飛行管 5 8に入射、 飛行時間を測定することによリイォ ンの質量 Z電荷比 (飛行時間の 2乗に比例) が分かる。 AE S 1 1を用 いた場合に比べ、 この手法では有機物の構造や、 同位体に関する情報も 得られ、 情報量が多くなることが特徴である。 また真空度に関する点も AE S 1 1が 1 0— 8 P aの真空度を要求するのに対し、 1 0— 4 P a オーダで十分であるので、 メィンテナンスが容易というメ リ ッ トもある。 また、 レーザがプローブであるため、 試料の帯電がなく、 絶縁物、 有機 物の測定時には有利である。 一方、 異物に関しては破壊検査であるため、 E D X . AE Sのような線分析や繰リ返し測定には不向きである。 Fig. 20 shows a conceptual diagram of the equipment when LIMS-TOF (Laser Induced Time-of-Flight Mass Spectrometer) is used instead of AES. A pilot beam using a He-Ne laser beam or the like is applied to a specific position, and a laser beam for abrasion (for evaporating and ionizing foreign matter) is incident on the same position from the beam introduction window 60 and the objective lens 6 1 Focus on foreign matter on 3 2. Part of the foreign matter is ionized, accelerated by the extraction electrode 52, and relocated by the orbit deflection electrode 54. After deflecting the orbit, it enters the flight tube 58, and by measuring the time of flight, the mass-Z charge ratio of the region (proportional to the square of the time of flight) can be determined. Compared to the case where AES 11 is used, this method can obtain information on the structure of organic substances and isotopes, and is characterized by a large amount of information. Regarding the degree of vacuum, AES 11 requires a degree of vacuum of 10-8 Pa, whereas the order of 10-4 Pa is sufficient, so that maintenance is easy. is there. Also, since the laser is a probe, there is no charge on the sample, which is advantageous when measuring insulators and organic substances. On the other hand, since foreign matter is a destructive inspection, it is not suitable for line analysis and repeated measurement such as EDX.
以上のような装置構成にょリ、 異物の構成元素、 構造、 異物近傍の成 膜構造に関するデータが得られる。 異物発生装置を特定するための基本 的な考え方は、 前述した通リであるが、 データがあっても特別な工夫を しなければ、 発生装置の特定には数日単位以上の時間がかかる。 これは、 特定のために以下のデータベースが必要で、 それぞれから必要な情報を 抽出するために、 各々 1 日単位の時間がかかるためである。 .  With the above device configuration, data on the constituent elements and structure of foreign matter and the film structure near the foreign matter can be obtained. The basic concept for identifying a foreign matter generator is the same as described above, but even if there is data, it takes several days or more to identify the generator unless special measures are taken. This is because the following databases are required for identification, and it takes one day each to extract the necessary information from each. .
(a ) 異物座標およびその近傍の成膜条件 (材料、 厚さ)  (a) Foreign material coordinates and film formation conditions in the vicinity (material, thickness)
(b ) ウェハの履歴 (適用工程、 装置 (号機含む) 、 プロセス条件) (b) Wafer history (applied process, equipment (including unit), process conditions)
( c ) 製品毎の工程 (使用材料、 膜厚) (c) Process for each product (material used, film thickness)
(d) 装置仕様 · 特性 (構成材料、 発生異物実績)  (d) Equipment specifications and properties (constituent materials, actual generated foreign substances)
データベース ( a ) については、 以下のデータベースが必要になる。For database (a), the following databases are required.
( e ) デバイスの 3次元パターン情報 (成膜の大きさ、 線幅、 材料、 厚 さなど) (e) 3D pattern information of device (size of film, line width, material, thickness, etc.)
以下初動分析装置群による分析結果および上記のデータベース群に基 づく異物の発生工程 ·装置、 原因物質の迅速な特定法について詳細に説 明する。  The following describes in detail the process of generating foreign substances based on the results of the analysis by the initial analysis equipment group and the above-mentioned database group, the equipment, and the method for quickly identifying the causative substance.
データベース ( e ) は直接データベースとして保持することは困難で ぁリ、 使い勝手も良くない。 これは容量そのものが膨大なものになると ともに、 プロセスの改良に伴い、 頻繁に変化するためデータべ一スのメ イ ンテナンスに膨大な時間が要求されるからである。 本発明では、 個別 のデバイス上の材料に関するデータベース (e ) を、 座標毎ではなく素 子単位に登録することによって構築する。 具体的な構築方法を、 第 2 1 図のコンピュータ画面の例によつて説明する。 第 2 1図では V i s u a 1 B a s i cで組まれたソフ トウェアを想定した画面になっているが、 その他のソフ トウェア開発環境でも以下の機能は同様に実現できる。 第 2 1図の例では、 デバイスの拠点 Y、 製品、 工程 I Dを指定した上で成 膜プロセスの工程 A Aを指定、 その上で該当する素子を形成する工程で の使用材料をリ ス ト A〜Fの中から C、 Fのように選定し、 膜厚を入力、 登録する。 Database ( e ) is difficult to maintain directly as a database Peri, not easy to use. This is because not only does the capacity itself become enormous, but also because of the frequent changes associated with process improvements, an enormous amount of time is required for database maintenance. In the present invention, the database (e) relating to the materials on the individual devices is constructed by registering each element, not each coordinate. A specific construction method will be described with reference to an example of a computer screen shown in FIG. Fig. 21 shows the screen assuming software built with Visua 1 Basic, but the following functions can be realized in other software development environments as well. In the example of Fig. 21, the device base Y, product, and process ID are specified, then the deposition process AA is specified, and then the materials used in the process of forming the corresponding element are listed A. Select from C to F from ~ F, and enter and register the film thickness.
次に、 異物の上下に本来存在する素子を特定するため、 第 2 2図のよ うな画面にデバイスパターン画像を表示し、 異物位置およびその近傍に どのような素子が配置されているか操作者に明示する。 異物座標におけ る、 異物の上下の素子を操作者がリス ト A〜Gの中から A, Bのように 登録する。 素子が特定できれば、 素子毎の材料、 厚さはデータベース Next, a device pattern image is displayed on the screen as shown in Fig. 22 in order to identify the elements that originally exist above and below the foreign matter, and the operator is informed of the foreign matter position and what elements are arranged in the vicinity thereof. Specify. The operator registers elements above and below the foreign object in the foreign object coordinates as A and B from the lists A to G. If the element can be specified, the material and thickness for each element are
( e ) に登録されているので、 異物のない場合の異物位置における材料、 厚さ情報はわかる。 一方、 断面 S E M像、 A E Sまたは E D Xによリ異 物を含む上下の膜材料、 厚さ分析結果は得られているので、 例えば第 2 3図のように今得られた設計上の膜構造、 分析によって得られた断面 S E M像、 元素分布情報 (図の例では A E Sを用いた異物を含む線 9上の 線分析結果) を同じ画面で対比できるようにすれば、 異物の発生工程を 特定できる。 素子毎に厳密に膜構造を再構成しなくても、 エッチバック 等で実際には異物位置に無い害の材料や、 プラズマ中に含まれるガス成 分やレジス トなども含めてプロセスで使用する材料を下から重ねた仮想 的な膜構造を図示するだけでも、 異物の発生工程をある程度特定はでき る。 プラズマプロセスでは膜はできず、 レジス トは数 μ mにも及ぶ厚い 成膜プロセスであるが、 製品上には原則として残らない。 したがって、 これらのプロセスには仮想的な厚み (例えば 1 0 0 n m ) を与えて画面 に表示することが好ましい。 このような方法では、 プラズマガスとの反 応生成物やレジス トとの反応生成物が生成したときに、 画面上にそのプ 口セスが視覚化されているため、 原因プロセスの特定に有利である。 画 面には厳密な層構造の評価結果とこのような仮想的な膜構造図の両方を 表示しても良い。 このような異物の発生工程を特定できれば、 該当ゥェ ハの履歴データベース ( b ) によリ発生装置を特定でき、 データベース ( d ) によリ発生原因部位が特定できる。 Since it is registered in (e), information on the material and thickness at the position of the foreign matter when there is no foreign matter can be known. On the other hand, cross-sectional SEM images, upper and lower film materials including foreign substances, and thickness analysis results obtained by AES or EDX have been obtained. If the cross-sectional SEM image and element distribution information obtained in the analysis (in the example in the figure, the line analysis results on line 9 containing foreign matter using AES) can be compared on the same screen, the process of foreign matter generation can be identified. . Even if the film structure is not strictly reconfigured for each element, it is used in the process, including harmful materials that are not actually located at the position of foreign matter due to etchback, gas components contained in the plasma, or resists. Virtual material layered from below The process of generating foreign matter can be specified to some extent only by illustrating the typical film structure. A film cannot be formed by the plasma process, and the resist is a thick film formation process with a thickness of several μm, but it does not remain on the product in principle. Therefore, it is preferable to give these processes a virtual thickness (for example, 100 nm) and display them on the screen. In such a method, when a reaction product with the plasma gas or a reaction product with the resist is generated, the process is visualized on a screen, which is advantageous in identifying the cause process. is there. On the screen, both the strict evaluation result of the layer structure and such a virtual film structure diagram may be displayed. If the generation process of such a foreign substance can be specified, the re-generation device can be specified by the history database (b) of the wafer, and the re-generation source can be specified by the database (d).
さらに、 異物の組成、 構造、 発生工程、 装置が明らかになれば、 第 2 4図に示すような支援ツールにょリ、 異物の構成元素、 構造、 該当装置 の使用材料、 発生異物の実績等を対比することによリ、 異物の原因物質、 発生原因、 対策の迅速な特定が可能になる。 産業上の利用可能性  Furthermore, if the composition, structure, generation process, and equipment of the foreign matter are clarified, the support tool as shown in Fig. 24 will be used to determine the constituent elements and structure of the foreign matter, the materials used for the relevant equipment, and the results of the generated foreign matter. By comparison, it is possible to quickly identify the causative substance, the cause of occurrence, and the countermeasure of the foreign substance. Industrial applicability
本発明によれば、 高集積度半導体デバイス等の電子デバイスの異物起 因の不良を、 究めて短時間で解析することが可能になるため、 生産ライ ンの短期立ち上げ、 従来にない高歩留リの量産の維持が可能になリ、 電 子デバイスの製造に極めて適している。  ADVANTAGE OF THE INVENTION According to the present invention, it is possible to ultimately analyze a defect caused by a foreign substance in an electronic device such as a highly integrated semiconductor device in a short time. This makes it possible to maintain mass production of fasteners, and is extremely suitable for the manufacture of electronic devices.

Claims

請 求 の 範 囲 The scope of the claims
1 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に含 まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設計 · 製作情報と比較することによリ異物の発生装置を特定し、 当該装置に 対策を施して電子デバイスを製造することを特徴とする電子デバィス の製造方法。 1. Exposing the material surface of the foreign matter, analyzing the elemental composition and the element arrangement and film thickness of the exposed surface and the cross section around the foreign matter, and comparing them with the device design and manufacturing information. A method for manufacturing an electronic device, comprising: specifying an apparatus for generating foreign matter; and taking measures against the apparatus to manufacture an electronic device.
2 . 請求の範囲第 1項記載の電子デバイスの製造方法において、 上記分 析は、 上記異物を中心と した直径 1オングス トローム以上、 2 0 μ πι 以下の近傍領域の異物、 成膜の構造、 材料のいずれかを分析すること を特徴とする電子デバイスの製造方法。  2. The method for manufacturing an electronic device according to claim 1, wherein the analysis includes: a foreign substance having a diameter of 1 angstrom or more and 20 μππι or less centered on the foreign substance; A method for manufacturing an electronic device, comprising analyzing one of materials.
3 . 請求の範囲第 1項記載の電子デバイスの製造方法において、 上記異 物の素材表面が、 異物の断面であることを特徵とする電子デバイスの 製造方法。  3. The method for manufacturing an electronic device according to claim 1, wherein the material surface of the foreign substance is a cross section of a foreign substance.
4 . 請求の範囲第 1項記載の電子デバイスの製造方法において、 上記分 析は、 上記異物の面内を通過する線上の元素 ·化号物の分布を分析す ることを特徴とする電子デバイスの製造方法。 4. The method for manufacturing an electronic device according to claim 1, wherein the analyzing comprises analyzing a distribution of elements and compounds on a line passing through a plane of the foreign matter. Manufacturing method.
5 . 請求の範囲第 1項記載の電子デバイスの製造方法において、 上記分 析は、 上記異物の断面、 異物直上及び直下の膜断面の 3箇所を含む位 置の元素 · 化号物の分布を分析することを特徴とする電子デバイスの 製造方法。  5. The method for manufacturing an electronic device according to claim 1, wherein the analysis includes determining a distribution of an element or a compound at a position including a cross section of the foreign substance, and a film cross section immediately above and immediately below the foreign substance. A method for manufacturing an electronic device, characterized by analyzing.
6 . 異物を含む断面を露出させる装置と、 異物を含む断面において異物 面内を通過する線上の元素 ·化合物の分布を分析する装置の双方を生 産ラインに含むことを特徴とする電子デバイスの製造装置。  6. An electronic device characterized in that both a device for exposing a cross section containing foreign matter and a device for analyzing the distribution of elements and compounds on a line passing through the surface of the foreign material in the cross section containing foreign matter are included in the production line. manufacturing device.
7 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に含 まれる元素分析、 素子の配置 '成膜の厚さを分析し、 デバイスの設計 · 製作情報と比較することによリ異物の発生装置を特定し、 当該装置に 対策を施して電子デバイスを製造する電子デバイスの製造方法に使用 される製造装置であって、 上記異物の外観像を取得する装置と、 上記 異物の断面像を取得する装置と、 異物および少なく とも異物に隣接す る成膜の化学分析をする装置の 3種類の分析装置を、 同一容器内に有 する分析ステーショ ンが配備されていることを特徴とする電子デバィ スの製造装置。 7. Exposing the material surface of the foreign matter, analyzing the elements included in the exposed surface and the cross section around the foreign matter, arranging the elements, analyzing the film thickness, and designing the device. A manufacturing apparatus used in an electronic device manufacturing method for manufacturing an electronic device by identifying a foreign matter generating apparatus by comparing the manufacturing information with the manufacturing information and taking measures against the foreign matter generating apparatus. An analysis station that has three types of analyzers in the same container: a device that acquires the cross-sectional image of the foreign material, and a device that performs chemical analysis of the foreign material and at least the film formation adjacent to the foreign material. An electronic device manufacturing apparatus characterized in that a device is provided.
8 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に含 まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設計 · 製作情報と比較することによリ異物の発生装置を特定し、 当該装置に 対策を施して電子デバイスを製造する電子デバイスの製造方法に使用 される製造装置であって、 上記異物を含む断面を露出させる装置と、 異物を含む断面において異物面内を通過する線上の元素 ·化合物の分 布を分析する装置の双方を含み、 該装置が大気雰囲気から隔離した隔 壁内で同一の真空条件下に配備されていることを特徴とする電子デバ イスの製造装置。  8. Exposing the material surface of the foreign material, analyzing the element contained in the exposed surface and the cross section around the foreign material, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. A manufacturing apparatus used for an electronic device manufacturing method for manufacturing an electronic device by specifying an apparatus for generating foreign matter and taking measures against the apparatus, wherein the apparatus exposes a cross section including the foreign matter, and includes a foreign matter. It includes both a device for analyzing the distribution of elements and compounds on a line passing through the surface of a foreign substance in a cross section, and the device is provided under the same vacuum condition in a partition wall separated from the atmosphere. Electronic device manufacturing equipment.
9 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に含 まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設計 - 製作情報と比較することにょリ異物の発生装置を特定し、 当該装置に 対策を施して電子デバイスを製造する電子デバイスの製造方法に使用 される製造装置であって、 集束イオンビーム装置と、 上記異物を含む 断面において異物面内を通過する線上の元素 ·化学結合の分布を分析 する装置の双方を含み、 該装置が大気雰囲気から隔離した同一の真空 条件下に配備されていることを特徴とする電子デバイスの製造装置。 1 0 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 · 製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に对策を施して電子デバイスを製造する電子デバイスの製造方法に 使用される製造装置であって、 集束イオンビーム装置と、 ォ一ジェ電 子分光分析装置の双方を含み、 該装置が大気雰囲気から隔離した同一 の真空条件下に配備されていることを特徴とする電子デバイスの製造 9. Exposing the material surface of the foreign matter, analyzing the elements included in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing with the device design-manufacturing information. A manufacturing apparatus used in an electronic device manufacturing method for manufacturing an electronic device by specifying an apparatus for generating a foreign substance and taking a countermeasure for the apparatus, wherein the focused ion beam apparatus and a section including the foreign substance are included in the surface of the foreign substance. An apparatus for manufacturing an electronic device, comprising: an apparatus for analyzing the distribution of elements and chemical bonds on a line passing through a device; and wherein the apparatus is provided under the same vacuum condition that is isolated from the atmosphere. 10. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and setting the device. A manufacturing apparatus used in a method of manufacturing an electronic device, wherein a device for generating a foreign substance is specified by comparing with the manufacturing information, and a measure is taken for the device to manufacture an electronic device. Manufacturing an electronic device, including both an apparatus and an Auger electron spectrometer, wherein the apparatus is deployed under the same vacuum conditions isolated from the atmosphere.
1 1 . F I B鏡筒、 S E M鏡筒、 2次粒子検出器、 電子シャワー、 試料 ステージ及び真空排気系を載置または接続した加工用チャンバと、 A E S鏡筒、 希ガスイオンガン、 2次電子検出器、 試料ステージ及び真 空排気系を載置または接続した分析用チャンバとが、 ゲー トバルブを 介して接続されていることを特徴とする電子デバイスの異物分析装置1 1. FIB column, SEM column, secondary particle detector, electron shower, sample stage and processing chamber on which the vacuum exhaust system is mounted or connected, AES column, rare gas ion gun, secondary electron detector A foreign matter analyzer for an electronic device, wherein a sample stage and an analysis chamber on which a vacuum exhaust system is mounted or connected are connected via a gate valve.
1 2 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において, 上記 F I Bのイオンの軌道軸を、 分析試料の垂直上方に対し 3 0 ° 以 上 9 0 ° 以下傾けたことを特徴とする電子デバイスの異物分析装置。 1 3 . 請求の範囲第 1 2項記載の電子デバイスの異物分析装置において, 上記 F I Bのイオンの焦点距離を可変とすることを特徴とする電子デ バイスの異物分析装置。 12. The foreign matter analyzer for an electronic device according to claim 11, wherein the FIB ion orbit axis is tilted by 30 ° or more and 90 ° or less with respect to a vertical upper part of the analysis sample. Foreign matter analyzer for electronic devices. 13. A foreign substance analyzer for an electronic device according to claim 12, wherein the focal length of the FIB ions is variable.
1 4 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において, 上記 F I Bのイオン軌道軸を試料面に対し垂直上方とし、 F I Bによ る掘削面を見込む方向に S E M電子銃および 2次電子検出器、 ォージ ェ電子分光分析器を配置したことを特徴とする電子デバイスの異物分 析装置。 14. In the foreign matter analyzer for an electronic device according to claim 11, the ion trajectory axis of the FIB is set vertically above the sample surface, and the SEM electron gun and the 2 A foreign substance analyzer for an electronic device, comprising a secondary electron detector and an ordinal electron spectrometer.
1 5 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において. 試料ステージに Z軸の位置センサを設けたことを特徴とするォージェ 電子分光分析装置。  15. The foreign object analyzer for an electronic device according to claim 11, wherein a Z-axis position sensor is provided on the sample stage.
1 6 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において. 上記分析チャンバに試料を導入 ·搬出するためのポートに試料の加熱 装置が備えられ、 試料の分析チャンバ導入前に試料面を加熱 ·清浄化 することを特徴とする電子デバイスの異物分析装置。 16. The foreign matter analyzer for an electronic device according to claim 11. A foreign matter analyzer for an electronic device, comprising: a sample heating device provided at a port for introducing and unloading a sample into and from the analysis chamber, wherein the sample surface is heated and cleaned before the sample is introduced into the analysis chamber.
7 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において, 上記加工用チヤンバにゲ一トバルブを介して接続したローディングチ ヤンバを有することを特徴とする電子デバイスの異物分析装置。  7. The foreign matter analyzer for an electronic device according to claim 11, further comprising a loading chamber connected to the processing chamber via a gate valve.
8 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記加工用チャンバと分析用チャンバそれぞれにゲートバルブを介し て接続したローディングチャンバを有することを特徴とする電子デバ イスの異物分析装置。  8. The foreign matter analyzer for an electronic device according to claim 11, further comprising a loading chamber connected to each of the processing chamber and the analysis chamber via a gate valve. Analysis equipment.
9 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記加工チャンバの真空度が 1 E— 4 P a以上、 分析チャンバの真空 度が 1 E— 6 P a以上であリ、 該加工用チャンバと分析用チャンバそ れぞれにゲートバルブを介して接続したローディングチャンバを有す ることを特徴とする電子デバイスの異物分析装置。  9. The foreign matter analyzer for an electronic device according to claim 11, wherein the degree of vacuum in the processing chamber is 1 E—4 Pa or more, and the degree of vacuum in the analysis chamber is 1 E—6 Pa or more. A foreign substance analyzer for an electronic device, comprising: a loading chamber connected to each of the processing chamber and the analysis chamber via a gate valve.
0 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記加工用チャンバと該分析用チャンバそれぞれにゲートバルブを介 して接続したローディングチャンバを有するとともに、 上記加工チヤ ンバにガス導入機構を装備したことを特徴とする電子デバイスの異物 分析装置。0. The foreign matter analyzer for an electronic device according to claim 11, further comprising a processing chamber, a loading chamber connected to each of the analysis chambers via a gate valve, and a gas being supplied to the processing chamber. A foreign substance analyzer for an electronic device, which is provided with an introduction mechanism.
1 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記加工用チャンバにゲ一トバルブを介して接続した口一ディングチ ヤンバとともに、 加工 ·分析対象を載置したホルダをステージから待 避 ·復帰する機構を装備することを特徴とする電子デバイスの異物分 析装置。  1. The foreign matter analyzer for an electronic device according to claim 11, wherein the holder on which the object to be processed and analyzed is placed is moved from the stage together with the opening chamber connected to the processing chamber via a gate valve. A foreign substance analyzer for an electronic device, which is provided with a retract / return mechanism.
2 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記加工用チャンバにゲ一トバルブを介して接続した口一ディングチ ヤンバとともに、 加ェ · 分析対象を載置したホルダをステージから上 方に待避し、 また同位置に復帰する機構を装備することを特徴とする 電子デバイスの異物分析装置。 2. In the foreign matter analyzer for an electronic device according to claim 11, Along with an opening chamber connected to the above processing chamber via a gate valve, a mechanism shall be provided to evacuate the holder holding the object to be analyzed from the stage upward and return to the same position. Features Foreign substance analyzer for electronic devices.
2 3 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記加工用チャンバにゲートバルブを介して接続したローディングチ ヤンバと、 加工 ' 分析対象を載置したホルダをステージから待避 .復 帰する機構を装備するとともに、 上記加工チャンバにガス導入機構を 装備することを特徴とする電子デバイスの異物分析装置。 23. The foreign matter analyzer for an electronic device according to claim 11, wherein the loading chamber connected to the processing chamber via a gate valve and the holder on which the processing target is placed are evacuated from the stage. . A foreign substance analyzer for an electronic device, comprising: a return mechanism; and a gas introduction mechanism in the processing chamber.
2 4 . 請求の範囲第 1 1項記載の電子デバイスの異物分析装置において、 上記分析チャンバに試料を導入 ·搬出するためのポートに真空から大 気圧に戻す場合のガス導入配管が 2本以上接続されていることを特徴 とする電子デバイスの異物分析装置。 24. In the foreign matter analyzer for an electronic device according to claim 11, two or more gas introduction pipes for returning from vacuum to atmospheric pressure are connected to a port for introducing / unloading the sample into / from the analysis chamber. A foreign substance analyzer for an electronic device, comprising:
2 5 . 電子銃あるいはイオン源に真空ポンプが直接接続しているビーム 源について、 真空ポンプをビーム源の鏡筒とは別個の支持構造で支え、 ビーム源の鏡筒と真空ポンプの給気口とを可塑性を有する部材で接続 したことを特徴とする電子デバイスの異物分析装置。 25. For a beam source whose vacuum pump is directly connected to the electron gun or ion source, the vacuum pump is supported by a support structure separate from the beam source column, and the beam source column and the air supply port of the vacuum pump are supported. And a foreign matter analyzing device for an electronic device, wherein the foreign matter analyzing device is connected with a plastic member.
2 6 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 · 製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバィスを製造する電子デバイスの製造方法に 使用される電子デバイスの異物分析装置であって、 集束イオンビーム 装置とォージェ電子分光分析装置の双方を含み、 該装置が大気雰囲気 から隔離した同一の真空条件下に配備され、 異物を含む断面を露出さ せる装置が集束イオンビーム装置、 その断面分析に用いる装置がォ一 ジェ電子分光分析装置であリ、 イオンビームと電子ビームの光軸がデ バイス表面において距離 1 A以上 2 0 μ m以下に近接していることを 特徴とする電子デバイスの異物分析装置。 26. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. A foreign particle analyzer for an electronic device used in a method of manufacturing an electronic device for manufacturing an electronic device by specifying a device for generating a foreign particle and taking measures against the device, comprising a focused ion beam device and Auger electron spectroscopy. Including both analyzers, the equipment is provided under the same vacuum condition that is isolated from the atmosphere, a device that exposes a cross section containing foreign matter is a focused ion beam device, and a device that is used for the cross-sectional analysis is an OJE. The optical axis of the ion beam and electron beam is A foreign substance analyzer for an electronic device, wherein the foreign substance analyzer is close to a distance of 1 A or more and 20 μm or less on a vice surface.
7 . 請求の範囲第 2 6項記載の電子デバイスの異物分析装置において、 上記ォージヱ電子分光分析装置と集束イオンビームとデバイスがその まま載せられる直径 6 c m以上の試料ステージを大気に內面が接しな い共通の隔壁を有する真空容器の中に納めたことを特徴とする電子デ バイスの異物分析装置。  7. The foreign matter analyzer for an electronic device according to claim 26, wherein the surface of the sample device having a diameter of 6 cm or more, on which the orifice electron spectrometer, the focused ion beam, and the device are mounted as they are, is brought into contact with the atmosphere. A foreign substance analyzer for electronic devices, wherein the apparatus is housed in a vacuum vessel having no common partition.
8 . 請求の範囲第 2 6項記載の電子デバイスの異物分析装置において、 上記 F I Bのイオンの軌道軸を分析試料の垂直上方に対し 3 0 ° 以上 9 0 ° 以下傾けて形成された掘削面に対する法線に対し傾きが 5 ° 以 下となるようにォ一ジェ電子分光装置の電子線の軌道軸を一致させた ことを特徴とする電子デバイスの異物分析装置。 8. The foreign matter analyzer for an electronic device according to claim 26, wherein the FIB ion orbit axis is inclined at an angle of 30 ° or more and 90 ° or less with respect to a vertical upper direction of the analysis sample with respect to a digging surface. A foreign substance analyzer for an electronic device, wherein an orbit axis of an electron beam of an Auger electron spectrometer is matched so that an inclination with respect to a normal line is 5 ° or less.
9 . 請求の範囲第 2 6項記載の電子デバイスの異物分析装置において、 上記 F I Bによる試料表面の掘削中は C M Aのォ一ジヱ電子引き込み 用の開口部前面に遮蔽板を一次的に配置することを特徴とする電子デ バイスの異物分析装置。 9. The foreign matter analyzer for an electronic device according to claim 26, wherein a shield plate is temporarily disposed in front of an opening for drawing in an electron of a CMA during excavation of the sample surface by the FIB. A foreign substance analyzer for electronic devices, characterized in that:
0 . 請求の範囲第 2 6項記載の電子デバイスの異物分析装置において、 上記 F I Bのイオン源の光軸と A E Sの電子ビームの光軸が為す試料 面への投影角度が、 9 0 ° 以上 1 8 0 ° 以下の範囲に有ることを特徴 とする電子デバイスの異物分析装置。 27. The foreign matter analyzer for an electronic device according to claim 26, wherein a projection angle between the optical axis of the FIB ion source and the optical axis of the AES electron beam on the sample surface is 90 ° or more. A foreign matter analyzer for an electronic device, wherein the foreign matter is within a range of 80 ° or less.
1 . 請求の範囲第 2 7項 2 7記載の電子デバイスの異物分析装置にお いて、 上記試料ステージが法線方向の回リに回転であることを特徴と する電子デバイスの異物分析装置。 1. The foreign matter analyzer for an electronic device according to claim 27, wherein the sample stage is rotated in a normal direction.
2 . 請求の範囲第 3 1項記載の電子デバイスの異物分析装置において、 上記試料ステージを回転後、 X Y軸方向への移動量を演算して、 異物 が外観観察の画面内に自動的に納まることを特徴とする電子デバイス の異物分折装置。 2. The foreign matter analyzer for an electronic device according to claim 31, wherein after the sample stage is rotated, the amount of movement in the XY-axis direction is calculated, and the foreign matter is automatically included in a screen for external appearance observation. Electronic device characterized by the following: Foreign matter separating device.
3 3 . 請求の範囲第 2 6項記載の電子デバイスの異物分析装置において、 分析チャンバに試料を導入 ·搬出するためのポー卜が 2基設けてある ことを特徴とする電子デバイスの異物分析装置。  33. The foreign matter analyzer for an electronic device according to claim 26, wherein two ports for introducing and carrying out the sample into and out of the analysis chamber are provided. .
3 4 . 請求の範囲第 2 6項記載の電子デバイスの異物分析装置において、 分析チャンバに試料を導入 ·搬出するためのポートに試料が 2枚以上 装荷できることを特徴とする電子デバイスの異物分析装置。 34. The foreign matter analyzer for an electronic device according to claim 26, wherein two or more samples can be loaded into a port for introducing and unloading the sample into and from the analysis chamber. .
3 5 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 ·製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 上記異物の位置情報、 製品の 3次元デバイス構造、 製造プロ セスで使用する材料、 膜の厚さ、 個別の製品の製造履歴に関する情報 を収納する記憶装置に納められた情報が、 異物の発生原因 ·工程 ·装 置を解析または解析を支援する装置から記憶媒体を仲介せずに入手さ れることを特徴とする電子デバイスの製造方法。 3 5. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. This is a method of manufacturing an electronic device that manufactures an electronic device by identifying the device that generates the foreign material and taking measures against the device, which is used in the position information of the foreign material, the 3D device structure of the product, and the manufacturing process. The information stored in the storage device, which stores information on the materials, film thicknesses, and manufacturing histories of individual products, is used to analyze the causes, processes, and equipment of foreign substances, and mediates storage media from devices that support analysis. A method for manufacturing an electronic device, which is obtained without being used.
3 6 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 ·製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 上記異物の近傍のデバイス構造および材料あるいはそのいず れか一方の実測結果と製品の該当する設計情報との差異を自動的に検 出またはオペレータが検出することを支援するソフ トウェアを含むこ とを特徴とする電子デバイスの製造方法。 36. Exposing the material surface of the foreign matter, analyzing the elements included in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. An electronic device manufacturing method for manufacturing an electronic device by specifying an apparatus for generating foreign matter and taking measures against the apparatus, wherein a device structure and / or a material in the vicinity of the foreign matter and / or one of the actual measurements is measured. A method of manufacturing an electronic device, comprising software for automatically detecting a difference between a result and corresponding design information of a product or assisting an operator in detecting the difference.
3 7 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 · 製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 デバイスの任意座標における設計情報および工程 ' プロセス 情報あるいはそのいずれかに基づいて、 異物位置およびその近傍にお ける深さ方向の成膜材料と厚さを解析あるいは解析を支援するソフ ト ウェアを含むことを特徴とする電子デバイスの製造方法。 3 7. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and setting the device. A method for manufacturing an electronic device in which a foreign matter generating device is identified by comparing the total with manufacturing information, and a measure is taken for the device to manufacture the electronic device. '' Manufacturing electronic devices characterized by including or supporting software for analyzing the thickness and material of the film in the depth direction at and near the position of the foreign matter based on the process information or any one of them. Method.
3 8 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 ·製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 デバイスの任意座標における素子毎の材料、 厚さに関する情 報および工程 · プロセス情報あるいはそのいずれかに基づいて、 異物 位置およびその近傍における深さ方向の成膜材料と厚さを解析あるい は解析を支援するソフ ト .ウェアを含むことを特徴とする電子デバイス の製造方法。 3 8. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. An electronic device manufacturing method for manufacturing an electronic device by identifying a device for generating foreign matter and taking measures against the device, the information and process relating to the material and thickness of each element at arbitrary coordinates of the device. Manufacturing of electronic devices characterized by analyzing film thickness and thickness in the depth direction at and near the foreign matter based on process information or any of them, or including software supporting the analysis Method.
3 9 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 ·製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 異物座標における成膜構造を解析するために、 異物座標位置 における素子レイァゥ ト情報に基づき、 異物位置および近傍の素子を 抽出し、 素子毎に与えられた成膜材料と厚さに関する情報を総合して 異物位置における成膜の材料と厚さに関する情報を取得することを特 徴とする電子デバイスの製造方法  3 9. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. A method for manufacturing an electronic device in which a device for generating foreign matter is specified, and a countermeasure is taken for the device to manufacture an electronic device. In order to analyze a film formation structure in foreign matter coordinates, an element layer at a foreign matter coordinate position is analyzed. Based on the information on the foreign matter, the elements at and near the foreign matter are extracted, and the information on the material and thickness of the film at the foreign matter position is obtained by combining the information on the film forming material and the thickness given for each element. Characteristic electronic device manufacturing method
4 0 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 *成膜の厚さを分析し、 デバイスの設 計 ·製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 製造プロセスで使用する材料の厚さの全てについて設計値ま たは仮想値を与え、 異物発生原因 · 工程,装置の特定に際し、 この仮 想的な膜構造を参照することを特徴とする電子デバイスの製造方法。1 . 異物の素材表面を露出させ、 その露出面および異物周辺の断面に 含まれる元素分析、 素子の配置 ·成膜の厚さを分析し、 デバイスの設 計 ·製作情報と比較することによリ異物の発生装置を特定し、 当該装 置に対策を施して電子デバイスの製造する電子デバイスの製造方法で あって、 エッチングプロセス、 洗浄プロセス、 レジス トなど製品上に 本来残らない材料も含め、 製造プロセスで使用する材料の厚さの全て について設計値または仮想値を与え、 異物発生原因 · 工程 ·装置の特 定に際し、 この仮想的な膜構造を画像化して参照することを特徴とす る電子デバイスの製造方法。 40. Exposing the material surface of the foreign matter, analyzing the elements included in the exposed surface and the cross section around the foreign matter, and arranging the elements. The manufacturing method of an electronic device that manufactures an electronic device by identifying the device that generates the foreign material by comparing it with the manufacturing information, taking measures against the device, and the thickness of the material used in the manufacturing process. A method for manufacturing an electronic device, characterized in that a design value or a virtual value is given for all of the above, and the virtual film structure is referred to when specifying the cause of the foreign matter generation, the process, and the apparatus. 1. Exposing the material surface of the foreign matter, analyzing the element contained in the exposed surface and the cross section around the foreign matter, analyzing the arrangement of elements and the thickness of film formation, and comparing it with the device design and manufacturing information. This is a method of manufacturing an electronic device that manufactures an electronic device by identifying the device that generates foreign matter and taking measures against the device, including materials that do not originally remain on the product, such as etching processes, cleaning processes, and resists. Design values or virtual values are given for all the thicknesses of the materials used in the manufacturing process, and this virtual film structure is imaged and referenced when specifying the cause of foreign matter generation, process, and equipment. Manufacturing method of electronic device.
PCT/JP1998/005439 1997-12-03 1998-12-02 Method for producing electronic device and foreign matter analyser therefor WO1999028964A1 (en)

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JP5381916B2 (en) * 2010-07-02 2014-01-08 新日鐵住金株式会社 Fine site analysis apparatus using focused ion beam and fine site analysis method using focused ion beam
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58206134A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Detection system for abnormality of semiconductor manufacturing plant
JPS58216414A (en) * 1982-06-11 1983-12-16 Hitachi Ltd Abnormality detecting system of semiconductor manufacturing plant
JPH04116843A (en) * 1990-09-07 1992-04-17 Hitachi Ltd Method and device for observing cut face of sample
JPH04196334A (en) * 1990-11-28 1992-07-16 Hitachi Ltd Analysis data displaying method
JPH0535745A (en) * 1991-06-25 1993-02-12 Hitachi Ltd Data analysis system
JPH06324003A (en) * 1993-05-12 1994-11-25 Hitachi Ltd Foreign matter inspecting device and method
JPH09321114A (en) * 1996-05-24 1997-12-12 Hitachi Ltd Manufacture of semiconductor element
JPH10116872A (en) * 1996-10-08 1998-05-06 Hitachi Ltd Production of semiconductor and inspection method therefor, and device therefor

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58206134A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Detection system for abnormality of semiconductor manufacturing plant
JPS58216414A (en) * 1982-06-11 1983-12-16 Hitachi Ltd Abnormality detecting system of semiconductor manufacturing plant
JPH04116843A (en) * 1990-09-07 1992-04-17 Hitachi Ltd Method and device for observing cut face of sample
JPH04196334A (en) * 1990-11-28 1992-07-16 Hitachi Ltd Analysis data displaying method
JPH0535745A (en) * 1991-06-25 1993-02-12 Hitachi Ltd Data analysis system
JPH06324003A (en) * 1993-05-12 1994-11-25 Hitachi Ltd Foreign matter inspecting device and method
JPH09321114A (en) * 1996-05-24 1997-12-12 Hitachi Ltd Manufacture of semiconductor element
JPH10116872A (en) * 1996-10-08 1998-05-06 Hitachi Ltd Production of semiconductor and inspection method therefor, and device therefor

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
THE HITACHI HYORON, A MAGAZINE FOR ELECTRIC & MECHANICAL ENGINEERS, Vol. 71, No. 5, (May 1989), p. 83-88. *

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