WO1999001892A2

WO1999001892A2 - Captured-cell solder printing and reflow methods and apparatuses

Info

Publication number: WO1999001892A2
Application number: PCT/US1998/013698
Authority: WO
Inventors: John T. Mackay; Thomas E. Molinaro; David G. Love; Patricia R. Boucher
Original assignee: Fujitsu, Ltd.
Priority date: 1997-07-01
Filing date: 1998-07-01
Publication date: 1999-01-14
Also published as: AU8280498A

Abstract

Disclosed are methods and apparatuses for forming solder bumps on integrated circuit chips (and other similar circuitized units) and apparatuses. A screening stencil is laid over the surface of the substrate and solder paste material is deposited into the stencil's apertures with a screening blade. The stencil is placed in such a manner that each of its apertures is positioned over a substrate pad, upon which a solder bump is to be formed. Next, a flat pressure plate is laid over the exposed top surface of the stencil, which creates a fully enclosed, or 'captured', cell of solder paste within each stencil apertue. Then, with the stencil and plate remaining in place on top of the substrate, the substrate is heated to a temperature sufficient to reflow the solder paste material. After reflow, the substrate is cooled, and the pressure plate and stencil are thereafter removed, leaving solder bumps on the substrate. The use of the pressure plate ensures the proper formation of the solder bumps at high densities of solder bumps (i.e., high densities corresponding to small solder bump sizes and small pitch distances between solder bumps).

Description

CAPTURED-CELL SOLDER PRINTING AND REFLOW METHODS AND APPARATUSES

FIELD OF Till; INVENTION The present invention relates to methods of forming solder bumps on integrated circuit chips (and other similar circuitizcd units) and apparatuses ilieie υie, and particularly relates to forming very small solder bumps with small pitch separation and wiϋi high aspect ratios.

BACKGROUND OF TI1E INVENTION

As die circuit density of integrated circuit (IC) chips and multi-chip modules (MCMs) has increased over the past 10 years, flip-chip bonding techniques have been increasingly used IO meet the ever increasing interconnect densities between chip and module substrates. In flip-chip bonding, an array of solder bumps i.s lυnned on one of Uic components, usually the IC chip, and this component is turned υvci to face the second component in a confronting relationship. The two components ate then heated to reflow the solder bumps, thereby making the connections between the two components.

One of d e major drawbacks in die flip-chip process is the cost and difficulty in forming a dense array of solder bump§. At present, there are a variety of mediods employed to form die solder bumps, none of which can form a high density array of solder bumps at a low cost and at a low capital investment of equipment. The evaporation technique, wherein solder is evaporated dirough a metal mask in an evacuated chamber, requires a high investment in capital equipment and has high cost associated with cleaning the processing equipment and widi replacing the metal mask on a frequent basis. The evaporation tcclmique only achieves moderate densities and moderate solder-bump sizes because of the dicrinal mis-match between the evaporation mask and the substrate. To achieve higher densities and smaller bump sizes, die electroplating technique is used. In this technique, the substrate surface is covered with a electroplating seed layer, then masked with a photoresist, which is dicn pattern exposed and developed to form an electroplating mold over each substrate pad, with the seed layer exposed at die bottom of each mold. The seed layer is then electroplated to Till the molds, and the photoresist and the seed layer arc dicreaftcr stripped widi separate chemical etchants. The electroplating technique is time consuming (due to its many steps), requires high capital expenditures since several pieces of processing equipment are required, and involves hazardous chemicals. Noncdielcss, diis tccluiiquc provides the highest bump density and the smallest bump size.

The stenciling technique is the least expensive and requires the least amount of capital expenditure. In this technique, a stencil having apertures dicrcin is placed over die substrate with die apertures overlying corresponding pads of the substrate. As die stencil is held in place, an amount of solder paste is dispensed onto the stencil, and a screening blade (sometimes called "doctor blade") is moved across die stencil surface in such a manner as to force paste into die stencil apertures. The stencil is then removed, which leaves behind bodies of solder paste on the pads, and die bodies are diereafter reflowed to form die solder bumps. This mediod requires little capital invesunent, and is comprised by a few quick and inexpensive steps. However, the mediod cannot achieve small bump,sizes and high bump densities for die following reasons. When the stencil is lifted from die substrate, a portion of the solder paste widiin die aperture sticks to die aperture's side walls and is lifted away from solder paste body. For large apertures, die portion of removed solder paste is a relatively small fraction of d e total amount initially deposited in die aperture. Ilowevcr, the fractional amount increases dramatically when die aperture diameter is decreased, and increases to the point where the method is no longer practical. Compounding this problem is the fact diat such solder paste stencils have "hour-glass" shaped cross-sections with a constriction of die diameter in die middle aperture's length. The constriction causes a greater amount of paste to be removed. „„,., „„, PCT/US98/13698 O 99/01892

Accordingly, under die present prior art techniques, one is forced to use expensive and capital-intensive methods to achieve moderate to high density solder bump densities. In order for the flip-chip bonding technology to be commercially successful, a less expensive and less capital-intensive way of achieving high density solder bumps and small solder-bump size must be found.

SUMMARY OF THE INVENTION

The present invention provides fast, low-cost, and nυn-capitai intensive methods and apparatuses for forming arrays of solder bumps at moderate to high densities.

Broadly stated, the methods according to the present invention comprise the steps of laying a screening stencil over the surface of the substrate and screen depositing solder paste material into the stencil's apertures. The stencil is placed in such a manner that each of its apertures is positioned over a substrate pad, upon which a solder bump is to be formed. Next, a flat pressure plate is laid over the exposed top surface of the stencil, which creates a fully enclosed, or "captured", cell of solder paste within each stencil aperture. Next, widi the stencil and plate remaining in place on top of die substrate, the substrate is heated to a temperature sufficient to reflow the solder paste material. In ύύs manner, the solder paste is pulled away (i.e., detached) from the stencil side walls and anchored to the substrate pad before the stencil is removed. The inventors have discovered diat die use of die pressure plate is essential in ensuring dial proper formation of die solder bumps at high densities. Without the pressure plate, the inventors have observed that solder flows out of the bottom of the stencil for small diameter apertures during reflow. The steps of keeping the stencil in place during reflow and of using the pressure plate are contrary to convention practice, wherein die stencil is removed before the heating step, and wherein die use of a pressure plate is unknown. In preferred embodiments of die present invention, die heating of die substrate is controlled so as to limit the rate of increase in temperature. This control of temperature enables a slow and orderly evolution of solvent and flux gases from the capture cells to occur.

Broadly stated, apparatuses according to the present invention comprise a heater stage up which the substrate is placed, one or more heater elements widiin the heater stage, a screening blade for screen depositing solder paste into a stencil, and a pressure plate positioned in an opposite confronting relationship to die surface of the heater stage. In preferred embodiments, a temperature sensor is attached to cither die heater stage or die substrate, and a controller monitors the sensor temperature and controls the power to the heating elements of the heater stage so as to limit the rate of change of die substrate's temperature.

As an unexpected result, the inventors have achieved smaller diameter solder bumps having higher aspect ratios (heightrwidth) than those achieved by die prior art screening technique. In the prior art screening tecluiique, as mentioned above, die stencil removes solder paste from die deposited solder body when the stencil is lifted away from the substrate, and the amount of solder paste so removed increases as die diameter of solder bump decreases. To reduce die amount of removed solder in the prior art technique, the thickness of die stencil is reduced to reduce the contact surface area between the solder-paste body and the stencil. However, the reduction in stencil diickness necessarily reduces die aspect ratio of die stencil aperture, thereby reducing die aspect ratio of die resulting solder bump. Widi the prior art technique, it is very difficult to achieve solder-bump aspect ratios of greater dian 1:4 (height: widdi). In contrast, die present invention docs not have dύs limitation because the solder paste is detached from die stencil walls before die stencil is removed. The present invention can achieve aspect ratios of well above 1:4, and can readily achieve an aspect ratio close to 1:1.

' Accordingly, it is an object of die present invention to provide methods and apparatuses for forming solder bumps which are inexpensive and not capital intensive, and which can achieve high density arrays of solder bumps. _Λ,_Λ _ „ PCT/US98/13698 99/01892

It is another object of the present invention to enable the formation of small solder bumps with h.eight-to-widlh aspect ratios that arc much higher than achievable with prior art screening techniques.

This and other objects of the present invention will become apparent to diose skilled in the art from the following detailed description of die invention, the accompanying drawings, and the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows a perspective view of an exemplary apparatus according to die present invention.

FIG. 2 shows a cross-sectional view of an exemplary apparatus according to the present invention during the step of screening solder paste into the apertures of the stencil.

FIG. 3 shows a cross-sectional view of an exemplary apparatus according to the present invention during the step of reflowiiig die solder paste with die stencil and pressure plate in place.

FIG. 4 shows a cross-sectional view of an exemplary apparatus accordmg to die present invention after the reflow step.

FIG. 5 is a timing diagram of exemplary temperature control curves.

DETAILED DES RIPTION OF TIIE INVENTION An exemplar)' capture-cell solder printing apparatus according to the present invention is shown at 10 in FIG. 1. Printing apparatus 10 comprises a base heater stage 20 having a flat top surface 21 upon which a substrate (e.g., wafer) 5 is placed. Substrate 5 comprises a plurality of circuitizcd units 7, widi nine such units 7 being shown in FIG. 1. Each of circuitized units 7 comprises an array of pads 6. Solder bumps are to be formed on pads 6 by die apparatus and methods according to the present invention. Units 7 may comprise a MCM substrate, or may comprise an integrated circuit chip prior to being separated from wafer substrate 5. Printing apparatus 10 further comprises a stencil mask 40, which comprises a plurality of apertures which correspond to die pads 6 of substrate 5. The relative locations of apertures 46 within mask 40 correspond to the relative locations of pads 6 on substrate 5. As described below in greater detail with respect to FIG. 2, stencil 40 is positioned directly on top of substrate 5, with apei lures 46 and pads 6 in corresponding relationship to one anodier, and soldering paste material is screened into apertures 46 using a screening blade, or doctor blade. Corresponding alignment marks may be placed on both die substrate 5 and stencil 40 to facilitate die alignment of apertures 46 to pads 6. The solder paste will then later be rcflowcd when healer stage 20 applies heat to substrate 5. Stencil 40 comprises a material, at least on its exposed surface, which does not substantially adhere to molten solder. Exemplary materials are stainless steel, molybdenum, and chrome plated materials.

Apparatus 10 further comprises a pressure plate 50 positioned above stencil 40. As described in greater detail with respect to FIG. 3, prcssuic plate 50 is used to apply pressure against stencil 40 during reflow of die solder paste material. The pressing surface of plate 50 comprises a material to which solder docs not easily adhere or wet to. Exemplary materials are glass, stainless steel, nickel oxide, and chromium oxide. In one constructed embodiment accoiding to the present invention, plate 50 comprises a glass plate. FIG. 2 shows a cross-sectional view of heater stage 20 with substrate 5 placed on top surface 21. Stage 20 comprises one or more vacuum grooves 24 formed at die face of top surface 21, die vacuum grooves 24 being tied to a conuiion vacuum source, which may be brought to the top surface 21 by way of an aperture dirυugh heater stage 20. A vacuum is applied dirough groove 24 to hold substrate 5 in place and against top surface 21. Heater stage 20 also comprises a plurality of healer windings 30 within die base of stage 20. Each heater winding 30 comprises a icsistivc wire wound about an insulating tube, or form, 32. The healer windings 30 raise the temperature of stage 20 in order to reflow the solder dial is to be disposed on die top surface of substrate 5. Heater stage 20 further comprises a tcmpcratuie sensor 25 which is disposed within a recess 22 at the top surface 21 of stage 20. The sensor 25 comprises electrical signal .wires 26 which are carried away from top surface 21 dirough a recess 23. Bodi recess 23 and electrical lines 26 arc shown by dashed lines, as they arc offset from the cross-sectional plane of FIG. 2. The output of sensor 25 i.s provided to a controller 80, which is shown in FIG. 1 , via lines 26. Controller 80 provides power to heater windings 30 dirough electrical lines 30' (shown in FIG. I ). As shown in FIG. 2, stencil 40 is laid over the top surface of substrate 5, widi each stencil aperture 46 lying over a corresponding pad 6 of the substrate. An amount of solder paste 70 is disposed along one side of stencil 40, and dien a screening blade 60 is run across the surface of stencil 40 in such a maiuier that spreads solder paste material 70 into the stencil apertures 46. A plurality of solder-filled cells 72 i.s diereby formed in die stencil apertures 46. The solder paste 70 typically comprises ground particles of solder mixed with a fluidizing solvent and a flux. A wax may be added to die paste to improve the screening of the paste into the apertures. During die screen depositing step, stencil 40 may be held in place by any of the number of stencil- holding techniques known to the art. For example, stencil 40 may be held within a larger frame that is typically used to screen printed circuit boards and the like. Screening blade 60 is preferably formed of a resilient material, which allows its tip to conform to die non-pianarities diat may be inherent in substrate . Next, referring to FIG. 3, pressure, plate 50 is brought against the top surface of stencil 40, with plate 50 preferably covering all of die filled apertures 46. Plate 50 preferably applies pressure of at least two pounds-per-squarc-inch (2 l'SI) upon stencil 40, and preferably between two pounds-per-square-inch (2 l'SI) and seven pounds-per-square-inch (7 PSI). Heater windings 30 of stage 20 arc then powered by controller 80 (shown in FIG. 1) to heat stage 20 to a point just above die reflow temperature of die solder paste, which is typically 20-30 degrees Celsius (°C) above die melting point of the solder particles. During diis time, plate 50 and stencil 40 confine die solder paste widiin an enclosed cell 72, the so-called "capturcd-ccll". Power to Uie heater windings 30 is controlled such dial die temperature of substrate 5 does not rise faster than approximately 100° C over one minute, and more preferably not more dian 70° C over one minute. This relatively slow rate of temperature increase, winch is unconventional in the art, ensures that die solvent and flux of the solder paste within the cells 72 out gas (i.e. , evolve away) from die cell through the interface between plate 50 and stencil 40 in a slow and controlled maiuier. A fast rate of temperature rise, for example, on the order of 200° C or more over one minute, can cause the evolving solvent and flux to generate gas pressure within die cell, which may in turn force solder particles to flow out of die bottom of die capturcd-cell.

Once the temperature of substrate 5 reaches a point which is about 20 to 30° C above the reflow temperature of the solder, the temperature is held at that point, with plate 50 and stencil 40 in place, for approximately 15 to 30 seconds. Thereafter, die power to the heating windings is reduced such that the substrate temperature begins to fall. In one embodiment of die present invention, the substrate is cooled to approximately 60° C before the plate 50 and die stencil are removed. In another embodiment of the present invention, the substrate is cooled to a point which is between 80 and 95 percent of the melting point of die reflow solder (as measured in degrees Kelvin), at which time both the pressure plate and die stencil are lifted away from die substrate. For an exemplary solder comprising 63% tin (Sn) and 37% lead (Pb), die melting point is 456° K (Kelvin), which is 183° C (Celsius, which is the same as Centigrade), the 95% point is 433° K (160° C), and die 80% point is 365° K (92° C).

FIG. 5 shows a timing diagram for die two exemplary substrate heating programs described above. The programs are designated as 510 and 520, and are diagramed in terms of temperature (in Celsius) as a function of time (in minutes). In these examples, die melting point of the solder is 183° C, and die solder is to be reflowed at between 215° C and 220° C. Each of die programs starts at time zero with a temperature ramp rate of 67° C per minute over diree minutes, for a total rise of 200° C in three minutes. (Program 520 has been offset slightly in time so as to better distinguish die two programs in time.) A preferred maximum limiting rale of 100° C per minute is shown at 505. At the three minute mark, the temperature in each of the programs is stabilized for.a time period 512 of approximately 30 seconds for reflow. This tune period is denoted as 522 for program 520. Then, for program 510, power lυ the heater elements is turned off, and the heater stage and substrate arc cooled to less than 60° C, at which point stencil 40 and pressure plate 50 are removed. In program 520, a partial cooling to approximately 150° C occurs, and stabilized at that temperature for a time period 524, which is on die order of 1 to 1.5 minutes. The reflow solder completes its solidification during the beginning portion of period 524. At the end of period 524, pressure plate 50 and stencil 40 arc removed. Thereafter, the substrate is cooled to handling temperamre (e.g. , less than 60° C). In program 520, there is oidy an excursion of about 70° C between periods 522 and 524, which ensures that there is little stress between the solidified solder bumps and the stencil. Controller 80 (shown in FIG. 1) can readily implement eidier of programs 510 and 520 using the temperature sensed by sensor 25. In some cases, there may be a temperature difference between the location of sensor 25 and the top of the substrate surface, but such a temperamre difference can be measured by known techniques and an appropriate offset temperature can be provided to controller 80.

Normally, the material of stencil 40 is chosen such that its coefficient of thermal expansion (CTE) is substantially close to .that of substrate 5, usually within 100% of diat of die substrate. This ensures diat there will be little mechanical stress created between die stencil and the solder bumps upon cooling after the reflow operation. The partial cooling embodiment described above enables die coefficients of thermal expansion (CTEs) to be substantially different, since die stencil is removed before cooling is completed, and before the system has undergone a large temperature change. This enables the benefit of being able to choose from a wider variety of materials for stencil 40. By die same token, where die stencil material has a similar CTE as the substrate, the partial cooling embodiment generates much less stress between the stencil and the solder bumps upon removing the stencil, which is very important when small feature-size solder bumps arc being formed.

The inventors have discovered diat pressure plate 50 is essential in achieving small-sized solder bumps. Widiout plate 50, it has been observed that solder paste flows out dirough the bottom of the aperture 40 upon reflow. This ellcct docs not appear to occur for larger-sized apertures and solder bumps. This benefit piυvided by pressure plate 50 is unexpected, since, upon first inspection, one of ordinary skill in die art would believe that the confinement provided by plate 50 would force a solder paste to flow out of die bottom of the aperture upon reflow, due to pressure buildup by the evolving solvent and flux gases. However, the inventors have found this not to occur with proper control of the applied heat and temperature to substrate 5.

Pressure may be applied to pressure plate in a number of ways known to the art. As one example, weights may be placed onto the top surface of plate 50. Each such weight may have the shape of a round disk (or plate) widi an aperture formed in the center so as to fit around the shaft 51 of pressure plate 50. The pressure-pcr- squarc-inch applied by the weights can be computed by the weight of the weights in a straight forward manner well know to die art (i.e.. total weight divided by the surface area of substrate 5). As another example, a gas-filled piston assembly, such as that often used hi chemical-mechanical polishing machines to press the sample against the polishing platen, may be coupled to die shaft 51 of pressure plate 50 to apply the desired amount of pressure. The pressure-per-square-inch applied by the piston assembly can be computed by die fluid pressure wiiliin die piston and the piston's head area, as is known in die art (i.e., fluid pressure times piston head area divided by substrate surface area). FIG. 4 shows die resulting solder bump structures after plate 50 and stencil 40 have been removed. With the present invention, solder bumps as small as 130 microns (0.13 mm) in diameter on a pitch of 200 microns (0.20 mm) can be manufactured. This compares very favorably to die prior art evaporation technique, where the smallest solder bump is 150 microns (0.15 mm) on a pitch of 300 microns (0.30 mm).

Stencils with substantially vertical side walls arc currently available from several stencil manufacturers. These stencils can have diameters as small as 12.5 microns plus 1.5 times the diickness of the stencil. Stencils as diin as 100 microns are available, which enable a diameter as small as 162.5 microns. Since the solder paste widiin die stencil aperture slirinks upon reflow, a solder bump of around 130 microns can be formed with the 162.5 micron diameter aperture. Widi stencil thickness of 80 microns and less, apertures of 150 microns and less arc possible. While the present invention has been particularly described with respect to the illustrated embodiments, it will be appreciated that various alterations, modifications and adaptations may be made based on the present disclosure, and arc- intended to be within the scope of the present invention. While the invention has been described in connection widi what is presently considered to be die most practical and preferred embodunents, it is to be understood diat the present invention is not limited to the disclosed embodiments but, on the contrary, is intended to cover various modifications and equivalent arrangements included widiin the scope of the appended claims.

Claims

WHAT IS CLAIMED IS:

1. A mediod of forming solder bump structures on corresponding pads of a substrate comprising the steps of:

(a) laying a stencil over the surface of the substrate, the stencil having apertures, said stencil being laid in such a manner that an aperture is positioned over a substrate pad;

(b) screen depositing a solder paste material into the stencil apertures;

(c) thereafter laying a flat plate over the exposed top surface of the stencil; and

(d) thereafter heating the substrate with the stencil and plate on top thereof to a temperature sufficient to reflow the solder paste material.

2. The method of Claim 1 wherein die step of heating the substrate comprises raising the temperature at a rate of less than 100┬░C per minute.

3. The method of Claim 1 further comprising the step of lowering die temperature of said substrate to a temperature point below 95% of the melting point of the rcflowed solder, as measured in degrees Kelvin, and above 80% of said elting point, and thereafter lifting die plate and stencil from said substrate at said temperature point.

4. The mediod of Claim 1 wherein die stencil is made of a material which does not substantially adhere to molten solder.

5. The mediod of Claim 1 wherein die solder paste comprises solder, flux, and a wax material.

6. The method of Claim 1 wherein die flat plate applies a pressure of al least 2 PSI.

7. The method of Claim 1 wherein the flat plate applies, a ptcssuru of between 2 PSI and 7 PSI.

8. The method of Claim 1 wherein the stencil apertures have widths of less dian 150 microns.

9. A method of forming solder bump structures on corresponding puds of a substrate comprising the steps of:

(a) laying a stencil over the surface of the substrate, the stencil having apertures, said stencil being laid in such a maiuier that a aperture is positioned over a substrate pad:

(b) screen depositing a solder paste material into the stencil apertures;

(d) thereafter heating the substrate with the stencil and plate on top thereof to a temperature sufficient to reflow the solder paste material; (e) thereafter lowering the temperature of said substrate to a temperature point below 95% of die melting point of the rcflowed solder, as measured in degrees Kelvin, and above 80% of said melting point; and

(f) diereafter lifting the plate and stencil from said substrate at this temperature point.

10. A solder printing and reflow apparatus comprising: a heater stage having a surface upon which a substrate may be placed; one or more heating elements disposed widiin die healer stage; a screening blade positioned above die healer stage and capable of spreading solder paste over a stencil placed on top of die substrate; and a pressure plate having a pressing surface disposed opposite l╧à die surface of said heater stage and in a confronting relationsliip diercto, said pressure plate being movable between a closed position against die healer stage surface and an open position away from said heater stage surface.

11. The apparatus of Claim 11 further comprising: a temperature sensor attached to one of the heater stage and the pressure plate; and a controller coupled to die one or more heater elements and to die temperature sensor, said controller regulating the power applied to the one or more heater elements.