WO1998049768A1 - Procede et circuit de diminution du bruit - Google Patents

Procede et circuit de diminution du bruit Download PDF

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Publication number
WO1998049768A1
WO1998049768A1 PCT/BY1997/000003 BY9700003W WO9849768A1 WO 1998049768 A1 WO1998049768 A1 WO 1998049768A1 BY 9700003 W BY9700003 W BY 9700003W WO 9849768 A1 WO9849768 A1 WO 9849768A1
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WO
WIPO (PCT)
Prior art keywords
signal
noise
voltage
οπορnοgο
πeρemnοzhiτelya
Prior art date
Application number
PCT/BY1997/000003
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English (en)
Russian (ru)
Inventor
Nikolai Petrovich Cherednichenko
Vladimir Petrovich Romanjuk
Original Assignee
Cherednichenko Nikolai Petrovi
Vladimir Petrovich Romanjuk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cherednichenko Nikolai Petrovi, Vladimir Petrovich Romanjuk filed Critical Cherednichenko Nikolai Petrovi
Priority to PCT/BY1997/000003 priority Critical patent/WO1998049768A1/fr
Publication of WO1998049768A1 publication Critical patent/WO1998049768A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/109—Means associated with receiver for limiting or suppressing noise or interference by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1433—Balanced arrangements with transistors using bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001—Circuit elements of demodulators
    • H03D2200/0021—Frequency multipliers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001—Circuit elements of demodulators
    • H03D2200/0023—Balun circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0041—Functional aspects of demodulators
    • H03D2200/0084—Lowering the supply voltage and saving power
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference

Definitions

  • the method of limiting the differential amplitude modulation of the signal in the transient differential cascade ( ⁇ ) is known, in addition to this, a limited linear range is used. For this reason, a valid large input signal collector currents provides a direct impulse to the main input. In addition to the frequency of the output impulses, the operating speed is subject to the linear frequency of the input to the device, which is subject to A cheap way to do this is to have an input signal with a large amplitude. Therefore, for the purpose of noise reduction of the input of the external cascades of the radio-electronic devices, it was not used.
  • the method for the conversion of two signals in the analogue switch (S) is known, the limited range of linear SPS is used in connection with it (see [1]).
  • the transitive function of the PDA provides the harmless production of the tangent of the two input signals and is linear only for small signals of the voltage level. It is well known that this non-linearity is used for frequent signal processing.
  • This method is the closest to the claimed invention for the majority of the matching attributes and is taken for prototype. In this case, with an increase in the amplitude of the higher voltage, the higher potential of the load does not depend on the voltage.
  • One area of non-linear operation in UPS for noise reduction purposes was not used, due to the losses, to deteriorate the frequency of the processed signal due to the influence of the load frequency.
  • Another disadvantage of the manufacturer on the basis of the PCB is an increased level of noise (see [1], [3]).
  • the other diagonal of the bridge is connected to the terminal at the intermediate frequency.
  • the use of a dual ring balanced mixer ensures the highest speed of the signal at the expense of a balanced signal output.
  • a disadvantage of this inverter circuit is a small conversion factor, due to the fact that diodes do not have amplifying properties.
  • Another disadvantage of this scheme is the presence of a waste outlet in the household. Due to negativity, the voltage supplied to the diodes is substantially increased, which contains a greater and noisier component. Moreover, the lower “pure” part of the voltage of the heterodyne (with a low noise level) is consumed by disconnecting the devices, bypassing the voltage, and the upper “bypassing” is exhausting (the pressure is exhausted).
  • the inverter circuit is known to be installed on an analogue switch - an integral dual-balanced mixer and including an alarm circuit - not connected
  • This inverter has unbalanced, “ground” signal and hedge inputs and runs at a low voltage, which allows you to disconnect the power from the - 3 - Upstream transformer in a dual balanced mixer in linear mode (see [7]). This mode allows you to achieve a minimum of non-linear and intermodulated distortion of the converted signal (see [1]).
  • This inverter circuit is the closest to the claimed invention for the benefit of the same trademarks and taken for protection. It contains a signal circuit, which is an input of the inverter and includes connected in parallel with the inductance, the constant capacitance and two capacitors; Condenser, including connected in parallel with the inductance of the inductance, the capacitance of the constant capacity and the capacitance of the variable capacitance; two differential cascades on the transformer with interconnected connections and two upstream transistors, each of which is connected to the emissive circuits of the manufacturer and the intermediate part.
  • the first withdrawal of the inductance of the industrial contact is connected with the general connection of the contact of the consumer and the output of the
  • the output terminal of the inlet of the inductance of the external contact is connected with the second output of the output switch and through the ⁇ ⁇ 98/49768 ⁇ / ⁇ 97 / 00003
  • the intermediate circuitry is connected to the output terminal of the converter and is the output of the inverter.
  • This inverter circuitry is a high noise level due to the asymmetrical signal input and external input.
  • the invention solves the problem of creating a means of noise reduction and circuitry by processing the signal and noise during the operation of the voltage.
  • Suschn ⁇ s ⁇ s ⁇ s ⁇ ba shum ⁇ g ⁇ anicheniya s ⁇ s ⁇ i ⁇ in ⁇ m ch ⁇ is ⁇ lzuya izves ⁇ ny s ⁇ s ⁇ b ⁇ e ⁇ b ⁇ az ⁇ vaniya signaln ⁇ g ⁇ na ⁇ yazheniya in anal ⁇ g ⁇ v ⁇ m ⁇ e ⁇ emn ⁇ zhi ⁇ ele ⁇ i ⁇ ab ⁇ e in ⁇ ezhime b ⁇ lsh ⁇ g ⁇ signal ⁇ ⁇ n ⁇ mu v ⁇ du d ⁇ ⁇ ⁇ liters of n and ⁇ f l s n ⁇ izmenyayu ⁇ v ⁇ emya vy ⁇ lneniya and ⁇ ezhim ⁇ e ⁇ b ⁇ az ⁇ vaniya for ⁇ susches ⁇ vleniya shum ⁇ g ⁇ anicheniya - ⁇ e ⁇ b ⁇ az ⁇ vanie the signal and noise are
  • P ⁇ i ⁇ b ⁇ ab ⁇ e signal and noise in ⁇ edlagaem ⁇ m s ⁇ s ⁇ be is ⁇ lzuyu ⁇ sya am ⁇ li ⁇ udnye and s ⁇ e ⁇ alnye ⁇ azlichiya ⁇ n ⁇ g ⁇ na ⁇ yazheniya (am ⁇ li ⁇ uda veli ⁇ a and ⁇ l ⁇ sa chas ⁇ uz ⁇ aya in s ⁇ avnenii with ⁇ e ⁇ l ⁇ vym ⁇ lu ⁇ uatsi ⁇ nnym shum ⁇ m) and noise (u ⁇ ven shum ⁇ v v ⁇ dny ⁇ ⁇ as ⁇ ad ⁇ v us ⁇ ys ⁇ va small and ⁇ l ⁇ sa chas ⁇ shi ⁇ aya).
  • the noise-free lower “clean” part of the voltage is used — voltage components (with a low noise level), while the “noise-free” voltage is used
  • Such a mode is set by choosing a sufficiently large amplitude of high voltage at a higher output voltage, which is more stress-free or stress-free.
  • the second part of the present invention solves the problem of creating a noise pattern.
  • each of the upstream transients is connected to the emissive circuit; ⁇ n ⁇ u ⁇ ⁇ mezhu ⁇ chn ⁇ y chas ⁇ y associated simme ⁇ ichn ⁇ with vy ⁇ d ⁇ m ⁇ e ⁇ emn ⁇ zhi ⁇ elya two ⁇ azdeli ⁇ elny ⁇ ⁇ ndensa ⁇ a and ⁇ e ⁇ y ⁇ ndensa ⁇ communication v ⁇ lyuchenny between emi ⁇ e ⁇ ami ⁇ i ⁇ ayuschi ⁇ ⁇ anzis ⁇ v ⁇ e ⁇ emn ⁇ zhi ⁇ elya, d ⁇ ⁇ ⁇ liters of n and ⁇ f l s n ⁇ introduced che ⁇ ve ⁇ y ⁇ ndensa ⁇ connection or bu ⁇ e ⁇ ny ⁇ as ⁇ ad, ⁇ ichem vyv ⁇ d ⁇ n ⁇ g ⁇ ⁇ n ⁇ u ⁇ a Connected through a
  • Fig. 1 shows a variation of 1 noise reduction scheme that implements the claimed noise reduction method
  • Fig. 2 shows a variant of 2 noise reduction schemes that implements the claimed noise reduction method
  • Fig. 3 shows the diagram of the dependence of the circuit breaker on signal input at the input of the voltage value
  • Fig. ZB shows a diagram of the dependence of the voltage of the generator, signal and internal noise from the phase of the voltage
  • the Fig. Sound shows a diagram of the dependence of the circuit breaker on the voltage transformer
  • Fig. 3 shows a diagram of the voltage dependence of the intermediate frequency at the output of the voltage switch.
  • S ⁇ s ⁇ b shum ⁇ g ⁇ anicheniya is ⁇ lzue ⁇ izves ⁇ ny s ⁇ s ⁇ b ⁇ e ⁇ b ⁇ az ⁇ vaniya signaln ⁇ g ⁇ and ⁇ n ⁇ g ⁇ na ⁇ yazheny in ⁇ ezhime b ⁇ lsh ⁇ g ⁇ signal ⁇ ⁇ n ⁇ mu v ⁇ du, ⁇ ealiz ⁇ vanny in anal ⁇ g ⁇ v ⁇ m ⁇ e ⁇ emn ⁇ zhi ⁇ ele, ⁇ ivedenn ⁇ m on ⁇ ig.1 and ⁇ ig.2 (see.
  • the land-line switch has been supplemented with a communication terminal 7, signal and external terminals and a contact center, which are connected to a fixed port; by simulating ratios 1 1, 12 and by a coupling of 13 or by a buffer of 14 (indicated by Fig. 1 of the paragraph).
  • Responses of 5.6 are combined with a condenser of 7 and an oppository contact in the form of an internal generatrix.
  • the method of noise reduction is different from the fact that signal and noise are disturbed due to the occurrence of high voltage, ⁇ ⁇ 98/49768 - ⁇ / ⁇ 97 / 00003
  • Option 1 for noise reduction schemes is shown in Figure 1.
  • ⁇ dnaya ⁇ a ⁇ ush ⁇ a indu ⁇ ivn ⁇ connection 22 is connected with ⁇ a ⁇ ush ⁇ y indu ⁇ ivn ⁇ s ⁇ i 8.
  • ⁇ yv ⁇ dy ⁇ a ⁇ ush ⁇ i indu ⁇ ivn ⁇ s ⁇ i 8 v ⁇ lyuchenny ⁇ ⁇ sled ⁇ va ⁇ eln ⁇ simme ⁇ i ⁇ uyuschi ⁇ ⁇ ndensa ⁇ v January 1, 12 and 15 ⁇ ndensa ⁇ a ⁇ e ⁇ emenn ⁇ y em ⁇ s ⁇ i s ⁇ edineny between s ⁇ b ⁇ y ⁇ a ⁇ alleln ⁇ and ⁇ b ⁇ azuyu ⁇ signal ⁇ n ⁇ u ⁇ , vyv ⁇ dy ⁇ g ⁇ che ⁇ ez ⁇ azdeli ⁇ elnye ⁇ ndensa ⁇ y 18, 19 s ⁇ edineny s ⁇ ve ⁇ s ⁇ venn ⁇ with bases Transformations of 1, 4 and 2,3 differential stages of the transducer.
  • connection 13 or a buffer stage 14 The online contact is connected via a connection 13 or a buffer stage 14 to the general connection of the corresponding connecting sensors 1 1, 12.
  • the noise reduction scheme works as follows. When the power supply voltage is turned on at the outputs of the power supply coils 22 and 8, the driving force (EMF) of the signal and the EMF of noise are detected, and the output of the power supply coils 9 - EMF.
  • EMF driving force
  • vyv ⁇ d ⁇ v signaln ⁇ g ⁇ ⁇ n ⁇ u ⁇ a ⁇ s ⁇ u ⁇ ae ⁇ che ⁇ ez ⁇ azdeli ⁇ elnye ⁇ ndensa ⁇ y 18, 19 vyv ⁇ dy signaln ⁇ g ⁇ v ⁇ da ⁇ e ⁇ emn ⁇ zhi ⁇ elya - ⁇ anzis ⁇ v di ⁇ e ⁇ entsialny ⁇ base ⁇ as ⁇ ad ⁇ v 1, 4 and 2,3 and ⁇ iv ⁇ azn ⁇ , blag ⁇ da ⁇ ya grounding s ⁇ edney ⁇ ch ⁇ i ⁇ a ⁇ ush ⁇ i indu ⁇ ivn ⁇ s ⁇ i 8 simme ⁇ ichn ⁇ .
  • P ⁇ i ⁇ dache na ⁇ yazheniya power The v ⁇ vnu ⁇ ennem ⁇ n ⁇ m gene ⁇ a ⁇ e ⁇ is ⁇ dya ⁇ lavin ⁇ b ⁇ aznye ⁇ tsessy ⁇ i ⁇ aniya ⁇ anzis ⁇ a 5 (6) and za ⁇ i ⁇ aniya ⁇ anzis ⁇ a 6 (5), in na ⁇ leniya ene ⁇ gii ⁇ ndensa ⁇ e (indu ⁇ ivn ⁇ s ⁇ i) ⁇ n ⁇ g ⁇ ⁇ n ⁇ u ⁇ a and ⁇ e ⁇ e ⁇ ach ⁇ i ene ⁇ gii in indu ⁇ ivn ⁇ s ⁇ ( ⁇ ndensa ⁇ ) e ⁇ g ⁇ ⁇ n ⁇ u ⁇ a with chas ⁇ y nas ⁇ y ⁇ i gene ⁇ a ⁇ a.
  • ⁇ yb ⁇ m value em ⁇ s ⁇ i ⁇ ndensa ⁇ a connection 7 ⁇ bes ⁇ echivae ⁇ sya depth ⁇ l ⁇ zhi ⁇ eln ⁇ y ⁇ b ⁇ a ⁇ n ⁇ y communication v ⁇ vnu ⁇ ennem gene ⁇ a ⁇ e, ne ⁇ b ⁇ dimaya for ⁇ ab ⁇ y gene ⁇ a ⁇ a in ⁇ ezhime with ⁇ g ⁇ anicheniem and ⁇ sech ⁇ y ⁇ lle ⁇ ny ⁇ ⁇ v ⁇ i ⁇ ayuschi ⁇ ⁇ anzis ⁇ v 5.6.
  • a short phase of these impulses is a result of the beating of two vibrations - a signal and a generator, and they will also change because of a change in the phase of the signal and the frequency
  • Option 2 noise reduction patterns are shown in Figure 2.
  • the emf of the signal and EMF of noise are detected, and at the outputs of the inductance 9, the emf of the generator is generated.
  • the signal and noise voltage from the output of the signal interface is connected to the outputs of the signal input of the grounding switch - the base of the differential stages 1, 4 and 2.3 phase.
  • P ⁇ i ⁇ dache na ⁇ yazheniya power The v ⁇ vnu ⁇ ennem ⁇ n ⁇ m gene ⁇ a ⁇ e ⁇ is ⁇ dya ⁇ lavin ⁇ b ⁇ aznye ⁇ tsessy ⁇ i ⁇ aniya ⁇ anzis ⁇ a 5 (6) and za ⁇ i ⁇ aniya ⁇ anzis ⁇ a 6 (5), in na ⁇ leniya ene ⁇ gii ⁇ ndensa ⁇ e (indu ⁇ ivn ⁇ s ⁇ i) ⁇ n ⁇ g ⁇ ⁇ n ⁇ u ⁇ a and ⁇ e ⁇ e ⁇ ach ⁇ i ene ⁇ gii in indu ⁇ ivn ⁇ s ⁇ ( ⁇ ndensa ⁇ ) e ⁇ g ⁇ ⁇ n ⁇ u ⁇ a with chas ⁇ y nas ⁇ y ⁇ i gene ⁇ a ⁇ a.
  • the method of noise and the circuitry can also be used in noise reduction systems for the processing of sound signals and magnetic recording devices. LIST OF LITERATURE

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

Cette invention concerne un procédé qui consiste, lors de la transformation de signaux à l'aide d'un multiplicateur analogique dans un mode de signal important, à faire passer l'une ou les deux entrées dudit multiplicateur en un mode de limitation et de coupure de courant par rapport à une tension de référence. Ce procédé permet de transformer le signal et le bruit au moment de la formation d'un front de tension de référence. Le passage au mode voulu se fait en choisissant l'amplitude de la tension de référence et/ou en envoyant la tension de référence à l'entrée des signaux du multiplicateur analogique. L'envoi de la tension de référence vers l'entrée des signaux dudit multiplicateur analogique se fait par l'intermédiaire d'un condensateur de liaison (13) ou d'une cascade tampon (14) qui sont connectés soit à des condensateurs d'équilibrage (11, 15), soit au point central d'une bobine d'induction (8). Afin d'obtenir une diminution de bruit plus efficace, le multiplicateur analogique fonctionne dans un mode symétrique à celui des entrées de référence et/ou de signaux. Ce procédé et ce circuit de diminution du bruit permettent de réduire les niveaux de bruit ainsi que le seuil de sensibilité de récepteurs, de réduire les bruits rayonnants d'émetteurs de signaux modulés en amplitude (AM) ou modulés en fréquence (FM), de réduire la puissance des émetteurs ou la taille de leurs antennes, et d'accroître la plage de bonne réception de signaux AM et FM.
PCT/BY1997/000003 1997-04-28 1997-04-28 Procede et circuit de diminution du bruit WO1998049768A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/BY1997/000003 WO1998049768A1 (fr) 1997-04-28 1997-04-28 Procede et circuit de diminution du bruit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/BY1997/000003 WO1998049768A1 (fr) 1997-04-28 1997-04-28 Procede et circuit de diminution du bruit

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WO1998049768A1 true WO1998049768A1 (fr) 1998-11-05

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3550040A (en) * 1968-05-31 1970-12-22 Monsanto Co Double-balanced modulator circuit readily adaptable to integrated circuit fabrication
US3857099A (en) * 1973-05-08 1974-12-24 Us Army Mixer for controlling the frequency accuracy of a variable frequency oscillator
GB1551858A (en) * 1975-10-27 1979-09-05 Sony Corp Frequency converters
US4268916A (en) * 1977-11-28 1981-05-19 Tokyo Shibaura Denki Kabushiki Kaisha Frequency converting circuit
DE3140417A1 (de) * 1980-10-13 1982-09-30 Matsushita Electric Industrial Co., Ltd., Kadoma, Osaka "transistorisierter symmetrischer mischer"

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3550040A (en) * 1968-05-31 1970-12-22 Monsanto Co Double-balanced modulator circuit readily adaptable to integrated circuit fabrication
US3857099A (en) * 1973-05-08 1974-12-24 Us Army Mixer for controlling the frequency accuracy of a variable frequency oscillator
GB1551858A (en) * 1975-10-27 1979-09-05 Sony Corp Frequency converters
US4268916A (en) * 1977-11-28 1981-05-19 Tokyo Shibaura Denki Kabushiki Kaisha Frequency converting circuit
DE3140417A1 (de) * 1980-10-13 1982-09-30 Matsushita Electric Industrial Co., Ltd., Kadoma, Osaka "transistorisierter symmetrischer mischer"

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GREBEN A.B., Proektirovanie Analogovykh Integralnykh Skhem. M., Energya, 1976, pages 149-150. *

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