WO1998019396A2 - Sample rate conversion - Google Patents

Sample rate conversion Download PDF

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Publication number
WO1998019396A2
WO1998019396A2 PCT/IB1997/001166 IB9701166W WO9819396A2 WO 1998019396 A2 WO1998019396 A2 WO 1998019396A2 IB 9701166 W IB9701166 W IB 9701166W WO 9819396 A2 WO9819396 A2 WO 9819396A2
Authority
WO
WIPO (PCT)
Prior art keywords
multipliers
filter device
output
compression
filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB1997/001166
Other languages
English (en)
French (fr)
Other versions
WO1998019396A3 (en
Inventor
Age Jochem Van Dalfsen
Jeroen Hubert J. C. Stessen
Johannes Gerardus Wilhelmina Maria Janssen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Philips Norden AB
Original Assignee
Philips Electronics NV
Philips Norden AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV, Philips Norden AB filed Critical Philips Electronics NV
Priority to EP97940285A priority Critical patent/EP0870364B1/en
Priority to JP52022098A priority patent/JP4356819B2/ja
Priority to DE69708841T priority patent/DE69708841T2/de
Publication of WO1998019396A2 publication Critical patent/WO1998019396A2/en
Publication of WO1998019396A3 publication Critical patent/WO1998019396A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/0248Filters characterised by a particular frequency response or filtering method
    • H03H17/0264Filter sets with mutual related characteristics
    • H03H17/0273Polyphase filters
    • H03H17/0275Polyphase filters comprising non-recursive filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/0294Variable filters; Programmable filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/06Non-recursive filters
    • H03H17/0621Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
    • H03H17/0635Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
    • H03H17/065Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer
    • H03H17/0657Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer where the output-delivery frequency is higher than the input sampling frequency, i.e. interpolation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00Networks using digital techniques
    • H03H17/02Frequency selective networks
    • H03H17/06Non-recursive filters
    • H03H17/0621Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
    • H03H17/0635Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies
    • H03H17/065Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer
    • H03H17/0664Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing characterized by the ratio between the input-sampling and output-delivery frequencies the ratio being integer where the output-delivery frequency is lower than the input sampling frequency, i.e. decimation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen

Definitions

  • the invention relates to a filter device for changing a sample rate of a discrete representation, e.g. to change a size of an image signal, and to an image display apparatus comprising such a filter device.
  • a first aspect of the invention provides a filter device as defined in claim 1.
  • a second aspect of the invention provides an image display apparatus comprising such a filter device.
  • a filter device for changing a sample rate of a discrete representation, e.g. to change a size of an image signal comprises a plurality of multipliers, summing circuitry coupled to outputs of the multipliers, and a plurality of delay cells arranged for repeatedly supplying identical values to corresponding ones of the multipliers during a number of times corresponding to an expansion ratio by which the discrete representation is to be expanded, or for, in cooperation with the summing circuitry, accumulating output values from the multipliers during a number of times corresponding to a compression ratio by which the discrete representation is to be compressed.
  • expansion is synonymous to up-sampling
  • compression is synonymous to down-sampling.
  • the sample rate conversion filter device of the present invention is elucidated by means of the example of an image size changer, other discrete representations like digital or time-discrete sound, and designs of character fonts, textiles or wallpaper patterns are by no means excluded.
  • the filter device in accordance with the present invention, no input samples are skipped in the case of a compression, as the circuit processes all input samples which are presented. Reversely, in the case of an expansion, the delay cells repeatedly furnish samples to the multipliers, thereby generating the basis for obtaining additional output samples.
  • the invention encompasses filter devices which are only suitable for compression, filter devices which are only suitable for expansion, as well as reconfigurable filter devices which are suitable for both compression and expansion.
  • Fig. 1 shows an embodiment of an expansion filter in accordance with the present invention
  • Fig. 2 shows an embodiment of a compression filter in accordance with the present invention
  • Fig. 3 shows an embodiment of an image display device comprising a filter device in accordance with the present invention which is suitable for both compression and expansion.
  • Fig. 1 shows an embodiment of an expansion filter in accordance with the present invention and illustrates how the normal (polyphase) FIR filter structure is modified to allow for expansion. In case of expansion, there are more output samples than there are input samples.
  • an input signal I is applied to a first delay unit (SO, DO) which comprises a switch SO and a delay cell DO.
  • the switch SO applies either the input signal I or an output signal of the delay cell DO, to the delay cell DO.
  • the switch SO is controlled by a hold signal H.
  • the delay cell DO imposes a delay of one sampling period Ts.
  • a delay cell with a write-enable input receiving the hold signal H would do.
  • a cascade connection of delay units (SI, DI), (S2, D2), and (S3, D3), each having a similar construction as the delay unit (SO, DO), is connected to the output of the delay cell DO.
  • Multipliers MO, Ml, M2, and M3 multiply the output signals of the delay cells DO, DI, D2, and D3, respectively, by (variable) coefficients CO, Cl, C2, and C3, respectively. With variable coefficients C0-C3, a polyphase filter is obtained.
  • Adders Al, A2, and A3 sum the outputs of the multipliers MO, Ml, M2, and M3, to furnish an output signal O.
  • the hold signal puts the switches Si in the state shown during a first sampling period, and then in the state not shown for the following three successive sampling periods.
  • each input sample is supplied four times by the delay cells Di.
  • the filter device is a polyphase filter, in which the coefficients Ci are different for each sampling period Ts.
  • Fig. 2 shows an embodiment of a compression filter in accordance with the present invention.
  • compression there are (far) fewer output samples than there are input samples. This is downsampling or decimation.
  • the bandwidth of the interpolation filter must be reduced to fit the lowest of the two sample rates, in this case the output sample rate.
  • the filter is constant, i.e. it is related to the input side (where the sample rate is constant).
  • Compression or downsampling means losing samples, thus losing information, and thus aliasing.
  • a conventional FIR filter interpolator a low-pass pre- filter (“anti-aliasing filter") is required to fulfil the sampling theorem requirement.
  • the pre-filter bandwidth must be decreased. This makes it very awkward to apply the conventional FIR filter interpolator implementation for variable compression like e.g. geometry correction.
  • a variable compression rate requires a variable pre-filter. Another solution is needed.
  • Fig. 2 illustrates how the inverted FIR filter structure must be modified to allow for good compression.
  • an input signal I' is applied to multipliers M3', M2', Ml', and MO' for multiplication by respective factors C3', C2', Cl', and CO'.
  • Outputs of the multipliers M3 ⁇ Ml', and MO' are coupled to accumulator units (S3', A3', D3'), (SI', Al', DI'), and (SO', A0', DO').
  • Each accumulator unit (Si', Ai', Di') comprises a switch Si', an adder Ai', and a delay cell Di'.
  • the switch Si' applies either an output signal of the previous accumulator unit (for switch S3': a zero value) or an output signal of the delay cell Di', to the adder Ai'.
  • the adder Ai' adds the signal received from the switch Si' to the output of the multiplier Mi', and applies the sum to the delay cell Di'.
  • the last delay cell DO' furnishes the output signal O' of the filter device of Fig. 2.
  • the switches Si' are controlled by a hold signal H'. For a compression ratio of e.g. 4: 1, the hold signal H' keeps the switches Si' in the state shown for one sample period Ts, and in the state not shown for the following three successive sampling periods. Sometimes, only the fractional part of the delay changes.
  • the delay cells Di' do not shift, only the coefficients Ci of the filter are changed.
  • a new input sample will be used to calculate its contribution to the same output sample data set (same integer delay). This output is accumulated with the other contents of the delay cells. Only when the integer part of the delay (or destination address) changes, then the storage elements shift the data out (one at a time).
  • the calculation rate must be coupled to the side (input or output) with the highest sample rate (for compression: the input) and the filter bandwidth must be coupled to the side with the lowest sample rate (for compression: the output). This is the exact purpose of the reversal of input and output. Very high compression rates can be achieved without pre-filtering.
  • Fig. 3 shows an embodiment of an image display device comprising a filter device in accordance with the present invention which is suitable for both compression and expansion.
  • Fig. 3 is a combination of Figs. 1 and 2, suitable for both compression and expansion.
  • the input signal I is applied to a cascade connection of delay units (SO, DO) .. (S5, D5) as in Fig. 1.
  • Outputs of the delay cells Di are applied to multipliers MO .. M5 thru selectors SEL-0 .. SEL-5.
  • the multipliers Mi multiply by variable coefficients CO .. C5 selected from coefficient arrays or obtained from a function generator (not shown); there are preferably 64 different coefficients in each array, which coefficients are selected by means of a phase signal Ph.
  • Outputs of the multipliers MO .. M5 are summed by adders Al .. A5 to obtain a result which is applied to a first input of an output selector SEL-out.
  • the input signal I is also applied to second inputs of the selectors SEL-0 .. SEL-5 thru a sealer SC.
  • the outputs of the multipliers Mi are also applied to accumulation units (Si', Ai', Di') as in Fig. 2.
  • the output of the delay cell DO' is applied to a second input of the output selector SEL-out.
  • the selectors SEL-i pass the outputs of the delay cells Di to the multipliers Mi, as in Fig. 1, and the output selector SEL- out selects its first input signal, i.e. the output of the adder A5.
  • the selectors SEL-i pass the output of the sealer SC directly to the multipliers Mi, as in Fig. 2, and the output selector SEL-out selects its second input signal, i.e. the output of the delay cell DO'.
  • the filter device of Fig. 3 further comprises a control, initialization and mode select unit CTRL which determines a mode signal (compression / expansion) M and filter coefficients Fc on the basis of received input parameters IP.
  • a calculation unit CALC determines a zoom factor, the coefficient phase signal Ph, and the hold signal H which determines the states of the switches Si, Si', from data received from the control unit CTRL.
  • the calculation unit CALC also controls a clip and round circuit which furnishes the output signal of the filter device on the basis of the output signal of the output selector SEL-out.
  • the output signal O is displayed on a display unit DU.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)
  • Television Systems (AREA)
PCT/IB1997/001166 1996-10-31 1997-09-26 Sample rate conversion Ceased WO1998019396A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP97940285A EP0870364B1 (en) 1996-10-31 1997-09-26 Sample rate conversion
JP52022098A JP4356819B2 (ja) 1996-10-31 1997-09-26 サンプルレート変換の改善
DE69708841T DE69708841T2 (de) 1996-10-31 1997-09-26 Abtastratenumwandlung

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP96203035.9 1996-10-31
EP96203035 1996-10-31

Publications (2)

Publication Number Publication Date
WO1998019396A2 true WO1998019396A2 (en) 1998-05-07
WO1998019396A3 WO1998019396A3 (en) 1998-06-25

Family

ID=8224535

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB1997/001166 Ceased WO1998019396A2 (en) 1996-10-31 1997-09-26 Sample rate conversion

Country Status (6)

Country Link
US (1) US5892695A (https=)
EP (1) EP0870364B1 (https=)
JP (1) JP4356819B2 (https=)
KR (1) KR100475201B1 (https=)
DE (1) DE69708841T2 (https=)
WO (1) WO1998019396A2 (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002096100A1 (en) * 2001-05-17 2002-11-28 Koninklijke Philips Electronics N.V. Tv receiver, image display apparatus, tv-system and method for displaying an image
US6600495B1 (en) 2000-01-10 2003-07-29 Koninklijke Philips Electronics N.V. Image interpolation and decimation using a continuously variable delay filter and combined with a polyphase filter
FR2858891A1 (fr) * 2003-08-11 2005-02-18 St Microelectronics Sa Convertisseur de taux d'echantillonnage a augmentation ou diminution du taux d'echantilonnage
EP1768397A3 (en) * 2005-09-15 2008-10-01 Samsung Electronics Co., Ltd. Video Processing Apparatus and Method

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100696333B1 (ko) * 1999-08-31 2007-03-21 유티스타콤코리아 유한회사 디지털 라디오 시스템에서의 다양한 인터폴레이션 레이트를 지원하는 안티이미징 필터
US6265998B1 (en) 1999-11-30 2001-07-24 Agere Systems Guardian Corp. Sampling device having an intrinsic filter
EP1176717A1 (de) * 2000-07-29 2002-01-30 Micronas GmbH Programmierbare Filterachitektur
US6963890B2 (en) 2001-05-31 2005-11-08 Koninklijke Philips Electronics N.V. Reconfigurable digital filter having multiple filtering modes
US6537078B2 (en) * 2001-08-02 2003-03-25 Charles Jean System and apparatus for a karaoke entertainment center
US20030080981A1 (en) * 2001-10-26 2003-05-01 Koninklijke Philips Electronics N.V. Polyphase filter combining vertical peaking and scaling in pixel-processing arrangement
US20030103166A1 (en) * 2001-11-21 2003-06-05 Macinnis Alexander G. Method and apparatus for vertical compression and de-compression of progressive video data
AU2003238508A1 (en) * 2002-02-01 2003-09-02 Koninklijke Philips Electronics N.V. Using texture filtering for edge anti-aliasing
EP1474777A2 (en) * 2002-02-01 2004-11-10 Koninklijke Philips Electronics N.V. Stepless 3d texture mapping in computer graphics
FR2849330A1 (fr) * 2002-12-18 2004-06-25 Koninkl Philips Electronics Nv Convertisseur numerique de frequence d'echantillonnage
WO2004088842A2 (en) * 2003-03-31 2004-10-14 Koninklijke Philips Electronics N.V. A fir filter device for flexible up- and downsampling
CN1768476B (zh) * 2003-03-31 2010-06-09 Nxp股份有限公司 采样率转换器及方法,包括采样率转换器的设备
KR20060006062A (ko) * 2003-04-24 2006-01-18 코닌클리케 필립스 일렉트로닉스 엔.브이. 조합된 샘플링 레이트 변환 및 이득 제어된 필터링
CN1781249B (zh) * 2003-04-29 2011-08-31 三叉微系统(远东)有限公司 数字滤波器装置
KR100611179B1 (ko) * 2004-06-23 2006-08-10 삼성전자주식회사 영상처리장치
KR100614241B1 (ko) * 2005-02-07 2006-08-21 삼성전자주식회사 적응형 등화기의 초기값 설정 방법 및 장치
CN101072019B (zh) * 2007-04-19 2010-05-19 华为技术有限公司 一种滤波器及其滤波方法
US7864080B1 (en) * 2008-12-29 2011-01-04 Altera Corporation Sample rate conversion by controlled selection of filter outputs
US11949395B1 (en) * 2021-05-14 2024-04-02 Xilinx, Inc. Polyphase filter control scheme for fractional resampler systems

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Publication number Priority date Publication date Assignee Title
US5023825A (en) * 1989-07-14 1991-06-11 Tektronix, Inc. Coefficient reduction in a low ratio sampling rate converter
US5351087A (en) * 1990-06-01 1994-09-27 Thomson Consumer Electronics, Inc. Two stage interpolation system
US5182633A (en) * 1991-04-12 1993-01-26 Abekas Video Systems, Inc. Video sample rate converter
US5835160A (en) * 1995-09-13 1998-11-10 Oak Technology, Inc. Sampling rate conversion using digital differential analyzers
US5808924A (en) * 1996-07-08 1998-09-15 Boeing North American, Inc. Decimating IIR filter

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6600495B1 (en) 2000-01-10 2003-07-29 Koninklijke Philips Electronics N.V. Image interpolation and decimation using a continuously variable delay filter and combined with a polyphase filter
WO2002096100A1 (en) * 2001-05-17 2002-11-28 Koninklijke Philips Electronics N.V. Tv receiver, image display apparatus, tv-system and method for displaying an image
US7190408B2 (en) 2001-05-17 2007-03-13 Koninklijke Philips Electronics N.V. TV-receiver, image display apparatus, TV-system and method for displaying an image
FR2858891A1 (fr) * 2003-08-11 2005-02-18 St Microelectronics Sa Convertisseur de taux d'echantillonnage a augmentation ou diminution du taux d'echantilonnage
US7127651B2 (en) 2003-08-11 2006-10-24 Stmicroelectronics S.A. Sampling rate converter for both oversampling and undersampling operation
EP1768397A3 (en) * 2005-09-15 2008-10-01 Samsung Electronics Co., Ltd. Video Processing Apparatus and Method

Also Published As

Publication number Publication date
EP0870364B1 (en) 2001-12-05
JP2000504520A (ja) 2000-04-11
US5892695A (en) 1999-04-06
KR100475201B1 (ko) 2005-05-24
EP0870364A2 (en) 1998-10-14
KR19990076998A (ko) 1999-10-25
DE69708841D1 (de) 2002-01-17
DE69708841T2 (de) 2002-08-22
JP4356819B2 (ja) 2009-11-04
WO1998019396A3 (en) 1998-06-25

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