WO1998009329A1 - Resin-sealed semiconductor device and method of manufacturing the same - Google Patents

Resin-sealed semiconductor device and method of manufacturing the same Download PDF

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Publication number
WO1998009329A1
WO1998009329A1 PCT/JP1996/002418 JP9602418W WO9809329A1 WO 1998009329 A1 WO1998009329 A1 WO 1998009329A1 JP 9602418 W JP9602418 W JP 9602418W WO 9809329 A1 WO9809329 A1 WO 9809329A1
Authority
WO
WIPO (PCT)
Prior art keywords
resin
die pad
semiconductor chip
semiconductor device
chip
Prior art date
Application number
PCT/JP1996/002418
Other languages
French (fr)
Japanese (ja)
Inventor
Yoshinori Miyaki
Shunji Koike
Hiromichi Suzuki
Takafumi Nishita
Kazunari Suzuki
Kunihiko Nishi
Kunihiro Tsubosaki
Original Assignee
Hitachi, Ltd.
Hitachi Microcomputer System, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd., Hitachi Microcomputer System, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1996/002418 priority Critical patent/WO1998009329A1/en
Publication of WO1998009329A1 publication Critical patent/WO1998009329A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
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    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
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    • H01L2924/181Encapsulation

Definitions

  • the present invention relates to a resin-encapsulated semiconductor device, and more particularly to a resin-encapsulated semiconductor device in which a resin encapsulant for encapsulating a semiconductor chip mounted on a die pad is formed by transfer molding. It relates to technology that is effective when applied to semiconductor devices. Background art
  • a resin-sealed semiconductor device there is a resin-sealed semiconductor device in which a semiconductor chip mounted on a chip mounting surface of a die pad is sealed with a resin-sealed body.
  • a semiconductor chip is mounted on a chip mounting surface of a die pad supported on a frame of a lead frame via a support lead, and thereafter, the semiconductor chip is disposed on a main surface of the semiconductor chip.
  • the external terminal (bonding pad) is electrically connected to a part of the inner lead of the lead supported by the frame of the lead frame with a bonding wire, and then the inner lead of the support lead, die pad, semiconductor chip, and lead is connected.
  • a part and a bonding wire and the like are sealed with a resin sealing body, and thereafter, the support lead and the outer part of the lead are cut from the frame of the lead frame, and then the outer part of the lead is formed into a predetermined shape. It is formed by molding into
  • the lead frame is formed of, for example, iron (Fe) -nickel (Ni) -based alloy or copper (Cu) or a copper-based alloy.
  • the resin sealing The body is made of, for example, an epoxy resin.
  • the resin sealing body is formed by a transfer mold method suitable for mass production. The transfer molding method uses a mold having a pot, a runner, an inflow gate, a cavity, and the like, and is resin-encapsulated with a resin injected into the cavity through the runner and the inflow gate from the pot. It is a method of forming the body.
  • the die pad is formed with an outer dimension larger than the outer dimension of the semiconductor chip, moisture contained in the resin of the resin-sealed body easily accumulates on the back surface of the die pad. . For this reason, the moisture accumulated on the back surface of the die pad is used for the heat during the temperature cycle test, which is an environmental test after the completion of the resin-encapsulated semiconductor device, and the resin-encapsulated semiconductor device is mounted on the mounting surface of the mounting board. There is a problem that the resin expands and vaporizes due to the heat generated during mounting, causing cracks (resin cracks) in the resin sealing body.
  • the present inventors have studied the resin-sealed semiconductor device having a die pad formed with an outer size smaller than the outer size of the semiconductor chip, and found the following problems.
  • the length of the support lead for supporting the die pad becomes longer. Vertical fluctuations of the die pad caused by the flow of resin injected under pressure into the cavity become severe.
  • the thickness of the resin seal is large, Since the thickness of the resin on the main surface of the chip and the thickness of the resin on the back surface of the semiconductor chip are large, there is no problem that the semiconductor chip, bonding wires, die pads, etc. are exposed from the resin sealing body. When the thickness of the resin sealing body is 1 mm or less, the thickness of the resin on the main surface of the semiconductor chip and the thickness of the resin on the back surface of the semiconductor chip become thin. Causes the semiconductor chip, bonding wire, die pad, etc. to be exposed.
  • a resin-encapsulated semiconductor device having a die pad formed with an external dimension smaller than the external dimension of the semiconductor chip the thickness of the resin-encapsulated body cannot be reduced. I can't.
  • a resin-encapsulated semiconductor device mounted on a small and lightweight device such as an IC card ( ⁇ integrated circuit card)
  • an LQFP (ow profile) having a resin encapsulant thickness of 1.4 [mm] is used.
  • a Q_uad Hlat F ⁇ ackag e) structure and a TQFP ⁇ hin Q_uad Fllat package) structure with a resin encapsulant thickness of about 1 [mm] have been developed. There is a demand for the development of a resin-encapsulated semiconductor device with a smaller thickness.
  • An object of the present invention is to provide a technique capable of reducing the thickness of a resin-encapsulated semiconductor device.
  • Another object of the present invention is to provide a technique capable of increasing the yield in the manufacturing process of a resin-sealed semiconductor device.
  • a semiconductor chip (2) a semiconductor chip, a die pad on which the semiconductor chip is mounted, a support lead for supporting the die pad, and a resin sealing body for sealing the semiconductor chip, wherein the die pad is the semiconductor
  • a method for manufacturing a resin-encapsulated semiconductor device wherein the external dimensions are smaller than the external dimensions of a chip, and the resin-encapsulated body is formed by a transfer molding method. Forming the resin-sealed body while supporting the back surface of the molded body with the inner wall surface of the cavity of the mold.
  • the back surface of the die pad can be supported by the inner wall surface of the cavity of the molding die or an ejector pin. Therefore, the vertical fluctuation of the die pad caused by the flow of the resin injected into the cavity of the mold can be suppressed.
  • the thickness of the resin sealing body is set to 1 [mm] or less, it is possible to prevent a problem that a semiconductor chip, a bonding wire, and the like are exposed from the resin sealing body. Thus, the thickness of the resin-encapsulated semiconductor device can be reduced.
  • the length of the moisture intrusion path from the exposed area of the die pad to the main surface of the semiconductor chip can be lengthened by an amount corresponding to the distance from the die pad to the side surface of the semiconductor chip. Even with a structure that is exposed from one surface of the sealing body, the moisture resistance of the resin-sealed semiconductor device can be ensured.
  • the vertical fluctuation of the die pad caused by the flow of the resin injected under pressure into the cavity of the mold can be suppressed.
  • the flow of the resin and the flow of the resin on the back surface of the semiconductor chip are improved.
  • FIG. 1 is a plan view of a resin-sealed semiconductor device according to a first embodiment of the present invention in a state where an upper portion of a resin-sealed body is removed.
  • FIG. 2 is a cross-sectional view taken along a line AA shown in FIG.
  • FIG. 3 is a sectional view taken along the line BB shown in FIG.
  • FIG. 4 is an enlarged sectional view of a main part of FIG.
  • FIG. 5 is a plan view of a lead frame used in a manufacturing process of the resin-encapsulated semiconductor device.
  • FIG. 6 is a fragmentary cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
  • FIG. 7 is a fragmentary cross-sectional view for describing the method for manufacturing the resin-encapsulated semiconductor device.
  • FIG. 8 is a plan view of another lead frame used in the manufacturing process of the resin-sealed semiconductor device.
  • FIG. 9 is a cross-sectional view showing a modification of the resin-encapsulated semiconductor device.
  • FIG. 10 is a cross-sectional view of the resin-encapsulated semiconductor device according to Embodiment 2 of the present invention. It is a top view in the state where it was removed.
  • FIG. 11 is a cross-sectional view taken along a line C-C shown in FIG. 10
  • FIG. 12 is a cross-sectional view taken along a line D-D shown in FIG.
  • FIG. 13 is an enlarged sectional view of a main part of FIG.
  • FIG. 14 is a plan view of a lead frame used in a manufacturing process of the resin-sealed semiconductor device.
  • FIG. 15 is a fragmentary cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
  • FIG. 16 is a fragmentary cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
  • FIG. 17 is a plan view of the resin-sealed semiconductor device according to the third embodiment of the present invention in a state where an upper portion of a resin-sealed body is removed.
  • FIG. 18 is a cross-sectional view taken along line EE shown in FIG. 17, and FIG. 19 is a cross-sectional view taken along line FF shown in FIG.
  • FIG. 20 is a plan view of a lead frame used in a manufacturing process of the resin-sealed semiconductor device.
  • FIG. 21 is a plan view of another lead frame used in the manufacturing process of the resin-sealed semiconductor device.
  • a semiconductor chip 2 is mounted on a chip mounting surface of a die pad 3A.
  • the planar shape of the semiconductor chip 2 is, for example, a square shape having an outer dimension of 9 [mm] ⁇ 9 [mm].
  • the semiconductor chip 2 has a structure mainly composed of, for example, a semiconductor substrate made of single crystal silicon and a wiring layer formed on the main surface thereof.
  • the semiconductor chip 2 includes, for example, a logic circuit system or a mixed circuit system in which a logic circuit system and a storage circuit system are mixed. Further, on the main surface of the semiconductor chip 2, a plurality of external terminals (bonding pads) 2A are arranged along each side of the main surface. Each of the plurality of external terminals 2A is formed in the uppermost wiring layer of the wiring layers of the semiconductor chip 2, and is formed of, for example, an aluminum (A 1) film or an aluminum alloy film.
  • each inner part 3C1 of the plurality of leads 3C is electrically connected to each of the plurality of external terminals 2A arranged on the main surface of the semiconductor chip 2 via bonding wires 5. ing.
  • bonding wire 5 for example, a gold (Au) wire is used.
  • Au gold
  • bonding wire 5 for example, an insulating resin is applied to the surface of an aluminum (A1) wire, a copper (Cu) wire, or a metal wire.
  • a covered wire or the like may be used.
  • the bonding wire 5 is connected by, for example, a bonding method using ultrasonic vibration in combination with thermocompression bonding.
  • the die pad 3A is integrated with four support leads 3B.
  • Each of the four support leads 3B is mounted on the frame of the lead frame in the state of the lead frame. I support A.
  • Each of the four support leads 3B is arranged at a position where an X-shape is formed at the intersection of the die pad 3A.
  • the width dimension of the support lead 3B is set to, for example, 0.4 [mm].
  • the semiconductor chip 2, the die pad 3A, the support lead 3B, the inner part 3C1 of the lead 3C1, the bonding wire 5, and the like are sealed with a resin sealing body 1 formed by a transfer molding method.
  • the resin sealing body 1 is made of, for example, a biphenyl-based resin or an ortho-cresol novolac-based resin to which a phenol-based curing agent, silicone and filler are added for the purpose of reducing stress. Is formed.
  • the transfer molding method uses a mold with a pot, runner, inflow gate, and cavity, and is resin-encapsulated with resin that is injected into the cavity from the pot through the runner and the inflow gate. It is a method of forming a body.
  • the planar shape of the resin sealing body 1 is, for example, a square shape having an outer dimension of 14 [mm] X 14 [mm].
  • Outer sides 3C2 of the leads 3C are arranged outside each side of the resin sealing body 1.
  • Each outer portion 3C2 of the plurality of leads 3C is arranged along each side of the resin sealing body 1, and is formed, for example, in a gull wing shape. That is, the resin-encapsulated semiconductor device of the present embodiment has a QFP (Quad Flat Package) structure.
  • the planar shape of the die path 3A is, for example, a circular shape having an outer dimension of 3 [mm] ⁇ . That is, the die pad 3 of the present embodiment is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2.
  • the die pad 3A does not exist outside the outer periphery of the semiconductor chip 2 and the middle part of the bonding wire 5 hangs down. However, since the die pad 3A and the bonding wire 5 do not come into contact with each other, the semiconductor chips 2 having different external dimensions can be mounted.
  • the resin-sealed semiconductor device of the present embodiment has a structure in which the entire region on the back surface of the die pad 3A is exposed from the lower surface of the resin-sealed body 1. Exposure of the entire area of the rear surface of die pad 3A is achieved by supporting the rear surface of die pad 3A with the inner wall surface of the mold die cavity when resin molding 1 is formed by transfer molding. You.
  • the central region of the back surface facing the main surface of the semiconductor chip 1 is bonded and fixed to the chip tower mounting surface of the die pad 3A with an adhesive 4 interposed therebetween, and the peripheral region of the back surface is formed of the resin sealing body 1. Covered with resin.
  • the adhesive 4 is made of, for example, an epoxy silver (Ag) paste material.
  • the adhesive 4 is applied to the chip tower mounting surface of the die pad 3A by a multi-point application method in the process of manufacturing the resin-encapsulated semiconductor device.
  • the support lead 3B has a lead portion 3B1 sealed with a resin sealing body 1 and a surface (back) from the lower surface which is one surface of the resin sealing body 1. And the exposed lead portion 3B2.
  • the lead portion 3B1 is located at the same position as the inner part 3C1 of the lead 3C shown in FIG. 2 in the thickness direction (vertical direction), and the lead portion 3B2 is In the direction (vertical direction), it is located at the same position as the position of the die pad 3A. That is, in the resin-encapsulated semiconductor device of the present embodiment, the chip mounting surface of the die pad 3A is lowered in the plate thickness direction from the upper surface (bonding surface) of the inner part 3C1 of the lead 3C. As shown in FIG.
  • the thickness dimension A of the semiconductor chip 2 is set to, for example, 0.2 [mm].
  • the thickness B of the resin sealing body 1 is set to, for example, 0.5 [mm].
  • the thickness B 1 of the resin on the main surface of the semiconductor chip 2 is set to, for example, 0.16 [mm]
  • the resin on the back surface of the semiconductor chip 2 is set to 0.16 [mm].
  • the thickness dimension B2 is set to, for example, 0.14 [mm].
  • the thickness C of the die pad 3A is set to, for example, 0.13 [mm].
  • the height D of the resin-encapsulated semiconductor device is set to, for example, 0.6 to 0.6. 7 [mm] is set.
  • the resin-encapsulated semiconductor device having the above-described configuration is the same as that shown in FIG. It is formed by a manufacturing process using frame 3.
  • a die pad 3A, four support leads 3B, a plurality of leads 3C, and the like are arranged in an area defined by a frame 3E.
  • the die pad 3A is supported by the frame 3E via four support leads 3B.
  • Each of the plurality of leads 3C is supported by a frame 3E, and is connected to each other by a dam (bar) 3D.
  • Each of the die pad 3A, the support lead 3B, and the lead 3C is integrated with the frame 3E.
  • the lead 3C includes an inner part 3C1 sealed with the resin sealing body 1, and an outer part 3C2 molded into a predetermined shape.
  • the support lead 3B has a lead portion 3B1 located at the same position as the inner portion 3C1 of the lead 3C in the plate thickness direction, and a lead portion 3B inner portion 3C in the plate thickness direction. And a lead portion 3B2 located at a position lower than C1.
  • the lead frame 3 is formed of, for example, an iron (Fe) -nickel (Ni) -based alloy, copper (Cu), or a copper-based alloy.
  • the lead frame 3 is formed by subjecting a flat plate material to etching or pressing, forming a predetermined pattern, and then pressing the supporting lead 3B.
  • the length of the support lead 3B becomes longer as the outer dimensions of the die pad 3A become smaller, the length of the die pad 3A is easily changed in the vertical direction. Further, since the width of the support lead 3B becomes narrower as the number of pins is increased, the die pad 3A is liable to fluctuate in the vertical direction. In addition, the thickness of the support lead 3B is reduced as the thickness of the resin sealing body 1 is reduced, so that the die pad 3A is liable to change in the vertical direction.
  • a method for manufacturing the resin-encapsulated semiconductor device will be described. First, a lead frame 3 shown in FIG. 5 is prepared.
  • an adhesive 4 is applied to the chip mounting surface of the die pad 3A of the lead frame 3 by a multi-point coating method.
  • the semiconductor chip 2 is mounted on the chip tower surface of the die pad 3A with the adhesive 4 interposed therebetween.
  • the semiconductor chip 2 is bonded and fixed to the chip mounting surface of the die pad 3A with an adhesive 4 therebetween.
  • the external terminals 2 A of the semiconductor chip 2 and the inner portions 3 C 1 of the leads 3 C of the lead frame 3 are electrically connected by bonding wires 5.
  • the lead frame 3 is placed between the upper mold 1 OA and the lower mold 10 B of the mold 10, and the mold 10 is formed.
  • the inner part 3C1 of the semiconductor chip 2, die pad 3A, support lead 3B, lead 3C, and bonder In addition to placing the mounting wire 5 etc., the back surface of the die pad 3 A is brought into contact with the inner wall surface 11 A of the cavity 11, and the inner surface 11 A of the cavity 11 is used to contact the back surface of the die pad 3 A.
  • the inner part 3C1 of the semiconductor chip 2 die pad 3A
  • support lead 3B lead 3C
  • bonder In addition to placing the mounting wire 5 etc., the back surface of the die pad 3 A is brought into contact with the inner wall surface 11 A of the cavity 11, and the inner surface 11 A of the cavity 11 is used to contact the back surface of the die pad 3 A.
  • the lower surface (back surface) of the lead portion 3B2 of the support lead 3B also comes into contact with the inner wall surface 11A of the cavity 11 and is supported by the inner wall surface 11A of the cavity 11.
  • the back surface of the die pad 3A is pressed against the inner wall surface 11A of the cavity 11 by the elastic force of the support lead 3B.
  • the lead portion 3B2 of the support lead 3B is pressed in the same manner.
  • the mold 10 has a cavity (not shown), a runner (not shown), and an inflow gate 12 in addition to the cavity 11.
  • the inflow gate 1 2 fills the cavity 11 with resin through the upper and lower surfaces of the lead frame 3. It has a structure that
  • a resin is pressure-injected into the cavity 11 from the pot of the mold 10 through the runner and the inflow gate 12, and the back surface of the die pad 3 A is exposed to the inner wall surface 11 A of the cavity 11.
  • the resin sealing body 1 is formed while supporting with.
  • the flow is caused by the flow of the resin injected into the cavity 11 of the mold 10 by pressure. Vertical fluctuation of the die pad 3A is suppressed.
  • the upward and downward fluctuations of the die pad caused by the flow of the resin injected under pressure into the cavity of the molding die are suppressed, so that the flow of the resin on the main surface of the semiconductor chip 2 and the flow of the semiconductor chip The flow of the resin on the back surface of 2 is improved. Also, since the back surface of the die pad 3A and the back surface of the lead portion 3B2 of the support lead 3B are in contact with the inner wall surface 11A of the cavity 11, these back surfaces are resin-sealed. It is exposed from the lower surface which is one surface of the body 1.
  • the back surface of the die pad 3A and the back surface of the lead portion 3B1 of the support lead 3B are pressed against the inner wall surface 11A of the cavity 11 by the elastic force of the support lead 3B.
  • the resin does not flow around the back surface of 3A and the back surface of the lead 3B1 of the support lead 3B.
  • the semiconductor chip 2, the lead portion 3B1 of the support lead 3B, and the inner part 3 of the lead 3C, excluding the die portion 3A and the lead portion 3B2 of the support lead 3B, are used.
  • C 1 and the bonding wires 5 are sealed with the resin sealing body 1.
  • the support lead 3B and the lead 3C are cut from the frame 3E of the lead frame 3, and then, the outer portion 3C2 of the lead 3C is formed into a gulling shape, whereby the first The resin-encapsulated semiconductor device shown in FIGS. 2, 3 and 3 is almost completed.
  • the following operational effects can be obtained.
  • the die pad 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and the resin sealing body 1 is formed by a transfer molding method.
  • the resin sealing body 1 is formed by a transfer molding method. Dino, when forming. Since the back surface of the pad 3 A can be supported by the inner wall surface 11 A of the mold 11 of the mold 11, the flow of the resin injected into the cavity 11 of the mold 10 is pressurized.
  • the fluctuation of the die pad 3A in the vertical direction caused by this can be suppressed.
  • the thickness of the resin sealing body 1 is set to 1 [mm] or less, the problem that the semiconductor chip 2 and the bonding wires 5 are exposed from the resin sealing body 1 can be prevented.
  • the thickness of the semiconductor device can be reduced.
  • a part of the rear surface of the semiconductor chip 2 is fixed to the chip mounting surface of the die pad 3A with an adhesive 4 interposed therebetween, and the other region of the rear surface of the semiconductor chip is By covering with the resin of the sealing body 1, moisture that reaches the main surface of the semiconductor chip 2 from the exposed area of the die pad 3 A by an amount corresponding to the distance from the die pad 3 A to the side surface of the semiconductor chip 2. Since the path of the path can be lengthened, the moisture resistance of the resin-sealed-type semiconductor device is ensured even if the back surface of the die pad 3A is configured to be exposed from one surface of the resin-sealed body 1. can do.
  • the die pad 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2
  • the resin sealing body 1 is formed by a transfer molding method.
  • the manufacturing method of the above comprising a step of forming the resin sealing body 1 while supporting the back surface of the die pad 3A on the inner wall surface 11A of the cavity 11 of the mold 10 Since the vertical fluctuation of the die pad caused by the flow of the resin pressurized into the cavity 11 of the mold 10 can be suppressed, the flow of the resin on the main surface of the semiconductor chip 2 can be suppressed. And resin on the back of semiconductor chip 2 Flow is improved. As a result, the occurrence of voids in the resin-sealed body 1 can be prevented, so that the yield in the manufacturing process of the resin-sealed semiconductor device can be increased.
  • the resin-sealed semiconductor device may be formed by a manufacturing process using the lead frame 3 shown in FIG.
  • the inner part 3C1 of the lead 3C and the inner part 3C1 of the other lead 3C are connected to each other with the insulating film 3F, and the inner part of the lead 3C is also connected.
  • 3C 1 and the lead portion 3B 1 of the support lead 3B are connected to each other by an insulating film 3F.
  • the resin-encapsulated semiconductor device may have a structure in which the back surface of the die pad 3A is located outside one surface of the resin encapsulant 1. In this case, the thickness of the resin sealing body 1 can be reduced by an amount corresponding to the distance between the back surface of the die pad 3A and one surface of the resin sealing body 1.
  • the resin-encapsulated semiconductor device has a structure in which the back surface of the lead portion 3B2 of the support lead 3B is positioned outside one surface of the resin-encapsulated body 1. May be configured.
  • the thickness of the support lead 3B can be increased by an amount corresponding to the distance between the back surface of the lead portion 3B2 of the support lead 3B and one surface of the resin sealing body 1. Since the mechanical strength of 3B can be increased, when the resin sealing body 1 is formed by the trans-famould method, the vertical fluctuation of the die pad 3A can be suppressed.
  • a semiconductor chip 2 is mounted on a chip stimulating surface of a die pad 3A.
  • the planar shape of the semiconductor chip 2 is, for example, a square shape having an outer dimension of 9 [mm] ⁇ 9 [mm].
  • a plurality of external terminals (bonding pads) 2A are arranged along each side of the main surface.
  • each inner part 3 C 1 of the plurality of leads 3 C is electrically connected to each of the plurality of external terminals 2 A arranged on the main surface of the semiconductor chip 2 via a bonding wire 5. It is connected.
  • the die pad 3A is integrated with four support leads 3B. Each of the four support leads 3B is in a state of a lead frame.
  • the die pad 3A is mounted on a frame of the lead frame. I support it.
  • Each of the four support leads 3B is arranged at a position where an X-shape is formed at the intersection of the die pad 3A.
  • the semiconductor chip 2, the die pad 3A, the inner part 3C1 of the lead 3C, the bonding wire, and the like are sealed by a resin sealing body 1 formed by a transfer molding method.
  • the planar shape of the resin sealing body 1 is, for example, a square shape having an outer dimension of 14 [mm] ⁇ 14 [mm].
  • Outer sides 3C2 of the leads 3C are arranged outside each side of the resin sealing body 1.
  • Each outer portion 3C2 of the plurality of leads 3C is arranged along each side of the resin sealing body 1, and is formed, for example, in a gull wing shape.
  • the planar shape of the die pad 3A is X-shaped.
  • the dipack 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and is formed with a plane area smaller than the plane area of the semiconductor chip 2.
  • the die pad 3A is formed, for example, with an X-shaped outer dimension having an outermost plane area of 5 [mm] X 5 [mm].
  • the back surface of the die pad 3 A facing the chip tower surface is located inside the lower surface which is one surface of the resin sealing body 1.
  • the central region on the back surface of the die pad 3A is exposed from the lower surface of the resin sealing body 1, and the peripheral region on the back surface of the die pad 3A is covered with the resin of the resin sealing body 1. That is, the resin-encapsulated semiconductor device of the present embodiment has The area is configured to be exposed from the lower surface of the resin sealing body 1. Exposure of the central region of the back surface of the dipad 3A is achieved by supporting the back surface of the die pad 3A with the ejector pins of the mold when the resin sealing body 1 is formed by the transfer molding method. .
  • the central region of the back surface facing the main surface of the semiconductor chip 2 is bonded and fixed to the chip tower mounting surface of the die pad 3A with an adhesive 4 interposed therebetween, and the peripheral region of the back surface is formed of the resin sealing body 1. Covered with resin.
  • the support lead 3B is composed of a lead 3B1 sealed with a resin sealing body 1 and a front surface (back surface) from a lower surface which is one surface of the resin sealing body 1. And the exposed lead portion 3B2.
  • the lead portion 3B1 is located at the same position as the inner part 3C1 of the lead 3C shown in FIG. 11 in the plate thickness direction (vertical direction), and the lead portion 3B2 is In the thickness direction (vertical direction), it is located at the same position as the position of the die pad 3A. That is, in the resin-encapsulated semiconductor device of the present embodiment, the chip mounting surface of the dipad 3A is lowered in the plate thickness direction from the upper surface (bonding surface) of the inner part 3C1 of the lead 3C.
  • the structure as shown in the first 3 Figure t is configured with a thickness dimension a of the semiconductor chip 2 is set to, for example, 0. 2 [mm].
  • the thickness dimension B of the resin sealing body 1 is set to, for example, 0.5 [mm].
  • the thickness B 1 of the resin on the main surface of the semiconductor chip 2 is set to, for example, 0.15 [mm]
  • the thickness of the resin on the back surface of the semiconductor chip 2 is set.
  • the dimension B2 is set to, for example, 0.15 [mm].
  • the thickness C of the die pad 3A is set to, for example, 0.11 [mm].
  • the height D of the resin-sealed semiconductor device is set to, for example, 0.6 to 0.7 [mm].
  • the resin-encapsulated semiconductor device thus configured is formed by a manufacturing process using a lead frame 3 shown in FIG.
  • a method for manufacturing the resin-encapsulated semiconductor device will be described. First, a lead frame 3 shown in FIG. 14 is prepared.
  • an adhesive 4 is applied to the chip mounting surface of the die pad 3A of the lead frame 3 by a multi-point coating method.
  • the semiconductor chip 2 is mounted on the chip mounting surface of the die pad 3A with the adhesive 4 interposed therebetween.
  • the semiconductor chip 2 is bonded and fixed to the chip mounting surface of the die pad 3A via the adhesive 4.
  • the external terminals 2 A of the semiconductor chip 2 and the inner portions 3 C 1 of the leads 3 C of the lead frame 3 are electrically connected by bonding wires 5.
  • the lead frame 3 was placed between the upper mold 10 A and the lower mold 10 B of the mold 10, and Inside the cavity 11 formed by the upper mold 10 A and the lower mold 10 B of the mold 10, the semiconductor chip 2, the die pad 3 A, the support lead 3 B, and the inner part of the lead 3 C 3 C 1
  • the center area of the back surface of the die pad 3A is brought into contact with the tip surface of the ejector pin 13 and the ejector pin 13 supports the center area of the back surface of the die pad 3A.
  • the back surface of the die pad 3A is pressed against the tip surface of the ejector pin 13 by the elastic force of the holding lead 3B.
  • the inflow gate 12 of the mold 10 is configured to fill the cavity 11 with resin through the upper and lower surfaces of the lead frame 3.
  • the ejector pins 13 are for removing the resin sealing body 1 from the cavity 11 after forming the resin sealing mold 1.
  • resin is injected under pressure into the cavity 11 from the pot of the mold 10 through the runner and the inflow gate 12, and the resin is sealed while supporting the back surface of the die pad 3 A with the ejector pins 13.
  • the back surface of the die pad 3A is supported by the inner wall surface 11A of the cavity 11, so that the die pad 3A is pressurized and injected into the cavity 11 of the molding die 10.
  • the upward / downward fluctuation of the die pad 3A caused by the flow of the resin is suppressed.
  • the central area of the rear surface of the die pad 3A is in contact with the tip surface of the indicator pin 13, the central area of the rear surface of the die pad 3 A is from the lower surface which is one surface of the resin sealing body 1. Will be exposed.
  • the center area of the rear surface of the die pad 3A is pressed by the elastic force of the support lead 3B against the distal end surface of the L-cut pin 13 so that the center area of the rear surface of the die pad 3A is No resin will flow into the area.
  • the semiconductor chip 2, the die pad 3A, the support lead 3B, the inner part 3C1 of the lead 3C1, the bonding wire 5, etc. are sealed with the resin sealing body 1, and the die pad
  • the central region of the back surface of 3A and the back surface of the lead portion 3B2 of the support lead 3B are exposed from the lower surface which is one surface of the resin sealing body 1.
  • the support lead 3B and the lead 3C are cut from the frame 3E of the lead frame 3, and then the outer portion 3C2 of the lead 3C is formed into a gulling shape, thereby sealing the resin.
  • the semiconductor device is almost completed.
  • a semiconductor chip 2 a die pad 3A on which the semiconductor chip 2 is mounted, a support lead 3B holding the die pad 3A, and a resin sealing for sealing the semiconductor chip 2.
  • a resin-sealed semiconductor having a body 1, wherein the die pad 3 A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and wherein the resin-sealed body 1 is formed by a transfer molding method
  • An apparatus wherein a central region of a back surface of the die pad 3A opposite to a chip tower surface is configured to be exposed from one surface of the resin sealing body 1, whereby the resin sealing body 1 is formed.
  • the center area on the back surface of the die pad 3A can be supported by the ejector pins 13 of the mold 10 so that the mold 11 can be supported in the cavity 11 of the mold 10.
  • the flow of resin injected under pressure It is possible to suppress the vertical variation of that Daipa' de 3 A.
  • the thickness of the resin sealing body 1 is set to 1 [mm] or less, a problem in which the semiconductor chip 2 and the bonding wires 5 are exposed from the resin sealing body 1 can be prevented.
  • the thickness of the stop semiconductor device can be reduced.
  • the moisture intrusion path can be further lengthened.
  • a method for manufacturing the device comprising the step of forming the resin sealing body 1 while supporting the back surface of the die pad 3A with the ejector pins 13 of the mold 10 to obtain the mold 10 Since the vertical fluctuation of the die pad caused by the flow of the resin injected under pressure into the cavity 1 can be suppressed, the flow of the resin on the main surface of the semiconductor chip 2 and the back surface of the semiconductor chip 2 can be suppressed. Good flow of resin It made. As a result, it is possible to prevent the occurrence of voids that occur in the resin-sealed body 1, thereby increasing the yield in the manufacturing process of the resin-sealed semiconductor device.
  • a protrusion is provided on the inner wall surface 11A of the cavity 11 of the mold die 10, and the protrusion supports the central region of the back surface of the die pad 3A. May be.
  • the semiconductor chip 2 is mounted on the chip tower of the die pad 3A.
  • the semiconductor chip 2 has a structure mainly composed of, for example, a semiconductor substrate made of single crystal silicon and a wiring layer formed on the main surface thereof.
  • the semiconductor chip 2 in this case has a thermal expansion coefficient of about 3 ⁇ 10 [1 / ° C1].
  • the planar shape of the semiconductor chip 2 is, for example, 9 [mm] X 9 [mm] It is formed in a square shape having the external dimensions of.
  • a plurality of external terminals (bonding pads) 2A arranged along each side of the main surface are arranged.
  • each inner part 3 C 1 of the plurality of leads 3 is electrically connected to each of a plurality of external terminals 2 A arranged on the main surface of the semiconductor chip 2 via bonding wires 5. ing.
  • Each of the four support leads 3B supports the die pad 3A on the lead frame in the state of the lead frame.
  • Each of the four support leads 3B is arranged at a position where the X-shaped shape is formed.
  • the semiconductor chip 2, the die pad 3A, the support lead 3B, the inner part 3C1 of the lead 3C1, the bonding wire 5, and the like are sealed with a resin sealing body 1 formed by a transfer molding method.
  • the resin sealing body 1 is formed of, for example, a biphenyl-based resin or an ortho-cresol novolac-based resin to which a phenol-based curing agent, silicone, filler, and the like are added for the purpose of reducing stress.
  • Resin sealing body 1 in this case has a 1 3 X 1 0- 6 [1 / in] about the thermal expansion coefficient.
  • the planar shape of the resin sealing body 1 is, for example, a square shape having an outer dimension of 14 [mm] X 14 [mm].
  • Outer sides 3C2 of the leads 3C are arranged outside each side of the resin sealing body 1.
  • the respective outer portions 3C2 of the plurality of leads 3C are arranged along each side of the resin sealing body 1 and formed, for example, in a gull-wing shape.
  • the planar shape of the die pad 3A is X-shaped. Dino. 'The source 3A is composed of four parts 3A1, and the width of each of the four parts 3A1 is set to, for example, 1 [mm].
  • the die pad 3 A is formed with a plane area smaller than the plane area of the semiconductor chip 2.
  • the resin-sealed semiconductor device of the present embodiment has a structure in which the entire region on the back surface of the die pad 3A is exposed from the lower surface of the resin-sealed body 1. Exposing the entire area of the back surface of the die pad 3A is to support the back surface of the die pad 3A with the inner wall surface of the mold mold cavity when the resin sealing body 1 is formed by the transfer molding method. Is achieved. As shown in FIG.
  • the support lead 3B includes a lead portion 3B1 and a lead portion 3B2.
  • the lead portion 3B1 is located at the same position as the inner part 3C1 of the lead 3C shown in FIG. 18 in the thickness direction, and the lead portion 3B2 is the die pad in the thickness direction. Is located in the same position as C3A. That is, in the resin-encapsulated semiconductor device of the present embodiment, the chip tower mounting surface of the die pad 3A is lowered in the plate thickness direction from the upper surface (bonding surface) of the inner part 3C1 of the lead 3C. It has a structured structure.
  • the adhesive 4 is, for example, an epoxy silver (Ag) paste material. Is formed.
  • the adhesive 4 is applied to the chip tower mounting surface of the die pad 3A by a multi-point application method.
  • the diagonal region on the back surface of the semiconductor chip 1 is bonded and fixed with the adhesive 4 applied to the entire region of the chip pad mounting surface of the die pad 3A.
  • the resin-encapsulated semiconductor device thus configured is formed by a manufacturing process using a lead frame 3 shown in FIG.
  • the lead frame 3 is made of, for example, copper (Cu) having a thermal expansion coefficient of about 17 ⁇ 10, [1 / ° C].
  • a resin-sealed semiconductor device in which the semiconductor chip 2 is mounted on the chip mounting surface of the X-shaped die pad 3 A and the semiconductor chip 2 is sealed with the resin sealing body 1.
  • the semiconductor chip 2 is bonded and fixed with an adhesive 4 applied to the entire area of the chip mounting surface of the die pad 3A, so that the coefficient of thermal expansion between the die pad 3A and the semiconductor chip 2 is increased.
  • X-shape made of copper (Cu) which has a large difference in thermal expansion coefficient from the semiconductor chip 2 because it can disperse the thermal stress caused by the difference in thermal expansion and prevent the semiconductor chip 2 from being damaged by the thermal stress.
  • the semiconductor chip 2 can be mounted on the die pad 3A.
  • the resin-sealed semiconductor device may be formed by a manufacturing process using the lead frame 3 shown in FIG. In this case, the same effect as that of the present embodiment can be obtained.
  • the thickness of the resin-encapsulated semiconductor device can be reduced.
  • the yield of the resin-encapsulated semiconductor device can be improved.

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Abstract

A resin-sealed semiconductor device comprising a semiconductor chip, a die pad on which the semiconductor chip is mounted, support leads supporting the die pad, and a resin member sealing the semiconductor chip, wherein the die pad is smaller than the semiconductor chip, and the resin seal member is formed by a transfer molding method. The lower surface of the die pad, which is on the opposite side of a chip mounting surface, is exposed at the lower surface of the resin seal member. Therefore, when the resin seal member is formed by a transfer molding method, the lower surface of the die pad can be supported on an inner surface of a cavity of a metal mold or an injector pin. This prevents the vertical displacement of the die pad, which is caused by the flow of a resin injected under pressure into the cavity of the metal mold.

Description

明 細 書 樹脂封止型半導体装置及びその製造方法 技術分野  Description Resin-sealed semiconductor device and method of manufacturing the same
本発明は、 樹脂封止型半導体装置に関し、 特に、 ダイパッ ド (die pad )に塔載された半導体チップを封止する樹脂封止体がトランスファ モールド(transfer molding)法で形成される樹脂封止型半導体装置に 適用して有効な技術に関するものである。 背景技術  The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a resin-encapsulated semiconductor device in which a resin encapsulant for encapsulating a semiconductor chip mounted on a die pad is formed by transfer molding. It relates to technology that is effective when applied to semiconductor devices. Background art
樹脂封止型半導体装置と して、 ダイパッ ドのチップ塔載面に塔載さ れた半導体チップを樹脂封止体で封止する樹脂封止型半導体装置があ る。 この樹脂封止型半導体装置は、 リードフ レームの枠体に支持リー ドを介して支持されたダイパッ ドのチップ塔載面に半導体チップを塔 載し、 その後、 前記半導体チップの主面に配置された外部端子 (ボン デイングパッ ド) と前記リードフ レームの枠体に支持されたリードの インナ一部とをボンディングワイヤで電気的に接続し、 その後、 前記 支持リード、 ダイパッ ド、 半導体チップ、 リードのインナ一部及びボ ンデイングワイヤ等を樹脂封止体で封止し、 その後、 前記リードフレ —ムの枠体から支持リード及びリードのアウター部を切断し、 その後、 前記リードのアウター部を所定の形状に成形することによ リ形成され る。  As a resin-sealed semiconductor device, there is a resin-sealed semiconductor device in which a semiconductor chip mounted on a chip mounting surface of a die pad is sealed with a resin-sealed body. In this resin-encapsulated semiconductor device, a semiconductor chip is mounted on a chip mounting surface of a die pad supported on a frame of a lead frame via a support lead, and thereafter, the semiconductor chip is disposed on a main surface of the semiconductor chip. The external terminal (bonding pad) is electrically connected to a part of the inner lead of the lead supported by the frame of the lead frame with a bonding wire, and then the inner lead of the support lead, die pad, semiconductor chip, and lead is connected. A part and a bonding wire and the like are sealed with a resin sealing body, and thereafter, the support lead and the outer part of the lead are cut from the frame of the lead frame, and then the outer part of the lead is formed into a predetermined shape. It is formed by molding into
前記リードフ レームは、 例えば、 鉄(F e )—ニッケル(N i )系の合 金又は銅(C u )若しくは銅系の合金で形成されている。 前記樹脂封止 体は、 例えば、 エポキシ系の樹脂で形成されている。 樹脂封止体は、 大量生産に好適な トランスファモ一ルド法で形成される。 トランスフ ァモールド法は、 ポッ ト、 ランナー、 流入ゲート及びキヤビティ (cav ity)等を有するモールド金型を使用し、 ポッ 卜からランナー及び流入 ゲートを通してキヤ ビティ内に加圧注入された樹脂で樹脂封止体を形 成する方法である。 The lead frame is formed of, for example, iron (Fe) -nickel (Ni) -based alloy or copper (Cu) or a copper-based alloy. The resin sealing The body is made of, for example, an epoxy resin. The resin sealing body is formed by a transfer mold method suitable for mass production. The transfer molding method uses a mold having a pot, a runner, an inflow gate, a cavity, and the like, and is resin-encapsulated with a resin injected into the cavity through the runner and the inflow gate from the pot. It is a method of forming the body.
前記樹脂封止型半導体装置は、 半導体チップの外形寸法よりも大き い外形寸法でダイパッ ドを形成しているので、 樹脂封止体の樹脂に含 まれている水分がダイパッ ドの裏面に溜り易い。 このため、 ダイパッ ドの裏面に溜った水分が、 樹脂封止体型半導体装置の製品完成後の環 境試験である温度サイクル試験時の熱や実装基板の実装面に樹脂封止 型半導体装置を実装する実装時の熱によって気化膨張し、 樹脂封止体 に亀裂 (レジンクラック) が生じる問題があった。  In the resin-encapsulated semiconductor device, since the die pad is formed with an outer dimension larger than the outer dimension of the semiconductor chip, moisture contained in the resin of the resin-sealed body easily accumulates on the back surface of the die pad. . For this reason, the moisture accumulated on the back surface of the die pad is used for the heat during the temperature cycle test, which is an environmental test after the completion of the resin-encapsulated semiconductor device, and the resin-encapsulated semiconductor device is mounted on the mounting surface of the mounting board. There is a problem that the resin expands and vaporizes due to the heat generated during mounting, causing cracks (resin cracks) in the resin sealing body.
そこで、 このような技術的課題を解決する技術が特開昭 6 3 - 2 0 4 7 5 3号公報に開示されてる。 この技術は、 半導体チップの外形寸 法よ りも小さい外形寸法でダイパッ ドを形成し、 樹脂封止体に生じる 亀裂を防止している。  Thus, a technique for solving such a technical problem is disclosed in Japanese Patent Application Laid-Open No. Sho 63-204475. This technology forms a die pad with an external dimension smaller than the external dimensions of the semiconductor chip, and prevents cracks that occur in the resin-sealed body.
しかしながら、 本発明者等は、 半導体チップの外形寸法よりも小さ い外形寸法で形成されたダイパッ ドを有する樹脂封止型半導体装置を 検討した結果、 以下の問題点を見出した。  However, the present inventors have studied the resin-sealed semiconductor device having a die pad formed with an outer size smaller than the outer size of the semiconductor chip, and found the following problems.
半導体チップの外形寸法よりも小さい外形寸法でダイパッ ドを形成 した場合、 ダイパッ ドを支持する支持リードの長さが長くなるので、 樹脂封止体を トランスファモールド法で形成する際、 モールド金型の キヤビティに加圧注入された樹脂の流れによって生じるダイパッ ドの 上下方向の変動が激しくなる。 樹脂封止体の厚が厚い場合、 半導体チ ップの主面上での樹脂の厚さ及び半導体チップの裏面上での樹脂の厚 さが厚いので、 樹脂封止体から半導体チップ、 ボンディ ングワイヤ、 ダイパッド等が露出する不具合は発生しないが、 樹脂封止体の厚さが 1 [ m m ] 以下になると、 半導体チップの主面上での樹脂の厚さ及び 半導体チップの裏面上での樹脂の厚さが薄くなるので、 樹脂封止体か ら半導体チップ、 ボンディングワイヤ、 ダイパッ ド等が露出する不具 合が発生する。 即ち、 半導体チップの外形寸法よ りも小さい外形寸法 で形成されたダイパッ ドを有する樹脂封止型半導体装置においては樹 脂封止体の厚さを薄くすることができないので、 薄型化を図ることが できない。 I Cカード(丄 n tegrated Circuit card ) 等の小型軽量機 器に塔載される樹脂封止型半導体装置においては、 樹脂封止体の厚さ が 1 . 4 [ m m ] 厚の L Q F P ( ow P rofile Q_uad Hlat F^ackag e)構造や、 樹脂封止体の厚さが約 1 [ m m ] 厚の T Q F P ^hin Q_u ad Fllat package)構造のものが開発されているが、 樹脂封止体の厚 さを更に薄く した樹脂封止型半導体装置の開発が望まれている。 If the die pad is formed with an external dimension smaller than the external dimension of the semiconductor chip, the length of the support lead for supporting the die pad becomes longer. Vertical fluctuations of the die pad caused by the flow of resin injected under pressure into the cavity become severe. If the thickness of the resin seal is large, Since the thickness of the resin on the main surface of the chip and the thickness of the resin on the back surface of the semiconductor chip are large, there is no problem that the semiconductor chip, bonding wires, die pads, etc. are exposed from the resin sealing body. When the thickness of the resin sealing body is 1 mm or less, the thickness of the resin on the main surface of the semiconductor chip and the thickness of the resin on the back surface of the semiconductor chip become thin. Causes the semiconductor chip, bonding wire, die pad, etc. to be exposed. That is, in a resin-encapsulated semiconductor device having a die pad formed with an external dimension smaller than the external dimension of the semiconductor chip, the thickness of the resin-encapsulated body cannot be reduced. I can't. In a resin-encapsulated semiconductor device mounted on a small and lightweight device such as an IC card (丄 integrated circuit card), an LQFP (ow profile) having a resin encapsulant thickness of 1.4 [mm] is used. A Q_uad Hlat F ^ ackag e) structure and a TQFP ^ hin Q_uad Fllat package) structure with a resin encapsulant thickness of about 1 [mm] have been developed. There is a demand for the development of a resin-encapsulated semiconductor device with a smaller thickness.
また、 ダイパッ ドの上下方向の変動が激しくなることによ り、 半導 体チップの主面上での樹脂の流れ及び半導体チップの裏面上での樹脂 の流れが阻害される。 このため、 樹脂封止体にボイ ドが発生し、 樹脂 封止型半導体装置の製造プロセスでの歩留まりが低下する。  In addition, since the vertical fluctuation of the die pad becomes large, the flow of the resin on the main surface of the semiconductor chip and the flow of the resin on the back surface of the semiconductor chip are hindered. As a result, voids are generated in the resin-sealed body, and the yield in the manufacturing process of the resin-sealed semiconductor device is reduced.
本発明の目的は、 樹脂封止型半導体装置の薄型化を図ることが可能 な技術を提供することにある。  An object of the present invention is to provide a technique capable of reducing the thickness of a resin-encapsulated semiconductor device.
本発明の他の目的は、 樹脂封止型半導体装置の製造プロセスでの歩 留まりを高めることが可能な技術を提供することにある。  Another object of the present invention is to provide a technique capable of increasing the yield in the manufacturing process of a resin-sealed semiconductor device.
本発明の前記ならびにその他の目的と新規な特徴は、 本明細書の記 述及び添付図面によって明らかになるであろう。 発明の開示 The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings. Disclosure of the invention
本願において開示される発明のうち、 代表的なものの概要を簡単に 説明すれば、 下記のとおりである。  The following is a brief description of the outline of typical inventions disclosed in the present application.
( 1 ) 半導体チップと、 前記半導体チップを塔載するダイパツ ドと、 前記ダイパッ ドを支持する支持リードと、 前記半導体チップを封止す る樹脂封止体を有し、 前記ダイパッ ドが前記半導体チップの外形寸法 に比べて小さい外形寸法で形成され、 前記樹脂封止体が卜ランスファ モールド法で形成される樹脂封止型半導体装置であって、 前記ダイパ ッ ドのチップ塔載面と対向するその裏面を前記樹脂封止体の一表面か ら露出させた構造で構成する。  (1) A semiconductor chip, a die pad for mounting the semiconductor chip, a support lead for supporting the die pad, and a resin sealing body for sealing the semiconductor chip, wherein the die pad is the semiconductor A resin-encapsulated semiconductor device formed with an external dimension smaller than an external dimension of a chip, wherein the resin-encapsulated body is formed by a transfer molding method, wherein the resin-encapsulated semiconductor device faces a chip tower mounting surface of the die pad. The back surface is configured to be exposed from one surface of the resin sealing body.
( 2 ) 半導体チップと、 前記半導体チップを塔載するダイパッ ドと、 前記ダイパッ ドを支持する支持リードと、 前記半導体チップを封止す る樹脂封止体を有し、 前記ダイパジ ドが前記半導体チップの外形寸法 に比べて小さい外形寸法で形成され、 前記樹脂封止体がトランスファ モールド法で形成される樹脂封止型半導体装置の製造方法であって、 前記ダイパッ ドのチップ塔載面と対向するその裏面をモールド金型の キヤビティの内壁面で支持しながら前記樹脂封止体を形成する工程を 備える。  (2) a semiconductor chip, a die pad on which the semiconductor chip is mounted, a support lead for supporting the die pad, and a resin sealing body for sealing the semiconductor chip, wherein the die pad is the semiconductor A method for manufacturing a resin-encapsulated semiconductor device, wherein the external dimensions are smaller than the external dimensions of a chip, and the resin-encapsulated body is formed by a transfer molding method. Forming the resin-sealed body while supporting the back surface of the molded body with the inner wall surface of the cavity of the mold.
前述の手段 ( 1 ) によれば、 樹脂封止体を トランスファモールド法 で形成する際、 ダイパッ ドの裏面をモールド金型のキヤ ビティの内壁 面又はィジェクタピン(ejector pin ) 等で支持することができるので. モールド金型のキヤビティ内に加圧注入された樹脂の流れによって生 じるダイパッ ドの上下方向の変動を抑制することができる。 この結果. 樹脂封止体の厚さを 1 [ m m ] 以下に設定しても、 樹脂封止体から半 導体チップ、 ボンディングワイヤ等が露出する不具合を防止できるの で、 樹脂封止型半導体装置の薄型化を図ることができる。 According to the above-mentioned means (1), when the resin sealing body is formed by the transfer molding method, the back surface of the die pad can be supported by the inner wall surface of the cavity of the molding die or an ejector pin. Therefore, the vertical fluctuation of the die pad caused by the flow of the resin injected into the cavity of the mold can be suppressed. As a result, even if the thickness of the resin sealing body is set to 1 [mm] or less, it is possible to prevent a problem that a semiconductor chip, a bonding wire, and the like are exposed from the resin sealing body. Thus, the thickness of the resin-encapsulated semiconductor device can be reduced.
また、 ダイパッ ドから半導体チップの側面までの距離に相当する分, ダイパッ ドの露出領域から半導体チップの主面に到達する水分侵入パ ス経路を長くすることができるので、 ダイパッ ドの裏面を樹脂封止体 の一表面から露出させた構造で構成しても、 樹脂封止型半導体装置の 耐湿性を確保することができる。  In addition, the length of the moisture intrusion path from the exposed area of the die pad to the main surface of the semiconductor chip can be lengthened by an amount corresponding to the distance from the die pad to the side surface of the semiconductor chip. Even with a structure that is exposed from one surface of the sealing body, the moisture resistance of the resin-sealed semiconductor device can be ensured.
前述の手段 ( 2 ) によれば、 モールド金型のキヤビティ内に加圧注 入された樹脂の流れによって生じるダイパッ ドの上下方向の変動を抑 制することができるので、 半導体チップの主面上での樹脂の流れ及び 半導体チップの裏面上での樹脂の流れが良くなる。 この結果、 樹脂封 止体に生じるボイ ドの発生を防止できるので、 樹脂封止型半導体装置 の製造プロセスでの歩留まりを高めることができる。 図面の簡単な説明  According to the above-mentioned means (2), the vertical fluctuation of the die pad caused by the flow of the resin injected under pressure into the cavity of the mold can be suppressed. The flow of the resin and the flow of the resin on the back surface of the semiconductor chip are improved. As a result, it is possible to prevent the occurrence of voids generated in the resin-sealed body, so that it is possible to increase the yield in the manufacturing process of the resin-sealed semiconductor device. BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 本発明の実施形態 1である樹脂封止型半導体装置の樹脂 封止体の上部を除去した状態の平面図である。  FIG. 1 is a plan view of a resin-sealed semiconductor device according to a first embodiment of the present invention in a state where an upper portion of a resin-sealed body is removed.
第 2図は、 第 1図に示す A— A線の位置で切った断面図である。  FIG. 2 is a cross-sectional view taken along a line AA shown in FIG.
第 3図は、 第 1図に示す B— B線の位置で切った断面図である。  FIG. 3 is a sectional view taken along the line BB shown in FIG.
第 4図は、 第 2図の要部拡大断面図である。  FIG. 4 is an enlarged sectional view of a main part of FIG.
第 5図は、 前記樹脂封止型半導体装置の製造プロセスに用いられる リードフレームの平面図である。  FIG. 5 is a plan view of a lead frame used in a manufacturing process of the resin-encapsulated semiconductor device.
第 6図は、 前記樹脂封止型半導体装置の製造方法を説明するための 要部断面図である。  FIG. 6 is a fragmentary cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
第 7図は、 前記樹脂封止型半導体装置の製造方法を説明するための 要部断面図である。 第 8図は、 前記樹脂封止型半導体装置の製造プロセスに用いられる その他のリードフ レームの平面図である。 FIG. 7 is a fragmentary cross-sectional view for describing the method for manufacturing the resin-encapsulated semiconductor device. FIG. 8 is a plan view of another lead frame used in the manufacturing process of the resin-sealed semiconductor device.
第 9図は、 前記樹脂封止型半導体装置の変形例を示す断面図である 第 1 0図は、 本発明の実施形態 2である樹脂封止型半導体装置の樹 脂封止体の上部を除去した状態の平面図である。  FIG. 9 is a cross-sectional view showing a modification of the resin-encapsulated semiconductor device. FIG. 10 is a cross-sectional view of the resin-encapsulated semiconductor device according to Embodiment 2 of the present invention. It is a top view in the state where it was removed.
第 1 1図は、 第 1 0図に示す C一 C線の位置で切った断面図である, 第 1 2図は、 第 1 0図に示す D— D線の位置で切った断面図である, 第 1 3図は、 第 1 1図の要部拡大断面図である。  FIG. 11 is a cross-sectional view taken along a line C-C shown in FIG. 10, and FIG. 12 is a cross-sectional view taken along a line D-D shown in FIG. FIG. 13 is an enlarged sectional view of a main part of FIG.
第 1 4図は、 前記樹脂封止型半導体装置の製造プロセスに用いられ るリードフレームの平面図である。  FIG. 14 is a plan view of a lead frame used in a manufacturing process of the resin-sealed semiconductor device.
第 1 5図は、 前記樹脂封止型半導体装置の製造方法を説明するため の要部断面図である。  FIG. 15 is a fragmentary cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
第 1 6図は、 前記樹脂封止型半導体装置の製造方法を説明するため の要部断面図である。  FIG. 16 is a fragmentary cross-sectional view for explaining the method for manufacturing the resin-encapsulated semiconductor device.
第 1 7図は、 本発明の実施形態 3である樹脂封止型半導体装置の樹 脂封止体の上部を除去した状態の平面図である。  FIG. 17 is a plan view of the resin-sealed semiconductor device according to the third embodiment of the present invention in a state where an upper portion of a resin-sealed body is removed.
第 1 8図は、 第 1 7図に示す E— E線の位置で切った断面図である, 第 1 9図は、 第 1 7図に示す F— F線の位置で切った断面図である, 第 2 0図は、 前記樹脂封止型半導体装置の製造プロセスに用いられ るリードフ レームの平面図である。  FIG. 18 is a cross-sectional view taken along line EE shown in FIG. 17, and FIG. 19 is a cross-sectional view taken along line FF shown in FIG. FIG. 20 is a plan view of a lead frame used in a manufacturing process of the resin-sealed semiconductor device.
第 2 1図は、 前記樹脂封止型半導体装置の製造プロセスに用いられ るその他のリードフレームの平面図である。 発明を実施するための最良の形態  FIG. 21 is a plan view of another lead frame used in the manufacturing process of the resin-sealed semiconductor device. BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明の構成について、 実施形態とともに説明する。 なお、 実施形態を説明するための全図において、 同一機能を有する ものは同一符号を付け、 その繰り返しの説明は省略する。 Hereinafter, the configuration of the present invention will be described together with embodiments. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and repeated description thereof will be omitted.
(実施形態 1 )  (Embodiment 1)
本実施形態の樹脂封止型半導体装置は、 第 1図及び第 2図に示すよ うに、 ダイパッ ド 3 Aのチップ塔載面に半導体チップ 2を塔載してい る。  In the resin-encapsulated semiconductor device of the present embodiment, as shown in FIGS. 1 and 2, a semiconductor chip 2 is mounted on a chip mounting surface of a die pad 3A.
前記半導体チップ 2の平面形状は、 例えば、 9 [ m m ] X 9 [ m m ] の外形寸法からなる正方形状で形成されている。 半導体チップ 2は、 例えば、 単結晶珪素からなる半導体基板及びその主面上に形成された 配線層を主体とする構造で構成されている。  The planar shape of the semiconductor chip 2 is, for example, a square shape having an outer dimension of 9 [mm] × 9 [mm]. The semiconductor chip 2 has a structure mainly composed of, for example, a semiconductor substrate made of single crystal silicon and a wiring layer formed on the main surface thereof.
前記半導体チップ 2には、 例えば、 論理回路システム又は論理回路 システムと記憶回路システムとを混在させた混合回路システムが塔載 されている。 また、 半導体チップ 2の主面には, その主面の各辺に沿 つて配列された複数個の外部端子(ボンディングパツ ド) 2 Aが配置さ れている。 この複数個の外部端子 2 Aの夫々は、 半導体チップ 2の配 線層のうち、 最上層の配線層に形成され、 例えばアルミニウム(A 1 ) 膜又はアルミニゥム合金膜で形成されている。  The semiconductor chip 2 includes, for example, a logic circuit system or a mixed circuit system in which a logic circuit system and a storage circuit system are mixed. Further, on the main surface of the semiconductor chip 2, a plurality of external terminals (bonding pads) 2A are arranged along each side of the main surface. Each of the plurality of external terminals 2A is formed in the uppermost wiring layer of the wiring layers of the semiconductor chip 2, and is formed of, for example, an aluminum (A 1) film or an aluminum alloy film.
前記半導体チップ 2の各辺の外側には、 その各辺に沿つて配列され た複数本のリード 3 Cが配置されている。 この複数本のリード 3 Cの 夫々のインナ一部 3 C 1は、 ボンディングワイヤ 5を介して、 半導体 チップ 2の主面に配置された複数個の外部端子 2 Aの夫々に電気的に 接続されている。  Outside each side of the semiconductor chip 2, a plurality of leads 3C arranged along each side are arranged. Each inner part 3C1 of the plurality of leads 3C is electrically connected to each of the plurality of external terminals 2A arranged on the main surface of the semiconductor chip 2 via bonding wires 5. ing.
前記ボンディングワイヤ 5としては例えば金 ( A u ) ワイヤを使用 する。 また、 ボンディングワイヤ 5としては、 例えば、 アルミニウム ( A 1 )ワイヤ、 銅 (C u ) ワイヤ、 金属ワイヤの表面に絶縁性樹脂を 被覆した被覆ワイヤ等を使用してもよい。 ボンディングワイヤ 5は、 例えば熱圧着に超音波振動を併用したボンディング法によ り接続され る。 As the bonding wire 5, for example, a gold (Au) wire is used. As the bonding wire 5, for example, an insulating resin is applied to the surface of an aluminum (A1) wire, a copper (Cu) wire, or a metal wire. A covered wire or the like may be used. The bonding wire 5 is connected by, for example, a bonding method using ultrasonic vibration in combination with thermocompression bonding.
前記ダイパッ ド 3 Aには 4本の支持リ一ド 3 Bが一体化されている, この 4本の支持リード 3 Bの夫々は、 リードフレームの状態において, リードフレームの枠体にダイパッ ド 3 Aを支持している。 4本の支持 リード 3 Bの夫々は、 ダイパッ ド 3 Aを交点とする X字の形状になる 位置に配置されている。 支持リード 3 Bの幅寸法は例えば 0 . 4 [ m m ] に設定されている。  The die pad 3A is integrated with four support leads 3B. Each of the four support leads 3B is mounted on the frame of the lead frame in the state of the lead frame. I support A. Each of the four support leads 3B is arranged at a position where an X-shape is formed at the intersection of the die pad 3A. The width dimension of the support lead 3B is set to, for example, 0.4 [mm].
前記半導体チップ 2、 ダイパッ ド 3 A、 支持リード 3 B、 リード 3 Cのインナ一部 3 C 1及びボンディングワイヤ 5等は、 トランスファ モールド法で形成された樹脂封止体 1で封止されている。 樹脂封止体 1は、 低応力化を図る目的として、 例えば、 フ: ϋノール系硬化剤、 シ リコーン及びフィ ラ一等が添加されたビフエ二一ル系又はオルソクレ ゾ一ルノボラック系の樹脂で形成されている。 トランスファモールド 法は、 ポッ ト、 ランナー、 流入ゲート及びキヤビティ等を備えたモー ルド金型を使用し、 ポッ トからランナー及び流入ゲ一卜を通してキヤ ビティ内に加圧注入される樹脂で樹脂封止体を形成する方法である。 前記樹脂封止体 1の平面形状は、 例えば、 1 4 [ m m ] X 1 4 [ m m ] の外形寸法からなる正方形状で形成されている。 この樹脂封止体 1の各辺の外側には、 複数本のリード 3 Cの夫々のアウター部 3 C 2 が配置されている。 複数本のリード 3 Cの夫々のアウター部 3 C 2は, 樹脂封止体 1の各辺に沿って配列され、 例えばガルウイング形状に成 形されている。 即ち、 本実施形態の樹脂封止型半導体装置は、 Q F P ( Q uad F lat P ackage)構造で構成されている。 前記ダイパシ ド 3 Aの平面形状は、 例えば、 3 [ m m ] φの外形寸 法からなる円形状で形成されている。 即ち、 本実施形態のダイパッ ド 3 Αは、 半導体チップ 2の外形寸法よりも小さい外形寸法で形成され ている。 このよう に、 ダイパッ ド 3 Aを半導体チップ 2の外形寸法よ りも小さい外形寸法で形成することにより、 樹脂封止体 1の樹脂に含 まれている水分がダイパッ ド 3 Aの裏面に溜らなくなるので、 水分の 気化膨張による樹脂封止体 1の亀裂を防止することができる。 The semiconductor chip 2, the die pad 3A, the support lead 3B, the inner part 3C1 of the lead 3C1, the bonding wire 5, and the like are sealed with a resin sealing body 1 formed by a transfer molding method. . The resin sealing body 1 is made of, for example, a biphenyl-based resin or an ortho-cresol novolac-based resin to which a phenol-based curing agent, silicone and filler are added for the purpose of reducing stress. Is formed. The transfer molding method uses a mold with a pot, runner, inflow gate, and cavity, and is resin-encapsulated with resin that is injected into the cavity from the pot through the runner and the inflow gate. It is a method of forming a body. The planar shape of the resin sealing body 1 is, for example, a square shape having an outer dimension of 14 [mm] X 14 [mm]. Outer sides 3C2 of the leads 3C are arranged outside each side of the resin sealing body 1. Each outer portion 3C2 of the plurality of leads 3C is arranged along each side of the resin sealing body 1, and is formed, for example, in a gull wing shape. That is, the resin-encapsulated semiconductor device of the present embodiment has a QFP (Quad Flat Package) structure. The planar shape of the die path 3A is, for example, a circular shape having an outer dimension of 3 [mm] φ. That is, the die pad 3 of the present embodiment is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2. In this way, by forming the die pad 3A with an outer dimension smaller than the outer dimension of the semiconductor chip 2, moisture contained in the resin of the resin sealing body 1 does not collect on the back surface of the die pad 3A. Therefore, cracking of the resin sealing body 1 due to vaporization and expansion of water can be prevented.
また、 ボンディングワイヤ 5の中間部が垂れ下がっても、 半導体チ ップ 2の外周囲の外側にはダィパッ ド 3 Aが存在しないので、 ダィパ ッ ド 3 Aとボンディングワイヤ 5との接触を防止することができる。 ボンディングワイヤ 5の中間部の垂れ下がリは、 ボンディングワイヤ 5の長さが長くなればなるほど顕著になる。  In addition, even if the intermediate portion of the bonding wire 5 hangs, the contact between the die pad 3A and the bonding wire 5 is prevented because the diode 3A does not exist outside the outer periphery of the semiconductor chip 2. Can be. The sag of the middle part of the bonding wire 5 becomes more remarkable as the length of the bonding wire 5 becomes longer.
また、 半導体チップ 2の外形寸法をダイパッ ド 3 Aの外形寸法まで 縮小しても、 半導体チップ 2の外周囲の外側にはダイパッ ド 3 Aが存 在せず、 ボンディングワイヤ 5の中間部が垂れ下がっても、 ダイパッ ド 3 Aとボンディングワイヤ 5とが接触しないので、 外形寸法の異な る半導体チップ 2を塔載することができる。  Also, even if the external dimensions of the semiconductor chip 2 are reduced to the external dimensions of the die pad 3A, the die pad 3A does not exist outside the outer periphery of the semiconductor chip 2 and the middle part of the bonding wire 5 hangs down. However, since the die pad 3A and the bonding wire 5 do not come into contact with each other, the semiconductor chips 2 having different external dimensions can be mounted.
前記ダイパジ ド 3 Aのチップ塔載面と対向するその裏面の全領域は、 樹脂封止体 1の一表面である下面から露出されている。 また、 ダイパ ッ ド 3 Aの裏面は、 樹脂封止体 1の下面の位置と同一の位置に位置し ている。 即ち、 本実施形態の樹脂封止型半導体装置は、 ダイパッ ド 3 Aの裏面の全領域を樹脂封止体 1の下面から露出させた構造で構成さ れている。 ダイパッ ド 3 Aの裏面の全領域の露出は、 樹脂封止体 1 を トランスファモールド法で形成する際、 ダイパッ ド 3 Aの裏面をモー ルド金型のキヤビティの内壁面で支持することにより達成される。 前記半導体チップ 1の主面と対向するその裏面の中央領域は接着材 4を介在してダイパッ ド 3 Aのチップ塔載面に接着固定され、 その裏 面の周辺領域は樹脂封止体 1の樹脂で覆われている。 接着材 4は例え ばエポキシ系の銀(A g)ペースト材で形成されている。 接着材 4は、 樹脂封止型半導体装置の製造プロセスにおいて、 ダイパッ ド 3 Aのチ プ塔載面に多点塗布法で塗布される。 The entire area of the rear surface of the die pad 3A facing the chip tower mounting surface is exposed from the lower surface, which is one surface of the resin sealing body 1. Further, the back surface of the die pad 3A is located at the same position as the position of the lower surface of the resin sealing body 1. That is, the resin-sealed semiconductor device of the present embodiment has a structure in which the entire region on the back surface of the die pad 3A is exposed from the lower surface of the resin-sealed body 1. Exposure of the entire area of the rear surface of die pad 3A is achieved by supporting the rear surface of die pad 3A with the inner wall surface of the mold die cavity when resin molding 1 is formed by transfer molding. You. The central region of the back surface facing the main surface of the semiconductor chip 1 is bonded and fixed to the chip tower mounting surface of the die pad 3A with an adhesive 4 interposed therebetween, and the peripheral region of the back surface is formed of the resin sealing body 1. Covered with resin. The adhesive 4 is made of, for example, an epoxy silver (Ag) paste material. The adhesive 4 is applied to the chip tower mounting surface of the die pad 3A by a multi-point application method in the process of manufacturing the resin-encapsulated semiconductor device.
前記支持リード 3 Bは、 第 3図に示すように、 樹脂封止体 1で封止 されたリード部 3 B 1 と、 樹脂封止体 1の一表面である下面から一表 面 (裏面) が露出されたリード部 3 B 2とで構成されている。 リード 部 3 B 1は、 その板厚方向(上下方向)において、 第 2図に示すリード 3 Cのインナ一部 3 C 1と同一の位置に位置し、 リード部 3 B 2は、 その板厚方向(上下方向)において、 ダイパッ ド 3 Aの位置と同一の位 置に位置している。 即ち、 本実施形態の樹脂封止型半導体装置は、 ダ ィパッ ド 3 Aのチップ塔載面をリード 3 Cのィンナ一部 3 C 1の上面 (ボンディング面)よりもその板厚方向に下げた構造で構成されている, 第 4図に示すように、 前記半導体チップ 2の厚さ寸法 Aは例えば 0. 2 [mm] に設定されている。 また、 前記樹脂封止体 1の厚さ寸法 B は例えば 0. 5 [mm] に設定されている。 また、 樹脂封止体 1にお いて、 半導体チップ 2の主面上での樹脂の厚さ寸法 B 1は例えば 0. 1 6 [mm] に設定され、 半導体チップ 2の裏面上での樹脂の厚さ寸 法 B 2は例えば 0. 14 [mm] に設定されている。 また、 前記ダイ パッ ド 3 Aの厚さ寸法 Cは例えば 0. 1 3 [mm] に設定されている, また、 前記樹脂封止型半導体装置の高さ寸法 Dは例えば 0. 6〜0. 7 [mm] に設定されている。  As shown in FIG. 3, the support lead 3B has a lead portion 3B1 sealed with a resin sealing body 1 and a surface (back) from the lower surface which is one surface of the resin sealing body 1. And the exposed lead portion 3B2. The lead portion 3B1 is located at the same position as the inner part 3C1 of the lead 3C shown in FIG. 2 in the thickness direction (vertical direction), and the lead portion 3B2 is In the direction (vertical direction), it is located at the same position as the position of the die pad 3A. That is, in the resin-encapsulated semiconductor device of the present embodiment, the chip mounting surface of the die pad 3A is lowered in the plate thickness direction from the upper surface (bonding surface) of the inner part 3C1 of the lead 3C. As shown in FIG. 4, the thickness dimension A of the semiconductor chip 2 is set to, for example, 0.2 [mm]. The thickness B of the resin sealing body 1 is set to, for example, 0.5 [mm]. In the resin sealing body 1, the thickness B 1 of the resin on the main surface of the semiconductor chip 2 is set to, for example, 0.16 [mm], and the resin on the back surface of the semiconductor chip 2 is set to 0.16 [mm]. The thickness dimension B2 is set to, for example, 0.14 [mm]. The thickness C of the die pad 3A is set to, for example, 0.13 [mm]. The height D of the resin-encapsulated semiconductor device is set to, for example, 0.6 to 0.6. 7 [mm] is set.
このように構成された樹脂封止型半導体装置は、 第 5図に示すリ一 ドフ レーム 3を用いた製造プロセスで形成されている。 The resin-encapsulated semiconductor device having the above-described configuration is the same as that shown in FIG. It is formed by a manufacturing process using frame 3.
前記リードフレーム 3は、 枠体 3 Eで規定された領域内に、 ダイパ ッ ド 3 A、 4本の支持リード 3 B、 複数本のリード 3 C等を配置して いる。 ダイパッ ド 3 Aは 4本の支持リード 3 Bを介して枠体 3 Eに支 持されている。 複数本のリード 3 Cの夫々は枠体 3 Eに支持され、 タ ィバ一(ダムバー) 3 Dで互いに連結されている。 これらのダイパッ ド 3 A、 支持リード 3 B、 リード 3 Cの夫々は枠体 3 Eと一体化されて いる。  In the lead frame 3, a die pad 3A, four support leads 3B, a plurality of leads 3C, and the like are arranged in an area defined by a frame 3E. The die pad 3A is supported by the frame 3E via four support leads 3B. Each of the plurality of leads 3C is supported by a frame 3E, and is connected to each other by a dam (bar) 3D. Each of the die pad 3A, the support lead 3B, and the lead 3C is integrated with the frame 3E.
前記リード 3 Cは、 樹脂封止体 1で封止されるインナ一部 3 C 1 と、 所定の形状に成形されるアウター部 3 C 2 とで構成されている。 前記 支持リード 3 Bは、 その板厚方向においてリード 3 Cのインナ一部 3 C 1 と同一の位置に位置するリード部 3 B 1 と、 その板厚方向におい てリード 3 Cのインナ一部 3 C 1よりも下方の位置に位置するリード 部 3 B 2とで構成されている。  The lead 3C includes an inner part 3C1 sealed with the resin sealing body 1, and an outer part 3C2 molded into a predetermined shape. The support lead 3B has a lead portion 3B1 located at the same position as the inner portion 3C1 of the lead 3C in the plate thickness direction, and a lead portion 3B inner portion 3C in the plate thickness direction. And a lead portion 3B2 located at a position lower than C1.
前記リードフレーム 3は、 例えば、 鉄( F e )—ニッケル( N i )系の 合金又は銅(C u )若しくは銅系の合金で形成されている。 このリード フレーム 3は、 平板材にエッチング加工又はプレス加工を施し、 所定 のパターンを形成した後、 支持リード 3 Bにプレス加工を施すことに より形成される。  The lead frame 3 is formed of, for example, an iron (Fe) -nickel (Ni) -based alloy, copper (Cu), or a copper-based alloy. The lead frame 3 is formed by subjecting a flat plate material to etching or pressing, forming a predetermined pattern, and then pressing the supporting lead 3B.
前記支持リ一ド 3 Bの長さはダイパッ ド 3 Aの外形寸法が小さくな ればなるほど長くなるので、 これに伴いダィパッ ド 3 Aは上下方向に 変動し易くなる。 また、 支持リード 3 Bの幅は多ピン化に伴って細く なるので、 これに伴いダイパッ ド 3 Aは上下方向に変動し易くなる。 また、 支持リード 3 Bの厚さは樹脂封止体 1の薄型化に伴って薄くな るので、 これに伴ってダイパッ ド 3 Aは上下方向に変動し易くなる。 次に、 前記樹脂封止型半導体装置の製造方法について説明する。 まず、 第 5図に示すリードフ レーム 3を用意する。 Since the length of the support lead 3B becomes longer as the outer dimensions of the die pad 3A become smaller, the length of the die pad 3A is easily changed in the vertical direction. Further, since the width of the support lead 3B becomes narrower as the number of pins is increased, the die pad 3A is liable to fluctuate in the vertical direction. In addition, the thickness of the support lead 3B is reduced as the thickness of the resin sealing body 1 is reduced, so that the die pad 3A is liable to change in the vertical direction. Next, a method for manufacturing the resin-encapsulated semiconductor device will be described. First, a lead frame 3 shown in FIG. 5 is prepared.
次に、 前記リードフレーム 3のダイパッ ド 3 Aのチップ塔載面に接 着材 4 を多点塗布法で塗布する。  Next, an adhesive 4 is applied to the chip mounting surface of the die pad 3A of the lead frame 3 by a multi-point coating method.
次に、 前記ダイパッ ド 3 Aのチップ塔戟面に接着材 4を介在して半 導体チップ 2を塔載する。 半導体チップ 2は接着材 4 を介在してダイ パッ ド 3 Aのチップ塔載面に接着固定される。  Next, the semiconductor chip 2 is mounted on the chip tower surface of the die pad 3A with the adhesive 4 interposed therebetween. The semiconductor chip 2 is bonded and fixed to the chip mounting surface of the die pad 3A with an adhesive 4 therebetween.
次に、 前記半導体チップ 2の外部端子 2 Aと、 前記リードフ レーム 3のリード 3 Cのインナ一部 3 C 1 とをボンディ ングワイヤ 5で電気 的に接続する。  Next, the external terminals 2 A of the semiconductor chip 2 and the inner portions 3 C 1 of the leads 3 C of the lead frame 3 are electrically connected by bonding wires 5.
次に、 第 6図及び第 7図に示すように、 前記リードフ レーム 3をモ —ルド金型 1 0の上型 1 O Aと下型 1 0 Bとの間に配置し、 モールド 金型 1 0の上型 1 0 Aと下型 1 0 B とで形成されるキヤ ビティ 1 1内 に、 半導体チップ 2、 ダイパッ ド 3 A、 支持リード 3 B、 リード 3 C のインナ一部 3 C 1及びボンディ ングワイヤ 5等を配置すると共に、 キヤ ビティ 1 1の内壁面 1 1 Aにダイパッ ド 3 Aの裏面を接触させ、 このキヤ ビティ 1 1 の内壁面 1 1 Aでダイパ'ソ ド 3 Aの裏面を支持す る。 この時、 支持リード 3 Bのリード部 3 B 2の下面(裏面)もキヤ ビ ティ 1 1の内壁面 1 1 Aに接触され、 キヤビティ 1 1の内壁面 1 1 A で支持される。 また, 支持リード 3 Bの弾性力により、 ダイパッ ド 3 Aの裏面はキヤ ビティ 1 1の内壁面 1 1 Aに押圧される。 また、 支持 リード 3 Bのリード部 3 B 2も同様に押圧される。 なお、 モールド金 型 1 0はキヤビティ 1 1の他に、 ポジ 卜 (図示せず) 、 ランナー (図 示せず) 及び流入ゲート 1 2を備えている。 流入ゲー卜 1 2は、 リー ドフ レーム 3の上面及び下面を通ってキヤビティ 1 1内に樹脂を充填 する構造で構成されている。 Next, as shown in FIGS. 6 and 7, the lead frame 3 is placed between the upper mold 1 OA and the lower mold 10 B of the mold 10, and the mold 10 is formed. In the cavity 11 formed by the upper mold 10A and the lower mold 10B, the inner part 3C1 of the semiconductor chip 2, die pad 3A, support lead 3B, lead 3C, and bonder In addition to placing the mounting wire 5 etc., the back surface of the die pad 3 A is brought into contact with the inner wall surface 11 A of the cavity 11, and the inner surface 11 A of the cavity 11 is used to contact the back surface of the die pad 3 A. To support. At this time, the lower surface (back surface) of the lead portion 3B2 of the support lead 3B also comes into contact with the inner wall surface 11A of the cavity 11 and is supported by the inner wall surface 11A of the cavity 11. The back surface of the die pad 3A is pressed against the inner wall surface 11A of the cavity 11 by the elastic force of the support lead 3B. Also, the lead portion 3B2 of the support lead 3B is pressed in the same manner. The mold 10 has a cavity (not shown), a runner (not shown), and an inflow gate 12 in addition to the cavity 11. The inflow gate 1 2 fills the cavity 11 with resin through the upper and lower surfaces of the lead frame 3. It has a structure that
次に、 前記モールド金型 1 0のポッ 卜からランナー及び流入ゲ一ト 1 2を通してキヤビティ 1 1内に樹脂を加圧注入し、 ダイパッ ド 3 A の裏面をキヤビティ 1 1の内壁面 1 1 Aで支持しながら樹脂封止体 1 を形成する。 この工程において、 ダイパッ ド 3 Aの裏面がキヤ ビティ 1 1の内壁面 1 1 Aで支持されているので、 モールド金型 1 0のキヤ ビティ 1 1内に加圧注入された樹脂の流れによって生じるダイパッ ド 3 Aの上下方向の変動は抑制される。 また、 モールド金型のキヤ ビテ ィ内に加圧注入された樹脂の流れによって生じるダイパッ ドの上下方 向の変動が抑制されるので、 半導体チップ 2の主面上での樹脂の流れ 及び半導体チップ 2の裏面上での樹脂の流れが良くなる。 また、 ダイ パッ ド 3 Aの裏面及び支持リ一ド 3 Bのリード部 3 B 2の裏面がキヤ ビティ 1 1の内壁面 1 1 Aに接触されているので、 これらの裏面は樹 脂封止体 1の一表面である下面から露出される。 また, ダイパッ ド 3 Aの裏面及び支持リード 3 Bのリード部 3 B 1の裏面がキヤビティ 1 1の内壁面 1 1 Aに支持リード 3 Bの弾性力によつて押圧されている ので、 ダイパッ ド 3 Aの裏面及び支持リ一ド 3 Bのリード部 3 B 1の 裏面に樹脂が廻り込むことはない。 なお、 この工程において、 ダイパ ッ ド 3 A及び支持リード 3 Bのリード部 3 B 2を除く、 半瀵体チップ 2、 支持リード 3 Bのリード部 3 B 1、 リード 3 Cのィンナ一部 3 C 1及びボンディングワイヤ 5等は樹脂封止体 1で封止される。  Next, a resin is pressure-injected into the cavity 11 from the pot of the mold 10 through the runner and the inflow gate 12, and the back surface of the die pad 3 A is exposed to the inner wall surface 11 A of the cavity 11. The resin sealing body 1 is formed while supporting with. In this step, since the back surface of the die pad 3A is supported by the inner wall surface 11A of the cavity 11, the flow is caused by the flow of the resin injected into the cavity 11 of the mold 10 by pressure. Vertical fluctuation of the die pad 3A is suppressed. Also, the upward and downward fluctuations of the die pad caused by the flow of the resin injected under pressure into the cavity of the molding die are suppressed, so that the flow of the resin on the main surface of the semiconductor chip 2 and the flow of the semiconductor chip The flow of the resin on the back surface of 2 is improved. Also, since the back surface of the die pad 3A and the back surface of the lead portion 3B2 of the support lead 3B are in contact with the inner wall surface 11A of the cavity 11, these back surfaces are resin-sealed. It is exposed from the lower surface which is one surface of the body 1. Also, the back surface of the die pad 3A and the back surface of the lead portion 3B1 of the support lead 3B are pressed against the inner wall surface 11A of the cavity 11 by the elastic force of the support lead 3B. The resin does not flow around the back surface of 3A and the back surface of the lead 3B1 of the support lead 3B. In this process, the semiconductor chip 2, the lead portion 3B1 of the support lead 3B, and the inner part 3 of the lead 3C, excluding the die portion 3A and the lead portion 3B2 of the support lead 3B, are used. C 1 and the bonding wires 5 are sealed with the resin sealing body 1.
次に、 前記リードフレーム 3の枠体 3 Eから支持リード 3 B及びリ —ド 3 Cを切断し、 その後、 リード 3 Cのアウター部 3 C 2をガルゥ イング形状に成形することにより、 第 1図、 第 2図及び第 3図に示す 樹脂封止型半導体装置がほぼ完成する。 このように、 本実施形態によれば、 以下の作用効果が得られる。Next, the support lead 3B and the lead 3C are cut from the frame 3E of the lead frame 3, and then, the outer portion 3C2 of the lead 3C is formed into a gulling shape, whereby the first The resin-encapsulated semiconductor device shown in FIGS. 2, 3 and 3 is almost completed. As described above, according to the present embodiment, the following operational effects can be obtained.
( 1 ) 半導体チップ 2と、 前記半導体チップ 2を塔載するダイパッ ド 3 Aと、 前記ダイパッ ド 3 Aを支持する支持リード 3 Bと、 前記半導 体チップ 2を封止する樹脂封止体 1 を有し、 前記ダイパッ ド 3 Aが前 記半導体チップ 2の外形寸法よりも小さい外形寸法で形成され、 前記 樹脂封止体 1がトランスファモールド法で形成される樹脂封止型半導 体装置であって、 前記ダイパッ ド 3 Aのチップ塔載面と対向するその 裏面を前記樹脂封止体 1の一表面から露出させた構造で構成すること により、 樹脂封止体 1 を トランスファモールド法で形成する際、 ダイ ノ、。ッ ド 3 Aの裏面をモールド金型 1 0のキヤ ビティ 1 1の内壁面 1 1 Aで支持することができるので、 モールド金型 1 0のキヤビティ 1 1 内に加圧注入された樹脂の流れによって生じるダイパツ ド 3 Aの上下 方向の変動を抑制することができる。 この結果、 樹脂封止体 1の厚さ を 1 [ m m ] 以下に設定しても、 樹脂封止体 1 から半導体チップ 2、 ボンディングワイヤ 5等が露出する不具合を防止できるので、 樹脂封 止型半導体装置の薄型化を図ることができる。 (1) A semiconductor chip 2, a die pad 3A on which the semiconductor chip 2 is mounted, a support lead 3B for supporting the die pad 3A, and a resin sealing body for sealing the semiconductor chip 2. Wherein the die pad 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and the resin sealing body 1 is formed by a transfer molding method. By forming the back surface of the die pad 3A opposite to the chip tower mounting surface from one surface of the resin sealing body 1, the resin sealing body 1 is formed by a transfer molding method. Dino, when forming. Since the back surface of the pad 3 A can be supported by the inner wall surface 11 A of the mold 11 of the mold 11, the flow of the resin injected into the cavity 11 of the mold 10 is pressurized. The fluctuation of the die pad 3A in the vertical direction caused by this can be suppressed. As a result, even if the thickness of the resin sealing body 1 is set to 1 [mm] or less, the problem that the semiconductor chip 2 and the bonding wires 5 are exposed from the resin sealing body 1 can be prevented. The thickness of the semiconductor device can be reduced.
( 2 ) 前記半導体チップ 2の裏面の一部の領域を前記ダイパッ ド 3 A のチップ塔載面に接着材 4を介在して固定し、 前記半導体チップの裏 面の他部の領域を前記樹脂封止体 1の樹脂で覆うことにより、 ダイパ ッ ド 3 Aから半導体チップ 2の側面までの距離に相当する分、 ダイパ ッ ド 3 Aの露出領域から半導体チップ 2の主面に到達する水分侵入パ ス経路を長くすることができるので、 ダイパッ ド 3 Aの裏面を樹脂封 止体 1の一表面から露出させた構造で構成しても、 樹脂封止体型半導 体装置の耐湿性を確保することができる。  (2) A part of the rear surface of the semiconductor chip 2 is fixed to the chip mounting surface of the die pad 3A with an adhesive 4 interposed therebetween, and the other region of the rear surface of the semiconductor chip is By covering with the resin of the sealing body 1, moisture that reaches the main surface of the semiconductor chip 2 from the exposed area of the die pad 3 A by an amount corresponding to the distance from the die pad 3 A to the side surface of the semiconductor chip 2. Since the path of the path can be lengthened, the moisture resistance of the resin-sealed-type semiconductor device is ensured even if the back surface of the die pad 3A is configured to be exposed from one surface of the resin-sealed body 1. can do.
( 3 ) 前記ダイパッ ド 3 Aの裏面を前記樹脂封止体 1の一表面の位置 と同一の位置にすることにより、 半導体チップ 2の裏面上での樹脂の 厚さを薄くすることができるので、 これに相当する分、 樹脂封止体 1 の厚さを薄く設定することができ、 樹脂封止型半導体装置の薄型を図 ることができる。 (3) Position the back surface of the die pad 3A on one surface of the resin sealing body 1. By setting the same position as above, the thickness of the resin on the back surface of the semiconductor chip 2 can be reduced, so that the thickness of the resin sealing body 1 can be set thinner by an amount corresponding to this. Thus, the resin-encapsulated semiconductor device can be made thin.
( 4 ) 半導体チップ 2と、 前記半導体チップ 2を塔載するダイパッ ド 3 Aと、 前記ダイパッ ド 3 Aを支持する支持リード 3 Bと、 前記半導 体チップ 2を封止する樹脂封止体 1 を有し、 前記ダイパッ ド 3 Aが前 記半導体チップ 2の外形寸法よりも小さい外形寸法で形成され、 前記 樹脂封止体 1 がトランスファモールド法で形成される樹脂封止型半導 体装置の製造方法であって、 前記ダイパッ ド 3 Aの裏面をモールド金 型 1 0のキヤ ビティ 1 1の内壁面 1 1 Aで支持しながら前記樹脂封止 体 1 を形成する工程を備えることにより、 モールド金型 1 0のキヤ ビ ティ 1 1内に加圧注入された樹脂の流れによって生じるダイパッ ドの 上下方向の変動を抑制することができるので、 半導体チップ 2の主面 上での樹脂の流れ及び半導体チップ 2の裏面上での樹脂の流れが良く なる。 この結果、 樹脂封止体 1 に生じるボイ ドの発生を防止できるの で、 樹脂封止型半導体装置の製造プロセスでの歩留まりを高めること ができる。  (4) A semiconductor chip 2, a die pad 3A on which the semiconductor chip 2 is mounted, a support lead 3B for supporting the die pad 3A, and a resin sealing body for sealing the semiconductor chip 2. Wherein the die pad 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and the resin sealing body 1 is formed by a transfer molding method. The manufacturing method of the above, comprising a step of forming the resin sealing body 1 while supporting the back surface of the die pad 3A on the inner wall surface 11A of the cavity 11 of the mold 10 Since the vertical fluctuation of the die pad caused by the flow of the resin pressurized into the cavity 11 of the mold 10 can be suppressed, the flow of the resin on the main surface of the semiconductor chip 2 can be suppressed. And resin on the back of semiconductor chip 2 Flow is improved. As a result, the occurrence of voids in the resin-sealed body 1 can be prevented, so that the yield in the manufacturing process of the resin-sealed semiconductor device can be increased.
なお、 前記樹脂封止型半導体装置は、 第 8図に示すリードフレーム 3を用いた製造プロセスで形成してもよい。 リードフレーム 3は、 リ —ド 3 Cのインナ一部 3 C 1 と他のリード 3 Cのインナ一部 3 C 1 と を絶縁フィルム 3 Fで互いに連結し、 また、 リード 3 Cのインナ一部 3 C 1 と支持リード 3 Bのリード部 3 B 1 とを絶緣フィルム 3 Fで互 いに連結した構造で構成されている。 このリードフレーム 3を用いた 場合においても、 前述の実施形態と同様の効果が得られる。 また、 前記樹脂封止型半導体装置は、 図 9に示すように、 ダイパツ ド 3 Aの裏面を, 樹脂封止体 1の一表面よりもその外側に位置させた 構造で構成してもよい。 この場合、 ダイパッ ド 3 Aの裏面と樹脂封止 体 1の一表面との間の距離に相当する分、 樹脂封止体 1の厚さを薄く することができる。 The resin-sealed semiconductor device may be formed by a manufacturing process using the lead frame 3 shown in FIG. In the lead frame 3, the inner part 3C1 of the lead 3C and the inner part 3C1 of the other lead 3C are connected to each other with the insulating film 3F, and the inner part of the lead 3C is also connected. 3C 1 and the lead portion 3B 1 of the support lead 3B are connected to each other by an insulating film 3F. Even when this lead frame 3 is used, the same effects as in the above-described embodiment can be obtained. Further, as shown in FIG. 9, the resin-encapsulated semiconductor device may have a structure in which the back surface of the die pad 3A is located outside one surface of the resin encapsulant 1. In this case, the thickness of the resin sealing body 1 can be reduced by an amount corresponding to the distance between the back surface of the die pad 3A and one surface of the resin sealing body 1.
また、 前記樹脂封止型半導体装置は、 図 9に示すように、 支持リー ド 3 Bのリード部 3 B 2の裏面を、 樹脂封止体 1の一表面よりもその 外側に位置させた構造で構成してもよい。 この場合、 支持リード 3 B のリード部 3 B 2の裏面と樹脂封止体 1の一表面との間の距離に相当 する分、 支持リード 3 Bの厚さを厚くすることができ、 支持リード 3 Bの機械的強度を高めることができるので、 樹脂封止体 1 を 卜ランス ファモ一ルド法で形成する際、 ダイパッ ド 3 Aの上下方向の変動を抑 制することができる。  Further, as shown in FIG. 9, the resin-encapsulated semiconductor device has a structure in which the back surface of the lead portion 3B2 of the support lead 3B is positioned outside one surface of the resin-encapsulated body 1. May be configured. In this case, the thickness of the support lead 3B can be increased by an amount corresponding to the distance between the back surface of the lead portion 3B2 of the support lead 3B and one surface of the resin sealing body 1. Since the mechanical strength of 3B can be increased, when the resin sealing body 1 is formed by the trans-famould method, the vertical fluctuation of the die pad 3A can be suppressed.
(実施形態 2 )  (Embodiment 2)
本実施形態の樹脂封止型半導体装置は、 第 1 0図及び第 1 1図に示 すように、 ダイパッ ド 3 Aのチップ塔戟面に半導体チップ 2 を塔載し ている。  In the resin-encapsulated semiconductor device of the present embodiment, as shown in FIGS. 10 and 11, a semiconductor chip 2 is mounted on a chip stimulating surface of a die pad 3A.
前記半導体チップ 2の平面形状は、 例えば、 9 [ m m ] X 9 [ m m ] の外形寸法からなる正方形状で形成されている。 半導体チップ 2の主 面には、 その主面の各辺に沿って配列された複数個の外部端子 (ボン デイングパッ ド) 2 Aが配置されている。  The planar shape of the semiconductor chip 2 is, for example, a square shape having an outer dimension of 9 [mm] × 9 [mm]. On the main surface of the semiconductor chip 2, a plurality of external terminals (bonding pads) 2A are arranged along each side of the main surface.
前記半導体チップ 2の各辺の外側には、 その各辺に沿って配列され た複数本のリード 3 Cが配置されている。 この複数本のリード 3 Cの 夫々のインナ一部 3 C 1は、 ボンディングワイヤ 5を介して、 半導体 チップ 2の主面に配置された複数個の外部端子 2 Aの夫々に電気的に 接続されている。 Outside each side of the semiconductor chip 2, a plurality of leads 3C arranged along each side are arranged. Each inner part 3 C 1 of the plurality of leads 3 C is electrically connected to each of the plurality of external terminals 2 A arranged on the main surface of the semiconductor chip 2 via a bonding wire 5. It is connected.
前記ダイパッ ド 3 Aには 4本の支持リード 3 Bが一体化されている, この 4本の支持リード 3 Bの夫々は、 リードフレームの状態において. リードフレームの枠体にダイパッ ド 3 Aを支持している。 4本の支持 リード 3 Bの夫々は、 ダイパッ ド 3 Aを交点とする X字の形状になる 位置に配置されている。  The die pad 3A is integrated with four support leads 3B. Each of the four support leads 3B is in a state of a lead frame. The die pad 3A is mounted on a frame of the lead frame. I support it. Each of the four support leads 3B is arranged at a position where an X-shape is formed at the intersection of the die pad 3A.
前記半導体チップ 2、 ダイパッ ド 3 A、 リード 3 Cのインナ一部 3 C 1及びボンディングワイヤ等は、 トランスファモールド法で形成さ れた樹脂封止体 1で封止されている。  The semiconductor chip 2, the die pad 3A, the inner part 3C1 of the lead 3C, the bonding wire, and the like are sealed by a resin sealing body 1 formed by a transfer molding method.
前記樹脂封止体 1の平面形状は、 例えば、 14 [mm] X 14 [m m] の外形寸法からなる正方形状で形成されている。 この樹脂封止体 1の各辺の外側には、 複数本のリード 3 Cの夫々のアウター部 3 C 2 が配置されている。 複数本のリード 3 Cの夫々のアウター部 3 C 2は、 樹脂封止体 1の各辺に沿って配列され、 例えばガルウイング形状に成 形されている。  The planar shape of the resin sealing body 1 is, for example, a square shape having an outer dimension of 14 [mm] × 14 [mm]. Outer sides 3C2 of the leads 3C are arranged outside each side of the resin sealing body 1. Each outer portion 3C2 of the plurality of leads 3C is arranged along each side of the resin sealing body 1, and is formed, for example, in a gull wing shape.
前記ダイパッ ド 3 Aの平面形状は X字形状で形成されている。 この ダイパク ド 3 Aは半導体チップ 2の外形寸法よりも小さい外形寸法で 形成され、 かつ半導体チップ 2の平面積よりも小さい平面積で形成さ れている。 ダイパッ ド 3 Aは、 例えば最外部の平面積が 5 [mm] X 5 [mm] の X字形状の外形寸法で形成されている。  The planar shape of the die pad 3A is X-shaped. The dipack 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and is formed with a plane area smaller than the plane area of the semiconductor chip 2. The die pad 3A is formed, for example, with an X-shaped outer dimension having an outermost plane area of 5 [mm] X 5 [mm].
前記ダイパッ ド 3 Aのチップ塔載面と対向するその裏面は樹脂封止 体 1の一表面である下面よリもその内側に位置している。 ダイパッ ド 3 Aの裏面の中央領域は樹脂封止体 1の下面から露出され、 ダイパッ ド 3 Aの裏面の周辺領域は樹脂封止体 1の樹脂で覆われている。 即ち、 本実施形態の樹脂封止型半導体装置は、 ダイパッ ド 3 Aの裏面の中央 領域を樹脂封止体 1の下面から露出させた構造で構成されている。 ダ ィパツ ド 3 Aの裏面の中央領域の露出は、 樹脂封止体 1 を 卜ランスフ ァモールド法で形成する際、 ダイパッ ド 3 Aの裏面をモールド金型の イジェクタピンで支持することにより達成される。 The back surface of the die pad 3 A facing the chip tower surface is located inside the lower surface which is one surface of the resin sealing body 1. The central region on the back surface of the die pad 3A is exposed from the lower surface of the resin sealing body 1, and the peripheral region on the back surface of the die pad 3A is covered with the resin of the resin sealing body 1. That is, the resin-encapsulated semiconductor device of the present embodiment has The area is configured to be exposed from the lower surface of the resin sealing body 1. Exposure of the central region of the back surface of the dipad 3A is achieved by supporting the back surface of the die pad 3A with the ejector pins of the mold when the resin sealing body 1 is formed by the transfer molding method. .
前記半導体チップ 2の主面と対向するその裏面の中央領域は接着材 4を介在してダイパッ ド 3 Aのチップ塔載面に接着固定され、 その裏 面の周辺領域は樹脂封止体 1の樹脂で覆われている。  The central region of the back surface facing the main surface of the semiconductor chip 2 is bonded and fixed to the chip tower mounting surface of the die pad 3A with an adhesive 4 interposed therebetween, and the peripheral region of the back surface is formed of the resin sealing body 1. Covered with resin.
前記支持リード 3 Bは、 第 1 2図に示すように、 樹脂封止体 1で封 止されたリード 3 B 1 と、 樹脂封止体 1の一表面である下面から一表 面 (裏面) が露出されたリード部 3 B 2とで構成されている。 リード 部 3 B 1は、 その板厚方向(上下方向)において、 第 1 1図に示すリ一 ド 3 Cのインナ一部 3 C 1と同一の位置に位置し、 リード部 3 B 2は, その板厚方向(上下方向)において、 ダイパッ ド 3 Aの位置と同一の位 置に位置している。 即ち、 本実施形態の樹脂封止型半導体装置は、 ダ ィパジ ド 3 Aのチップ塔載面をリード 3 Cのインナ一部 3 C 1の上面 (ボンディング面)よリもその板厚方向に下げた構造で構成されている t 第 1 3図に示すように、 前記半導体チップ 2の厚さ寸法 Aは例えば 0. 2 [mm] に設定されている。 また、 前記樹脂封止体 1の厚さ寸 法 Bは例えば 0. 5 [mm] に設定されている。 また、 樹脂封止体 1 において、 半導体チップ 2の主面上での樹脂の厚さ寸法 B 1は例えば 0. 1 5 [mm] に設定され、 半導体チジプ 2の裏面上での樹脂の厚 さ寸法 B 2は例えば 0. 1 5 [mm] に設定されている。 また、 前記 ダイパッ ド 3 Aの厚さ寸法 Cは例えば 0. 1 1 [mm] に設定されて いる。 また、 前記樹脂封止型半導体装置の高さ寸法 Dは例えば 0. 6 〜0. 7 [mm] に設定されている。 このように構成された樹脂封止型半導体装置は、 第 1 4図に示すリ —ドフレーム 3 を用いた製造プロセスで形成されている。 As shown in FIG. 12, the support lead 3B is composed of a lead 3B1 sealed with a resin sealing body 1 and a front surface (back surface) from a lower surface which is one surface of the resin sealing body 1. And the exposed lead portion 3B2. The lead portion 3B1 is located at the same position as the inner part 3C1 of the lead 3C shown in FIG. 11 in the plate thickness direction (vertical direction), and the lead portion 3B2 is In the thickness direction (vertical direction), it is located at the same position as the position of the die pad 3A. That is, in the resin-encapsulated semiconductor device of the present embodiment, the chip mounting surface of the dipad 3A is lowered in the plate thickness direction from the upper surface (bonding surface) of the inner part 3C1 of the lead 3C. structure as shown in the first 3 Figure t is configured with a thickness dimension a of the semiconductor chip 2 is set to, for example, 0. 2 [mm]. The thickness dimension B of the resin sealing body 1 is set to, for example, 0.5 [mm]. In the resin sealing body 1, the thickness B 1 of the resin on the main surface of the semiconductor chip 2 is set to, for example, 0.15 [mm], and the thickness of the resin on the back surface of the semiconductor chip 2 is set. The dimension B2 is set to, for example, 0.15 [mm]. The thickness C of the die pad 3A is set to, for example, 0.11 [mm]. The height D of the resin-sealed semiconductor device is set to, for example, 0.6 to 0.7 [mm]. The resin-encapsulated semiconductor device thus configured is formed by a manufacturing process using a lead frame 3 shown in FIG.
次に、 前記樹脂封止型半導体装置の製造方法について説明する。 まず、 第 1 4図に示すリードフレーム 3を用意する。  Next, a method for manufacturing the resin-encapsulated semiconductor device will be described. First, a lead frame 3 shown in FIG. 14 is prepared.
次に、 前記リードフレーム 3のダイパッ ド 3 Aのチップ塔載面に接 着材 4 を多点塗布法で塗布する。  Next, an adhesive 4 is applied to the chip mounting surface of the die pad 3A of the lead frame 3 by a multi-point coating method.
次に、 前記ダイパッ ド 3 Aのチップ塔載面に接着材 4を介在して半 導体チップ 2を塔載する。 半導体チップ 2は接着材 4 を介在してダイ パツ ド 3 Aのチップ塔載面に接着固定される。  Next, the semiconductor chip 2 is mounted on the chip mounting surface of the die pad 3A with the adhesive 4 interposed therebetween. The semiconductor chip 2 is bonded and fixed to the chip mounting surface of the die pad 3A via the adhesive 4.
次に、 前記半導体チップ 2の外部端子 2 Aと、 前記リードフレーム 3のリード 3 Cのインナ一部 3 C 1 とをボンディングワイヤ 5で電気 的に接続する。  Next, the external terminals 2 A of the semiconductor chip 2 and the inner portions 3 C 1 of the leads 3 C of the lead frame 3 are electrically connected by bonding wires 5.
次に、 第 1 5図及び第 1 6図に示すように、 前記リードフレーム 3 をモールド金型 1 0の上型 1 0 Aと下型 1 0 Bとの間に配置し、 モ一 ルド金型 1 0の上型 1 0 Aと下型 1 0 Bとで形成されるキヤビティ 1 1内に、 半導体チップ 2、 ダイパッ ド 3 A、 支持リード 3 B、 リード 3 Cのインナ一部 3 C 1及びボンディングワイヤ 5等を配置すると共 に、 イジェクタピン 1 3の先端面にダイパッ ド 3 Aの裏面の中央領域 を接触させ、 このイジェクタピン 1 3でダイパッ ド 3 Aの裏面の中央 領域を支持する。 この時、 ま持リード 3 Bの弾性力により、 ダイパッ ド 3 Aの裏面はイジェクタピン 1 3の先端面に押圧される。 なお、 モ —ルド金型 1 0の流入ゲート 1 2は、 リードフレーム 3の上面及び下 面を通ってキヤビティ 1 1内に樹脂を充填する構造で構成されている。 また、 イジェクタピン 1 3は、 樹脂封止型 1 を形成した後、 キヤビテ ィ 1 1から樹脂封止体 1 を離脱させるためのものである。 次に、 前記モールド金型 1 0のポッ 卜からランナー及び流入ゲート 1 2を通してキヤビティ 1 1内に樹脂を加圧注入し、 ダイパッ ド 3 A の裏面をイジェクタピン 1 3で支持しながら樹脂封止体 1 を形成する, この工程において、 ダイパッ ド 3 Aの裏面がキヤ ビティ 1 1の内壁面 1 1 Aで支持されているので、 モールド金型 1 0のキヤ ビティ 1 1内 に加圧注入された樹脂の流れによって生じるダイパッ ド 3 Aの上下方 向の変動は抑制される。 また、 モールド金型 1 0のキヤ ビティ 1 1内 に加圧注入された樹脂の流れによって生じるダイパッ ド 3 Aの上下方 向の変動が抑制されるので、 半導体チップ 2の主面上での樹脂の流れ 及び半導体チップ 2の裏面上での樹脂の流れが良くなる。 また、 ダイ パッ ド 3 Aの裏面の中央領域がィジヱクタ ピン 1 3の先端面に接触さ れているので、 ダイパッ ド 3 Aの裏面の中央領域は樹脂封止体 1の一 表面である下面から露出される。 また、 ダイパッ ド 3 Aの裏面の中央 領域がィジ: Lクタピン 1 3の先端面に支持リ一ド 3 Bの弾性力によつ て押圧されているので、 ダイパッ ド 3 Aの裏面の中央領域に樹脂が廻 り込むことはない。 なお、 この工程において、 半導体チップ 2、 ダイ パッ ド 3 A、 支持リード 3 B、 リード 3 Cのインナ一部 3 C 1及びボ ンディングワイヤ 5等は樹脂封止体 1で封止され、 ダイパッ ド 3 Aの 裏面の中央領域及び支持リ一ド 3 Bのリード部 3 B 2の裏面は樹脂封 止体 1 の一表面である下面から露出される。 Next, as shown in FIGS. 15 and 16, the lead frame 3 was placed between the upper mold 10 A and the lower mold 10 B of the mold 10, and Inside the cavity 11 formed by the upper mold 10 A and the lower mold 10 B of the mold 10, the semiconductor chip 2, the die pad 3 A, the support lead 3 B, and the inner part of the lead 3 C 3 C 1 With the arrangement of the bonding wires 5 and the like, the center area of the back surface of the die pad 3A is brought into contact with the tip surface of the ejector pin 13 and the ejector pin 13 supports the center area of the back surface of the die pad 3A. . At this time, the back surface of the die pad 3A is pressed against the tip surface of the ejector pin 13 by the elastic force of the holding lead 3B. In addition, the inflow gate 12 of the mold 10 is configured to fill the cavity 11 with resin through the upper and lower surfaces of the lead frame 3. The ejector pins 13 are for removing the resin sealing body 1 from the cavity 11 after forming the resin sealing mold 1. Next, resin is injected under pressure into the cavity 11 from the pot of the mold 10 through the runner and the inflow gate 12, and the resin is sealed while supporting the back surface of the die pad 3 A with the ejector pins 13. In this step, the back surface of the die pad 3A is supported by the inner wall surface 11A of the cavity 11, so that the die pad 3A is pressurized and injected into the cavity 11 of the molding die 10. The upward / downward fluctuation of the die pad 3A caused by the flow of the resin is suppressed. In addition, since the upward and downward fluctuations of the die pad 3A caused by the flow of the resin injected under pressure into the cavity 11 of the mold 10 are suppressed, the resin on the main surface of the semiconductor chip 2 is suppressed. And the flow of the resin on the back surface of the semiconductor chip 2 is improved. In addition, since the central area of the rear surface of the die pad 3A is in contact with the tip surface of the indicator pin 13, the central area of the rear surface of the die pad 3 A is from the lower surface which is one surface of the resin sealing body 1. Will be exposed. In addition, the center area of the rear surface of the die pad 3A is pressed by the elastic force of the support lead 3B against the distal end surface of the L-cut pin 13 so that the center area of the rear surface of the die pad 3A is No resin will flow into the area. In this process, the semiconductor chip 2, the die pad 3A, the support lead 3B, the inner part 3C1 of the lead 3C1, the bonding wire 5, etc. are sealed with the resin sealing body 1, and the die pad The central region of the back surface of 3A and the back surface of the lead portion 3B2 of the support lead 3B are exposed from the lower surface which is one surface of the resin sealing body 1.
次に、 前記リードフ レーム 3の枠体 3 Eから支持リード 3 B及びリ —ド 3 Cを切断し、 その後、 リード 3 Cのアウター部 3 C 2をガルゥ ィング形状に成形することにより、 樹脂封止型半導体装置がほぼ完成 する。  Next, the support lead 3B and the lead 3C are cut from the frame 3E of the lead frame 3, and then the outer portion 3C2 of the lead 3C is formed into a gulling shape, thereby sealing the resin. The semiconductor device is almost completed.
このように、 本実施形態によれば、 以下の作用効果が得られる。 ( 1 ) 半導体チップ 2 と、 前記半導体チップ 2を塔載するダイパッ ド 3 Aと、 前記ダイパッ ド 3 Aをま持する支持リード 3 Bと、 前記半導 体チップ 2を封止する樹脂封止体 1 を有し、 前記ダイパッ ド 3 Aが前 記半導体チップ 2の外形寸法よりも小さい外形寸法で形成され、 前記 樹脂封止体 1がトランスファモールド法で形成される樹脂封止型半導 体装置であって、 前記ダイパッ ド 3 Aのチップ塔戟面と対向するその 裏面の中央領域を前記樹脂封止体 1の一表面から露出させた構造で構 成することにより、 樹脂封止体 1 を トランスファモールド法で形成す る際、 ダイパッ ド 3 Aの裏面の中央領域をモールド金型 1 0のイジェ クタピン 1 3で支持することができるので、 モールド金型 1 0のキヤ ビティ 1 1内に加圧注入された樹脂の流れによって生じるダイパッ ド 3 Aの上下方向の変動を抑制することができる。 この結果、 樹脂封止 体 1の厚さを 1 [ m m ] 以下に設定しても、 樹脂封止体 1から半導体 チップ 2、 ボンディ ングワイヤ 5等が露出する不具合を防止できるの で、 榭脂封止型半導体装置の薄型化を図ることができる。 As described above, according to the present embodiment, the following operational effects can be obtained. (1) A semiconductor chip 2, a die pad 3A on which the semiconductor chip 2 is mounted, a support lead 3B holding the die pad 3A, and a resin sealing for sealing the semiconductor chip 2. A resin-sealed semiconductor having a body 1, wherein the die pad 3 A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and wherein the resin-sealed body 1 is formed by a transfer molding method An apparatus, wherein a central region of a back surface of the die pad 3A opposite to a chip tower surface is configured to be exposed from one surface of the resin sealing body 1, whereby the resin sealing body 1 is formed. When the mold is formed by the transfer molding method, the center area on the back surface of the die pad 3A can be supported by the ejector pins 13 of the mold 10 so that the mold 11 can be supported in the cavity 11 of the mold 10. Generated by the flow of resin injected under pressure It is possible to suppress the vertical variation of that Daipa' de 3 A. As a result, even if the thickness of the resin sealing body 1 is set to 1 [mm] or less, a problem in which the semiconductor chip 2 and the bonding wires 5 are exposed from the resin sealing body 1 can be prevented. The thickness of the stop semiconductor device can be reduced.
( 2 ) 前記半導体チップ 2の裏面の中央領域を前記ダイパク ド 3 Aの チップ塔載面に接着材 4を介在して固定し、 前記半導体チップの裏面 の周辺領域を前記樹脂封止体 1の樹脂で覆うことにより、 ダイパッ ド 3 Aから半導体チップ 2の側面までの距離に相当する分、 ダイパッ ド 3 Aの露出領域から半導体チップ 2の主面に到達する水分侵入パス経 路を長くすることができるので、 ダイパッ ド 3 Aの裏面を樹脂封止体 1の一表面から露出させた構造で構成しても、 樹脂封止体型半導体装 置の耐湿性を確保することができる。  (2) The central region of the back surface of the semiconductor chip 2 is fixed to the chip mounting surface of the die chip 3A with an adhesive 4 interposed therebetween, and the peripheral region of the back surface of the semiconductor chip is formed of the resin sealing body 1. By covering with resin, the length of the moisture intrusion path from the exposed area of the die pad 3A to the main surface of the semiconductor chip 2 is increased by an amount corresponding to the distance from the die pad 3A to the side surface of the semiconductor chip 2. Therefore, even if the rear surface of the die pad 3A is configured to be exposed from one surface of the resin sealing body 1, the moisture resistance of the resin sealing type semiconductor device can be ensured.
( 3 ) 前記ダイパッ ド 3 Aの裏面の周辺領域を樹脂封止体 1の樹脂で 覆うことにより、 水分侵入パス経路を更に長くすることができる。 (4 ) 半導体チップ 2と、 前記半導体チップ 2を塔載するダイパッ ド 3 Aと、 前記ダイパッ ド 3 Aを支持する支持リード 3 Bと、 前記半導 体チップ 2を封止する樹脂封止体 1を有し、 前記ダイパッ ド 3 Aが前 記半導体チップ 2の外形寸法よリも小さい外形寸法で形成され、 前記 樹脂封止体 1がトランスファモールド法で形成される樹脂封止型半導 体装置の製造方法であって、 前記ダイパッ ド 3 Aの裏面をモールド金 型 1 0のイジェクタピン 1 3で支持しながら前記樹脂封止体 1 を形成 する工程を備えることにより、 モールド金型 1 0のキヤ ビティ 1 1内 に加圧注入された樹脂の流れによって生じるダイパッ ドの上下方向の 変動を抑制することができるので、 半導体チップ 2の主面上での樹脂 の流れ及び半導体チップ 2の裏面上での樹脂の流れが良くなる。 この 結果、 樹脂封止体 1に生じるボイ ドの発生を防止できるので、 樹脂封 止型半導体装置の製造プロセスでの歩留まりを高めることができる。 なお、 前記樹脂封止型半導体装置の製造方法において、 モールド金 型 1 0のキヤ ビティ 1 1の内壁面 1 1 Aに突起を設け、 この突起でダ ィパッ ド 3 Aの裏面の中央領域を支持してもよい。 (3) By covering the peripheral area on the back surface of the die pad 3A with the resin of the resin sealing body 1, the moisture intrusion path can be further lengthened. (4) The semiconductor chip 2, a die pad 3A on which the semiconductor chip 2 is mounted, a support lead 3B for supporting the die pad 3A, and a resin sealing body for sealing the semiconductor chip 2. 1, wherein the die pad 3A is formed with an outer dimension smaller than the outer dimension of the semiconductor chip 2, and the resin sealing body 1 is formed by a transfer molding method. A method for manufacturing the device, comprising the step of forming the resin sealing body 1 while supporting the back surface of the die pad 3A with the ejector pins 13 of the mold 10 to obtain the mold 10 Since the vertical fluctuation of the die pad caused by the flow of the resin injected under pressure into the cavity 1 can be suppressed, the flow of the resin on the main surface of the semiconductor chip 2 and the back surface of the semiconductor chip 2 can be suppressed. Good flow of resin It made. As a result, it is possible to prevent the occurrence of voids that occur in the resin-sealed body 1, thereby increasing the yield in the manufacturing process of the resin-sealed semiconductor device. In the method of manufacturing the resin-encapsulated semiconductor device, a protrusion is provided on the inner wall surface 11A of the cavity 11 of the mold die 10, and the protrusion supports the central region of the back surface of the die pad 3A. May be.
(実施形態 3)  (Embodiment 3)
本実施形態の樹脂封止型半導体装置は、 第 1 7図及び第 1 8図に示 すように、 ダイパッ ド 3 Aのチップ塔载面に半導体チップ 2を塔載し ている。  In the resin-encapsulated semiconductor device of the present embodiment, as shown in FIGS. 17 and 18, the semiconductor chip 2 is mounted on the chip tower of the die pad 3A.
前記半導体チップ 2は、 例えば、 単結晶珪素からなる半導体基板及 びその主面上に形成された配線層を主体とする構造で構成されている。 この場合の半導体チップ 2は、 3 X 1 0 [ 1 /°C1 程度の熱膨張係 数を有する。  The semiconductor chip 2 has a structure mainly composed of, for example, a semiconductor substrate made of single crystal silicon and a wiring layer formed on the main surface thereof. The semiconductor chip 2 in this case has a thermal expansion coefficient of about 3 × 10 [1 / ° C1].
前記半導体チップ 2の平面形状は、 例えば、 9 [mm] X 9 [mm] の外形寸法からなる正方形状で形成されている。 半導体チップ 2の主 面には、 その主面の各辺に沿って配列された複数個の外部端子(ボン デイングパッ ド) 2 Aが配置されている。 The planar shape of the semiconductor chip 2 is, for example, 9 [mm] X 9 [mm] It is formed in a square shape having the external dimensions of. On the main surface of the semiconductor chip 2, a plurality of external terminals (bonding pads) 2A arranged along each side of the main surface are arranged.
前記半導体チップ 2の各辺の外側には、 その各辺に沿つて配列され た複数本のリード 3 Cが配置されている。 この複数本のリード 3じの 夫々のインナ一部 3 C 1は、 ボンディングワイヤ 5を介して、 半導体 チップ 2の主面に配置された複数個の外部端子 2 Aの夫々に電気的に 接続されている。  Outside each side of the semiconductor chip 2, a plurality of leads 3C arranged along each side are arranged. Each inner part 3 C 1 of the plurality of leads 3 is electrically connected to each of a plurality of external terminals 2 A arranged on the main surface of the semiconductor chip 2 via bonding wires 5. ing.
前記ダイパッ ド 3 Aには 4本の支持リード 3 Bが一体化されている。 この 4本の支持リード 3 Bの夫々は、 リードフレームの状態において、 リードフレームの枠体にダイパッ ド 3 Aを支持している。 4本の支持 リード 3 Bの夫々は、 X字の形状になる位置に配置されている。  Four support leads 3B are integrated with the die pad 3A. Each of the four support leads 3B supports the die pad 3A on the lead frame in the state of the lead frame. Each of the four support leads 3B is arranged at a position where the X-shaped shape is formed.
前記半導体チップ 2、 ダイパッ ド 3 A、 支持リード 3 B、 リード 3 Cのインナ一部 3 C 1及びボンディングワイヤ 5等は、 トランスファ モールド法で形成された樹脂封止体 1で封止されている。 樹脂封止体 1は、 低応力化を図る目的として、 例えば、 フヱノール系硬化剤、 シ リコーン及びフィ ラー等が添加されたビフエニール系又はオルソクレ ゾ一ルノボラック系樹脂で形成されている。 この場合の樹脂封止体 1 は、 1 3 X 1 0— 6 [ 1 /で] 程度の熱膨張係数を有する。 The semiconductor chip 2, the die pad 3A, the support lead 3B, the inner part 3C1 of the lead 3C1, the bonding wire 5, and the like are sealed with a resin sealing body 1 formed by a transfer molding method. . The resin sealing body 1 is formed of, for example, a biphenyl-based resin or an ortho-cresol novolac-based resin to which a phenol-based curing agent, silicone, filler, and the like are added for the purpose of reducing stress. Resin sealing body 1 in this case has a 1 3 X 1 0- 6 [1 / in] about the thermal expansion coefficient.
前記樹脂封止体 1の平面形状は、 例えば、 1 4 [ m m ] X 1 4 [ m m ] の外形寸法からなる正方形状で形成されている。 この樹脂封止体 1の各辺の外側には、 複数本のリード 3 Cの夫々のアウター部 3 C 2 が配置されている。 複数本のリード 3 Cの夫々のァウタ一部 3 C 2は、 樹脂封止体 1の各辺に沿って配列され、 例えばガルウイ ング形状に成 形されている。 前記ダイパッ ド 3 Aの平面形状は X字形状で形成されている。 ダイ ノヽ。'ソ ド 3 Aは 4つの部分 3 A 1で構成され, この 4つの部分 3 A 1 の 夫々の幅寸法は例えば 1 [ m m ] に設定されている。 ダイパッ ド 3 A は、 半遒体チップ 2の平面積よリも小さい平面積で形成されている。 前記ダイパジ ド 3 Aのチップ塔載面と対向するその裏面の全領域は 樹脂封止体 1の一表面である下面から露出されている。 また、 ダイパ ッ ド 3 Aの裏面は、 樹脂封止体 1の下面の位置と同一の位置に位置し ている。 即ち、 本実施形態の樹脂封止型半導体装置は、 ダイパッ ド 3 Aの裏面の全領域を樹脂封止体 1の下面から露出させた構造で構成さ れている。 ダイパッ ド 3 Aの裏面の全領域の露出は、 樹脂封止体 1 を トランスファモールド法で形成する際、 ダイパッ ド 3 Aの裏面をモ一 ルド金型のキヤ ビティの内壁面で支持することによ リ達成される。 前記支持リード 3 Bは、 図 1 9に示すように、 リード部 3 B 1 とリ ード部 3 B 2とで構成されている。 リード部 3 B 1は、 その板厚方向 において、 図 1 8に示すリード 3 Cのインナ一部 3 C 1 と同一の位置 に位置し、 リード部 3 B 2は、 その板厚方向において、 ダイパッ ド 3 Aと同一の位置に位置している。 即ち、 本実施形態の樹脂封止型半導 体装置は、 ダイパッ ド 3 Aのチップ塔載面をリード 3 Cのィンナ一部 3 C 1の上面(ボンディング面)よりもその板厚方向に下げた構造で構 成されている。 The planar shape of the resin sealing body 1 is, for example, a square shape having an outer dimension of 14 [mm] X 14 [mm]. Outer sides 3C2 of the leads 3C are arranged outside each side of the resin sealing body 1. The respective outer portions 3C2 of the plurality of leads 3C are arranged along each side of the resin sealing body 1 and formed, for example, in a gull-wing shape. The planar shape of the die pad 3A is X-shaped. Dino. 'The source 3A is composed of four parts 3A1, and the width of each of the four parts 3A1 is set to, for example, 1 [mm]. The die pad 3 A is formed with a plane area smaller than the plane area of the semiconductor chip 2. The entire area of the rear surface of the die pad 3A facing the chip tower mounting surface is exposed from the lower surface, which is one surface of the resin sealing body 1. Further, the back surface of the die pad 3A is located at the same position as the position of the lower surface of the resin sealing body 1. That is, the resin-sealed semiconductor device of the present embodiment has a structure in which the entire region on the back surface of the die pad 3A is exposed from the lower surface of the resin-sealed body 1. Exposing the entire area of the back surface of the die pad 3A is to support the back surface of the die pad 3A with the inner wall surface of the mold mold cavity when the resin sealing body 1 is formed by the transfer molding method. Is achieved. As shown in FIG. 19, the support lead 3B includes a lead portion 3B1 and a lead portion 3B2. The lead portion 3B1 is located at the same position as the inner part 3C1 of the lead 3C shown in FIG. 18 in the thickness direction, and the lead portion 3B2 is the die pad in the thickness direction. Is located in the same position as C3A. That is, in the resin-encapsulated semiconductor device of the present embodiment, the chip tower mounting surface of the die pad 3A is lowered in the plate thickness direction from the upper surface (bonding surface) of the inner part 3C1 of the lead 3C. It has a structured structure.
前記半導体チップ 1の主面と対向するその裏面において、 互いに対 向する 2つの夫々の角部を結ぶ対角線領域は、 図 1 9に示すように、 接着材 4 を介在してダイパッ ド 3 Aのチップ塔載面に接着固定され、 その他の領域は、 図 1 8に示すように、 樹脂封止体 1の樹脂で覆われ ている。 接着材 4は、 例えば、 エポキシ系の銀 (A g ) ペースト材で 形成されている。 接着材 4は、 ダイパッ ド 3 Aのチップ塔載面に多点 塗布法で塗布される。 On the back surface of the semiconductor chip 1 facing the main surface, a diagonal region connecting the two corners facing each other is, as shown in FIG. 19, formed on the die pad 3A with the adhesive 4 interposed therebetween. The other area is covered with the resin of the resin sealing body 1 as shown in FIG. The adhesive 4 is, for example, an epoxy silver (Ag) paste material. Is formed. The adhesive 4 is applied to the chip tower mounting surface of the die pad 3A by a multi-point application method.
前記半導体チップ 1の裏面の対角線領域は、 ダイパッ ド 3 Aのチッ プ塔載面の全領域に塗布された接着材 4で接着固定されている。  The diagonal region on the back surface of the semiconductor chip 1 is bonded and fixed with the adhesive 4 applied to the entire region of the chip pad mounting surface of the die pad 3A.
このように構成された樹脂封止型半導体装置は第 2 0図に示すリ一 ドフレーム 3を用いた製造プロセスで形成されている。 リードフレー ム 3は、 例えば 1 7 X 1 0, [ 1 / °C ] 程度の熱膨張係数を有する銅 ( C u )で形成されている。  The resin-encapsulated semiconductor device thus configured is formed by a manufacturing process using a lead frame 3 shown in FIG. The lead frame 3 is made of, for example, copper (Cu) having a thermal expansion coefficient of about 17 × 10, [1 / ° C].
このように、 X字形状からなるダイパッ ド 3 Aのチップ塔載面に半 導体チップ 2を塔載し、 この半導体チップ 2を樹脂封止体 1で封止す る樹脂封止型半導体装置であって、 前記半導体チップ 2を、 前記ダイ パッ ド 3 Aのチップ塔載面の全領域に塗布された接着材 4で接着固定 することにより、 ダイパッ ド 3 Aと半導体チップ 2との熱膨張係数の 差に起因する熱応力を分散することができ、 熱応力による半導体チッ プ 2の破損を防止できるので、 半導体チップ 2との熱膨張係数の差が 大きい銅(C u )からなる X字形状のダイパッ ド 3 Aに半導体チップ 2 を塔載することができる。  As described above, a resin-sealed semiconductor device in which the semiconductor chip 2 is mounted on the chip mounting surface of the X-shaped die pad 3 A and the semiconductor chip 2 is sealed with the resin sealing body 1. The semiconductor chip 2 is bonded and fixed with an adhesive 4 applied to the entire area of the chip mounting surface of the die pad 3A, so that the coefficient of thermal expansion between the die pad 3A and the semiconductor chip 2 is increased. X-shape made of copper (Cu), which has a large difference in thermal expansion coefficient from the semiconductor chip 2 because it can disperse the thermal stress caused by the difference in thermal expansion and prevent the semiconductor chip 2 from being damaged by the thermal stress. The semiconductor chip 2 can be mounted on the die pad 3A.
なお、 前記樹脂封止型半導体装置は、 図 2 1 に示すリードフレーム 3を用いた製造プロセスで形成してもよい。 この場合においても、 本 実施形態と同様の効果が得られる。  The resin-sealed semiconductor device may be formed by a manufacturing process using the lead frame 3 shown in FIG. In this case, the same effect as that of the present embodiment can be obtained.
以上、 本発明者によってなされた発明を、 前記実施形態に基づき具 体的に説明したが、 本発明は、 前記実施形態に限定されるものではな く、 その要旨を逸脱しない範囲において種々変更可能であることは勿 tm める。 産業上の利用可能性 As described above, the invention made by the inventor has been specifically described based on the above-described embodiment. However, the present invention is not limited to the above-described embodiment, and can be variously modified without departing from the gist thereof. Of course. Industrial applicability
樹脂封止型半導体装置の薄型化を図ることができる。  The thickness of the resin-encapsulated semiconductor device can be reduced.
また、 樹脂封止型半導体装置の歩留まりを高めることができる。  Further, the yield of the resin-encapsulated semiconductor device can be improved.

Claims

請 求 の 範 囲 The scope of the claims
1 . 半導体チップと、 前記半導体チップを塔戟するダイパッ ドと、 前記ダイパジ ドを支持する支持リードと、 前記半導体チップを封止す る樹脂封止体を有し、 前記ダイパッ ドが前記半導体チップの外形寸法 よりも小さい外形寸法で形成され、 前記樹脂封止体がトランスファモ —ルド法で形成される樹脂封止型半導体装置であって、 前記ダイパッ ドのチップ塔戟面と対向するその裏面を前記樹脂封止体の一表面から 露出させた構造で構成されていることを特徴とする樹脂封止型半導体 装置。 1. A semiconductor chip, comprising: a die pad that stimulates the semiconductor chip; a support lead that supports the die pad; and a resin sealing body that seals the semiconductor chip. A resin-sealed semiconductor device formed with an outer dimension smaller than the outer dimension of the die pad, wherein the resin-encapsulated body is formed by a transfer mold method, and a back surface of the die pad facing a chip tower surface of the die pad. A resin-sealed semiconductor device having a structure in which is exposed from one surface of the resin-sealed body.
2 . 前記半導体チップの裏面の中央領域は前記ダイパッ ドのチップ 塔载面に接着材を介在して固定され、 前記半導体チップの裏面の周辺 領域は前記樹脂封止体の樹脂で覆われていることを特徴とする請求の 範囲第 1項に記載の樹脂封止型半導体装置。  2. The central region on the back surface of the semiconductor chip is fixed to the chip tower surface of the die pad via an adhesive, and the peripheral region on the back surface of the semiconductor chip is covered with the resin of the resin sealing body. The resin-encapsulated semiconductor device according to claim 1, wherein:
3 . 前記ダイパッ ドの裏面は、 前記樹脂封止体の一表面と同一の位 置に位置していることを特徴とする請求の範囲第 1項又は請求の範囲 第 2項に記載の樹脂封止型半導体装置。  3. The resin sealing device according to claim 1, wherein the back surface of the die pad is located at the same position as one surface of the resin sealing body. Stop type semiconductor device.
4 . 前記ダイパッ ドの裏面は、 前記樹脂封止体の一表面よ りもその 内側に位置していることを特徴とする請求の範囲第 1項又は請求の範 囲第 2項に記載の樹脂封止型半導体装置。  4. The resin according to claim 1 or claim 2, wherein the back surface of the die pad is located inside one surface of the resin sealing body. Sealed semiconductor device.
5 . 前記ダイパッ ドの裏面は、 前記樹脂封止体の一表面よりもその 外側に位置していることを特徴とする請求の範囲第 1項又は請求の範 囲第 2項に記載の樹脂封止型半導体装置。  5. The resin seal according to claim 1 or claim 2, wherein a back surface of the die pad is located outside one surface of the resin seal body. Stop type semiconductor device.
6 . 前記ダイパッ ドの平面形状は円形状又は方形状若しくは X字形 状で形成されていることを特徴とする請求の範囲第 1項乃至請求の範 囲第 5項のうちいずれか 1項に記載の樹脂封止型半導体装置。 6. The planar shape of the die pad is formed in a circular shape, a square shape, or an X-shape. 6. The resin-encapsulated semiconductor device according to any one of the items 5 to 5.
7 . 前記樹脂封止体は、 1 [ m m ] 以下の厚さに設定されているこ とを特徴とする請求の範囲第 1項乃至請求の範囲第 6項のうちいずれ か 1項に記載の樹脂封止型半導体装置。  7. The method according to any one of claims 1 to 6, wherein the resin sealing body is set to a thickness of 1 [mm] or less. Resin-sealed semiconductor device.
8 . 半導体チップと、 前記半導体チップを塔載するダイパッ ドと、 前記ダイパッ ドを支持する支持リードと、 前記半導体チップを封止す る樹脂封止体を有し、 前記ダイパッ ドが前記半導体チップの外形寸法 サイズよりも小さい外形寸法で形成され、 前記樹脂封止体が卜ランス ファモールド法で形成される樹脂封止型半導体装置の製造方法であつ て、 前記ダイパッ ドのチップ塔载面と対向するその裏面をモールド金 型のキヤ ビティの内壁面で支持しながら前記樹脂封止体を形成するェ 程を備えたことを特徴とする樹脂封止型半導体装置の製造方法。  8. A semiconductor chip, a die pad on which the semiconductor chip is mounted, a support lead for supporting the die pad, and a resin sealing body for sealing the semiconductor chip, wherein the die pad is the semiconductor chip A method for manufacturing a resin-encapsulated semiconductor device, wherein the external dimensions are smaller than the external dimensions of the die pad, wherein the resin encapsulant is formed by a transfer molding method. A method of manufacturing a resin-encapsulated semiconductor device, comprising the step of forming the resin-encapsulated body while supporting the opposing back surface on the inner wall surface of a cavity of a mold.
9 . 半導体チップと、 前記半導体チップを塔載するダイパッ ドと、 前記ダイパク ドに一体化された支持リードと、 前記半導体チップを封 止する樹脂封止体を有し, 前記ダイパッ ドが前記半導体チップの外形 寸法サイズよりも小さい外形寸法で形成され、 前記樹脂封止体が卜ラ ンスファモールド法で形成される樹脂封止型半導体装置の製造方法で あって、 前記ダイパッ ドのチップ塔載面と対向するその裏面をイジェ クタピンで支持しながら前記樹脂封止体を形成する工程を備えたこと を特徴とする樹脂封止型半導体装置の製造方法。  9. A semiconductor chip, a die pad on which the semiconductor chip is mounted, a support lead integrated with the die pad, and a resin sealing body for sealing the semiconductor chip, wherein the die pad is A method of manufacturing a resin-encapsulated semiconductor device, wherein the external dimensions are smaller than the external dimensions of a chip, and wherein the resin-encapsulated body is formed by a transfer molding method. A method for manufacturing a resin-encapsulated semiconductor device, comprising a step of forming the resin-encapsulated body while supporting a back surface facing the surface with an ejector pin.
1 0 . 前記ダイパッ ドの平面形状は円形状又は方形状若しくは X字 形状で形成されていることを特徴とする請求の範囲第 8項又は請求の 範囲第 9項に記載の樹脂封止型半導体装置の製造方法。  10. The resin-encapsulated semiconductor according to claim 8 or claim 9, wherein a planar shape of the die pad is formed in a circular shape, a square shape, or an X-shape. Device manufacturing method.
1 1 . 前記樹脂封止体は、 1 [ m m ] 以下の厚さに設定されている ことを特徴とする請求の範囲第 8項乃至請求の範囲第 1 0項のうちい ずれか 1項に記載の樹脂封止型半導体装置の製造方法。 11. The resin molded body according to any one of claims 8 to 10, wherein the thickness of the resin sealing body is set to 1 [mm] or less. 2. The method for manufacturing a resin-sealed semiconductor device according to claim 1.
1 2 . X字形状からなるダイパッ ドのチップ塔載面に半導体チップ を塔載し、 この半導体チップを樹脂封止体で封止する樹脂封止型半導 体装置であって、 前記半導体チップが、 前記ダイパッ ドのチップ塔載 面のほぼ全領域に塗布された接着材を介在して接着固定されているこ とを特徴とする樹脂封止型半導体装置。  12. A resin-sealed semiconductor device in which a semiconductor chip is mounted on a chip mounting surface of an X-shaped die pad and the semiconductor chip is sealed with a resin-sealed body. A resin-encapsulated semiconductor device, wherein the semiconductor device is adhered and fixed with an adhesive applied to almost the entire area of the chip tower mounting surface of the die pad.
1 3 . 前記ダイパジ ドは、 銅材からなることを特徴とする請求の範 囲第 1 2項に記載の樹脂封止型半導体装置。  13. The resin-sealed semiconductor device according to claim 12, wherein the die pad is made of a copper material.
PCT/JP1996/002418 1996-08-29 1996-08-29 Resin-sealed semiconductor device and method of manufacturing the same WO1998009329A1 (en)

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JPS63204753A (en) * 1987-02-20 1988-08-24 Nitto Electric Ind Co Ltd Semiconductor device
JPH03263359A (en) * 1990-03-13 1991-11-22 Nec Corp Molded flat package
JPH04184944A (en) * 1990-11-20 1992-07-01 Citizen Watch Co Ltd Sealing method for ic with resin
JPH0555410A (en) * 1991-08-28 1993-03-05 Hitachi Ltd Semiconductor device
JPH0637209A (en) * 1992-07-14 1994-02-10 Kyocera Corp Semiconductor device
JPH06209054A (en) * 1993-01-08 1994-07-26 Mitsubishi Electric Corp Semiconductor device
JPH06268146A (en) * 1993-03-15 1994-09-22 Toshiba Corp Semiconductor device
JPH0722451A (en) * 1993-07-07 1995-01-24 Hitachi Ltd Semiconductor manufacturing apparatus

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63204753A (en) * 1987-02-20 1988-08-24 Nitto Electric Ind Co Ltd Semiconductor device
JPH03263359A (en) * 1990-03-13 1991-11-22 Nec Corp Molded flat package
JPH04184944A (en) * 1990-11-20 1992-07-01 Citizen Watch Co Ltd Sealing method for ic with resin
JPH0555410A (en) * 1991-08-28 1993-03-05 Hitachi Ltd Semiconductor device
JPH0637209A (en) * 1992-07-14 1994-02-10 Kyocera Corp Semiconductor device
JPH06209054A (en) * 1993-01-08 1994-07-26 Mitsubishi Electric Corp Semiconductor device
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