WO1998006065A1

WO1998006065A1 - Three-dimensional image processor

Info

Publication number: WO1998006065A1
Application number: PCT/JP1996/002199
Authority: WO
Inventors: Masahiro Shiraishi; Takatoshi Ueno; Kazunori Oniki
Original assignee: Hitachi, Ltd.; Hitachi Process Computer Engineering, Inc.
Priority date: 1996-08-05
Filing date: 1996-08-05
Publication date: 1998-02-12

Abstract

A three-dimensional image processor which performs antialiasing with a small memory capacity in a short time. The image processor is provided with an image memory (300) comprising an occupying pattern storage (330) in which occupying patterns are stored, a luminance storage (340) in which the luminance of the first picture element is stored, an all occupation depth storage (350) in which the depth of the first picture element whose occupying pattern is 100 % is stored, a frame buffer in which the information on these individual picture elements is stored, and a Z-buffer (320), a picture element information calculating section (210) which calculates occupying patterns in units of one picture element, and a picture element comparing and calculating section (220) which calculates the information to be stored in the memory (300). Since this image processor performs antialiasing at a high speed for one image, an increase of the capacity of memory per picture element is suppressed and the manufacturing cost of the image processor is low.

Description

Specification

3D image processing equipment

The present invention relates to a three-dimensional image processing apparatus that performs high-quality ghost display by anti-aliasing processing. Background art

When a graphic is displayed on a display device such as a raster-scan display, diagonal sides of the graphic are jagged. This depends on whether or not the pixels that make up the display device are included in the graphic area, and determines whether the pixel is displayed with the luminance of the graphic or the luminance of the background outside the frame of the graphic. This is a phenomenon that occurs due to To solve this phenomenon, as an anti-aliasing process that eliminates jagged edges on the diagonal side that occurs when drawing a figure, the shape of the figure is determined by how much the area of the figure is included in the pixel. The method of blending the brightness of the background and the brightness of the background has been adopted.

For example, in Japanese Patent Application Laid-Open No. Hei 4-233086, the anti-aliasing process is performed by shifting the coordinates of the same figure a plurality of times and setting the brightness as the brightness when displaying the average of all the brightnesses. This method requires processing time for the number of times of drawing.

In addition, a method that draws a figure in units of sub-pixels and uses the luminance to display the average of the luminance of the sub-pixels included in one pixel requires a device to store luminance and depth information for each sub-pixel. There is. For example, dividing one pixel into 4x4 sub-pixels to perform this method would require 16 times as much storage.

As described above, in the conventional example, the processing time is long, so the processing speed is increased. In addition, there were problems such as the fact that it was costly because many storage devices were required.

An object of the present invention is to realize processing equivalent to the above-described antialiasing processing with a short processing time and a small number of storage devices. Disclosure of the invention

In the present invention, information such as luminance and depth is stored in units of one pixel. Then, in the unit of sub-pixel, only whether or not it is included in the graphic area to be drawn is stored as an occupation pattern. Then, based on the occupation pattern, the ratio of the region of the foreground figure and the background is calculated, and the luminance of the figure of the foreground and the luminance of the background are blended according to the ratio, so that one drawing is performed. To achieve anti-aliasing.

When drawing a figure, the luminance of a drawing pixel constituting the figure, the depth of the drawing pixel, and the occupation pattern of the drawing pixel are calculated. First, the depth of the drawing pixel is compared with the depth of the drawing pixel in the total occupied depth storage device, and if the depth of the drawing pixel is deeper, the drawing of the view is drawn. Abort. If the depth of the drawing pixel is nearer or equal, the occupancy pattern of the same coordinates as the drawing pixel in the occupation pattern storage device is compared with the occupancy pattern of the drawing pixel. However, if even some of the graphic areas overlap, it is determined that the foreground pixel that has already been rendered on the pixel of the same coordinates and the pixel of the rendered pixel are not continuous. When the occupied patterns do not overlap, the luminance of the luminance storage device at the same coordinates as the drawing pixel is compared with the luminance of the drawing pixel. If the occupied patterns are approximate values, the drawing is already performed at the same coordinates. It is determined that the foreground pixel and the drawing pixel are continuous. As a result of the comparison, if the values are not approximate values, the most recently drawn at the same coordinates It is determined that the previous pixel and the pixel of the drawing pixel are not continuous. After determining whether or not the pixel is a continuous pixel as described above, the ratio of the figure area of the occupation pattern of the drawing pixel and the occupation pattern of the occupation pattern storage device having the same coordinates as the drawing pixel is determined. The luminance and the luminance of the luminance storage device having the same coordinates as the drawing pixel are rendered and stored in the frame buffer.

If the pattern is determined to be continuous, the occupation pattern of the occupation pattern storage device and the graphic area of the occupation pattern of the drawing pixel are combined and stored in the occupation pattern storage device. If it is determined that the drawing pixel is not continuous, the drawing force is stored in the occupation pattern storage device if the drawing force is closer to the depth force of the drawing pixel. Pixel Depth Force If the depth of the z-buffer at the same coordinate is farther than the depth, the occupation pattern of the occupation pattern storage device is stored as it is.

Since the occupation pattern of the occupation pattern storage device is used as a blend ratio when drawing a figure with respect to the pixel having the same coordinates later, the occupation pattern to the occupation pattern storage device described above is used. Remembering is a necessary process.

In a three-dimensional image processing device, an object with a complicated shape is displayed by continuously combining small polygons. By taking advantage of the fact that adjacent polygons do not overlap each other and that the luminance is likely to be an approximate value, a series of multiple polygons Combine, treat as one polygon, and blend in brightness. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a diagram showing an overall block diagram of hardware of the present embodiment, FIG. 2 is a diagram showing an overall flow of hardware of the present embodiment, and FIG. Fig. 4 shows each image memory. FIG. 5 is a diagram showing a process of a pixel comparison operation unit, FIG. 6 is a diagram showing a block diagram of a luminance approximate value determination, and FIG. FIG. 8 is a diagram showing a selection of a process of the ghost information calculation unit. FIG. 8 is a diagram showing a detailed flow of the pixel comparison calculation unit. FIG. 9 is a calculation procedure of an occupation pattern in the pixel information calculation unit. FIG. 10 is a diagram illustrating the role of the total occupied depth storage device, FIG. 11 is a diagram illustrating determination of continuous pixels based on the occupation pattern, and FIG. 12 is a diagram illustrating FIG. 13 is a diagram illustrating an example of a luminance calculation process. FIG. 13 is a diagram illustrating another example of a luminance calculation process. FIG. 14 is a diagram illustrating an example of obtaining an occupation pattern. FIG. 15 is a diagram showing an example of erroneously determining a continuous pixel.

BEST MODE FOR CARRYING OUT THE INVENTION

The best mode for carrying out the present invention will be described with reference to FIGS. 1 to 15. FIG. 1 is an overall block diagram of the hardware according to the present invention, and FIG. 2 is a flowchart showing an outline of the processing in the hardware.

This hardware consists of a central processing unit (100) connected to the system bus (100), a rendering processor (200), and a display for displaying the processing results of the rendering processor (200). It consists of control means (400) and CRT (500). The rendering processor (200) is connected to an image memory (300) for storing the processing results and intermediate processing results, and the display control means is stored in this image memory. The processing result is displayed on the CRT (500). The vertex coordinates, vertex luminance, and vertex depth of the three-dimensional figure to be rendered are calculated by a central processing unit (100) having a CPU and a memory, and issued to a rendering processor via a system bus ( 1) and the rendering processor In the pixel information calculation unit (2100) of (200), the coordinates of the pixels constituting the figure from the vertex coordinates, the vertex luminance, and the vertex depth, the brightness of the pixel to be drawn, the depth of the drawing pixel, and the Calculate the occupancy pattern of ghosts (2). Next, in the pixel comparison operation unit (220) of the rendering processor (200), the luminance to be displayed is calculated from the calculated pixel information. When calculating the display brightness in the design-comparison operation unit (200), a ghost image memory (300) is used, and the calculated brightness is stored in the image memory (300).

(3). Then, the luminance information stored in the frame buffer (310) in the image memory (300) is displayed on the CRT (500) by the display control means (400) (4).

FIG. 3 shows the configuration of the image memory (300), and FIG. 4 shows the role of each memory. The image memory (300) stores a frame buffer (311) in which the averaged luminance (311) of the pixel (31) viewed from the viewpoint direction (30) is displayed for display on the CRT. 3 10 0), Z buffer (3 2 0) that records the depth of the nearest pixel (3 2 1), and the occupancy pattern of the nearest pixel

An occupancy pattern storage device (340) that stores (331), a brightness storage device (340) that stores the brightness (334) of the foremost pixel, and a figure of the occupation pattern It consists of an occupied depth storage device ('350) which stores the depth (351) of the foremost pixel such that the area is 100%.

The configuration of each memory corresponding to one pixel is as follows: the frame buffer (310) has 24 bits, the Z buffer (320) has 24 bits, and the occupied pattern storage device (330) has 1 bit. The 6-bit luminance storage device (340) has 24 bits, and the total occupied depth storage device (350) has 24 bits. Frame buffer

(310) and the luminance storage device (340) are the luminance R component of the 23rd to 16th bits, the luminance G component of the 15th to 8th bits, and the 7th to 0th bits. Brightness B Consist of minutes. The occupation pattern storage device (330) stores information of 16 sub-pixels included in one pixel as an occupation pattern of 16 bits. In the present embodiment, when the anti-aliasing process is not performed, the memory configuration is about 2.3 times as large as that of the frame buffer (310) and the Z buffer (320) only when the anti-aliasing process is performed. To achieve.

The detailed block diagrams of the rendering processor (200) are shown in Figs. 5, 6, and 7, and the detailed flow is shown in Fig. 8. The occupancy pattern of the image information calculation unit (210) is shown in Figs. Fig. 9 shows the processing in the calculation unit. First, the CPU (100) issues the vertex coordinates, vertex depth, and IS point luminance of the figure (triangle in this embodiment) from the CPU (100), and the hardware of the rendering processor (200) executes the operation. The screen information calculation unit (210) receives these vertex information. From the coordinates of the vertices received from the CPU (100), the vertex luminance, and the depth of the term, the rendering processor (200) calculates the coordinates of the pixels constituting the figure, the luminance of the drawing pixels, A pixel information calculation unit for calculating the depth of the drawing pixel and the occupation pattern of the drawing pixel in the sub-pixel

(210) and a pixel comparison operation unit (220) for calculating information to be stored in the image memory (300) from the pixel information.

As shown in Fig. 9, the pixel information calculation unit (210) supplements the X value between vertices in the Y coordinate direction in quarter pixel units based on the received vertex information. Calculate the frame of the area (41). Next, the subpixel whose center point is equal to or greater than the left frame and less than the right frame is set to “0”, and if not included, is set to “1” (42). After calculating the values of all the sub-pixels in one pixel constituting the figure, the value is transferred to the pixel comparison operation unit (220) as a 16-bit occupation pattern (43). At the same time, the luminance of the pixel at the same coordinate and the depth of the pixel at the same coordinate are transferred to the pixel comparison operation unit (2220). In the following, unless otherwise specified, the information of each memory in the image memory (300) is the information of the memory having the same coordinates as the drawing pixel.

As shown in FIGS. 5 and 10, the pixel comparison operation unit (220) first stores the depth Z (33) of the picture pixel (35) and the total occupied depth storage device (350). ) Is compared with the depth AB (3 5 2) (2 2 1). When the drawing pixel (35) is deeper (when CO becomes 0), the state of the pixel (36) viewed from the viewpoint direction (32) is changed to the pixel (34) in front. The drawing pixel

(35) is hidden and invisible. Therefore, the information of the frame buffer (310) needs to be updated, and the drawing of the pixel is stopped (17). If the drawing pixel (35) is closer or equal in depth (when CO becomes 1), then the occupation pattern P of the drawing pixel and the occupation pattern storage device (330) are stored. A logical sum (P | SB) is obtained for each bit between the stored occupation pattern SB (2 2 2), and the figure area portion of each occupation pattern (the bit force of the occupation pattern '0') Is determined as to whether or not they overlap, ie, whether or not all the bit forces '1' as a result of the bit-wise OR are obtained. As shown in FIG. 11, as for the pixel (53) adjacent to the figure (51) and the figure (52), the pixel (53) in the figure (51)

The result (56) of the bit-wise OR of the occupation pattern (54) of (53) and the occupation pattern (55) of the pixel (53) in the figure (52) is (56) in which all bits are '1'. The pixel (59) overlapping the figure (57) and the figure (58) is the occupied pattern (60) of the pixel (59) in the figure (57) and the figure (58). The result (62) of the bit-wise OR of the pixel (59) with the occupation pattern (61) of the pixel (59) at the point becomes the bit power '' 0 'of the overlapped portion.

In other words, by calculating the bit-wise logical OR, the occupation pattern of the drawing pixel and the It is possible to determine whether or not the graphic area portion overlaps with the occupation pattern stored in the occupation pattern storage device (330).

As a result of calculating the logical sum in units of bits (2 2 2), if the bit power of all 16 bits is '1' (〇 1 1), the figure area of the occupied pattern of each other Are not overlapped, the brightness I of the drawing pixel is compared with the brightness IB of the brightness storage device (340) (223), and it is determined whether or not these values are approximate values. Is determined. In this judgment, IT is performed using a threshold value preset in a threshold value register (230) as shown in FIG. The R, G, and B components of the luminance of the picture pixel are Rl, GI, and BI, respectively, and the R, G, and B components of the luminance of the luminance storage device (340) are RIB, GIB, BIB. Drawing pixel brightness and brightness storage device

The absolute value of the difference from the luminance of (340) is calculated as R S, G S, and B S for each RGB component (227). Then, the threshold value R preset in the threshold value register (230) is compared with the absolute value of the difference for each of the RGB components (228). If all of R S, G S, and B S are smaller than the threshold value R, it is determined to be an approximate value. If at least one of R S, G S, and B S is larger than the threshold value R, it is determined that the value is not an approximate value.

The value set in the threshold register (230) sets the upper limit of the absolute value of the difference in luminance considered as an approximate value. In this embodiment, about 30% of the maximum luminance value of the frame buffer (310) is set as the upper limit of the luminance difference that is regarded as an approximate value. That is, since each component of the luminance of the frame buffer (310) is 8 bits and the maximum luminance is 255, the threshold value is set to 76.

If it is determined in the above determination (2 2 3) that the value is an approximate value (when C 2 is 1), it is determined that the foremost pixel that has already been drawn and the pixel to be drawn are continuous. judge. Next, the depth Z of the drawing pixel and the Z After comparing the depth (ZB) of the buffer (320) with the occupation pattern P of the drawing pixel and the occupation pattern SB of the occupation pattern recording device (330), Perform a logical AND operation (2 2 5).

As a result of the comparison of the depths (2 2 4), if the drawn image is shorter than or equal to the depth of the Z buffer (3 2 0) (when C 3 is 1), the bit unit is If the result of the logical product (P & SB) (2 25) is all '0' for all 16 bits (C 4 is 1), the pixel information calculation unit (2 26) The processing corresponding to (10) in Fig. 7 and Fig. 8 (the following processing (8) (（) (0) () (〇)) is performed, and the result of bitwise logical AND (225) If all of the 16 bits are not '0', the pixel information calculation unit (226) performs the processing corresponding to (11) in FIGS. 7 and 8 (the following processing (A)). (C) (D) (F)).

If the result of the depth comparison (2 2 4) indicates that the drawing pixel is at the depth (when C3 is 0), the result of the bit-wise logical AND (2 25) will be all 16 bits If '0' (C4 becomes 1), the pixel information calculation unit

In (2 26), the processing corresponding to (1 2) in FIGS. 7 and 8 (the following processing (B), (D), and (G)) is performed, and the bit-wise logical AND (2 25 If the result of (16) does not become all “0” in all 16 bits (when C4 becomes 0), the pixel information calculation unit (2226) sets “(1)” in FIG. 7 and FIG. The processing corresponding to 3) (the following processing (B) and (D)) is performed.

On the other hand, when it is determined in the above determination (2 2 3) that the value is not an approximate value (when the C 2 force becomes 0), or in (2 2 2), the occupation pattern P of the drawing pixel and the occupation pattern storage As a result of performing a logical OR on a bit-by-bit basis with the occupation pattern SB stored in the device (330), all of the 16 bits are

If it does not become '1' (C 1 becomes 0), drawing has already been performed It is determined that the foreground pixel and the pixel to be rendered are not continuous. Next, the depth of the drawing pixel is compared with the Z buffer (320) (224), followed by the occupation pattern P of the drawing pixel and the occupancy of the occupation pattern storage device (330). Performs a bit-wise AND operation with the pattern (SB) (225).

As a result of the comparison of the depths (2 24), if the drawing pixel is the front or the same depth, the result of the bit unit logic 2 (2 25) is all '0' for both 16 bits. If this is the case, the pixel information calculation unit (2 26) performs processing corresponding to (14) in FIGS. 7 and 8 (the following processing (A) (C) (E) (F) (G) ), And if the result of the bit-wise logical AND (2 25) is not all “0” for both 16 bits, the pixel information calculation unit (2 26) performs the operations shown in FIGS. The processing corresponding to (15) in the figure (the following processing (A) (C) (E) (F)) is performed. As a result of the depth comparison (2 24), if the drawing pixel is located at the depth, the pixel information calculation unit (2 26) performs processing corresponding to (15) in FIG. 7 and FIG. The following processing (B)) is performed.

In the above processing, each memory in the image memory (300) that has not been updated stores the information before drawing the drawing pixel as it is.

The processing (A) to (G) in the pixel information calculation unit (226) and the outline thereof are described below.

Where (a & b) is the bitwise AND of a and b, (a | b) is the bitwise OR of a and b, and N 0 T (a) is the bitwise negation of a. Shall be represented.

In the following description of each process, the occupation pattern of the drawing pixel is “P”, and the occupation pattern stored in the occupation pattern storage device (330) is “P”. Expressed as 'SB'.

Processing (A)

Ral: percentage of P '0'

Ra2: Percentage of '0' in (SBI 1 ^ 〇〇 (?))

Ra3: 1.0-Ral― Ra2

R component of frame buffer (310)-

R component of luminance of drawing pixel X Ral

+ The luminance R component of the luminance storage device (340) X Ra2 + The luminance R component of the frame buffer (310) X Ra3 The G component of the frame buffer (310)-

G component of drawing pixel luminance X Ral

+ G component of luminance of luminance storage device (340) X Ra2 + G component of luminance of frame buffer (310) X B component of Ra3 frame buffer (310)-

B component of drawing pixel luminance X Ral

+ Luminance storage device (3440) B component of 度 i degree X Ra2 tens B component of luminance of frame buffer (310) X Ra3 Outline of processing (A)

The outline of the process (A) will be described with reference to the example of FIG. The processing (A) is performed when the depth (75) of the drawing pixel is closer to or equal to the depth (32) read out from the Z buffer (320). ) Is a process of calculating the luminance to be stored.

The regions (71), (72), and (73) in a subpixel of a certain pixel viewed from the viewpoint direction (70) are weighted by the ratio of occupying the subpixel by each luminance and averaged. The brightness (3 1 3) (3 1 0).

The area (71) viewed from the line-of-sight direction (70) occupies 9Z16, which is the ratio of '0' in the pattern (76) occupied by the drawing pixel, due to the luminance (74) of the drawing pixel. ing. The area (72) viewed from the line-of-sight direction (70) is read from the occupancy pattern storage device (330) by the brightness (333) read from the brightness storage device (340). Occupancy pattern (3 4 3) Occupies 3 16 which is the proportion of '0' in INOT (occupation pattern (76) of drawing pixels) 76. The proportion of area (73) is 1.0-9 Since the brightness of the force region (73) where 16-3/16 = 4/16 is not known, the brightness read from the current frame buffer (310) is used. The brightness of the frame buffer (310) is calculated by averaging the brightness of the area (73) when the pixel was previously drawn, using the brightness of the area (73).

By setting the brightness of (73), the brightness of the original region (73) can be reflected to some extent.

Processing (B)

R b 1: Ratio of '0' in (PIN 0 T (S B))

Rb2: ratio of '0' in SB

Rb3: 1.0-Rbl-Rb2

R component of the frame buffer (310)

R component of drawing pixel luminance X Rbl

+ R component of luminance of luminance storage device (340) X Rb2

+ R component of the luminance of the frame buffer (310). X Rb3 G component of the frame buffer (310).

G component of drawing pixel luminance X Rbl

+ G component of luminance of luminance storage device (340) X Rb2 + G component of frame buffer (310) luminance X Rb3

B component of frame buffer (310)-

B component of drawing pixel luminance X Rbl

+ B component of luminance of luminance storage device (340) X Rb2

+ Overview of B component X Rb3 processing (13) of luminance of frame buffer (310)

An outline of the process (B) will be described with reference to the example of FIG. The example in Fig. 13 assumes that the pixel to be rendered is located second from the front of the pixels that have been rendered before, and otherwise, B) is stored in the frame buffer (310) when the depth (85) of the ij pixel is deeper than the depth (324) read from the Z buffer (320). This is the process of calculating the brightness to be performed.

Area in a sub-pixel of a certain pixel seen from the viewpoint direction (80)

(81), (82), and (83) are weighted by the ratio of occupying sub-pixels by their respective intensities, and the averaged intensity (3, 14) is assigned to the frame buffer (3, 10). Remember.

The area (81) viewed from the line-of-sight direction (80) is determined by the drawing pixel luminance (84) (drawing pixel occupation pattern (86) [NOT (read from occupation pattern storage device (330)). The occupation pattern (3 4 4)) occupies 5 to 16 which is the ratio of '0'.The area (8 2) viewed from the line of sight (80) is the luminance storage device (3 4 0). ) Occupies 7/16 of the occupied pattern (3444) read from the occupied pattern storage device (330), which is the ratio of '0'. The ratio of (83) is 1.0-5/16-7/16 = 4/16, but the brightness of the area (83) is not known, so the current frame buffer (310) Read from Let it be luminance. Since the luminance of the frame buffer (310) is averaged using the luminance of the area (83) when the pixel was previously drawn, the luminance of the frame buffer (310) is calculated as follows. By setting the brightness of the area (83), the brightness of the original area (83) can be reflected to some extent. Processing (C)

Z buffer (320)-Depth of drawing pixel

Overview of processing (C)

The processing (C) stores and updates the depth of the drawing pixel in the Z buffer (320) when the depth of the drawing pixel is closer or equal to the depth read from the Z buffer (320). It is processing.

Processing (D)

Occupancy pattern storage device (330) (P & S B)

Overview of processing (D)

The outline of the process (D) will be described with reference to the example of FIG. The process (D) is a process of synthesizing an occupation pattern and storing the occupation pattern in the occupation pattern storage device (330) when it is determined that the drawing pixel and the foremost pixel that has been previously drawn are continuous. is there. In the pixel (90), the occupation pattern (91) of the drawing pixel and the occupation pattern (92) read from the occupation pattern storage device (330) are bit-wise ANDed with each other to perform the logical AND operation. This is a process of synthesizing the graphic area (area of '0') (93) and storing it as a graphic area of one pixel in the occupation pattern storage device (330).

Processing (E)

Occupancy pattern storage device (330)-P

Overview of processing (E)

In the processing (E), the drawing pixel is connected to the foremost pixel that has been previously drawn. Occupied pattern storage device (330) when it is determined that the connection is not continuous and the depth of the drawing pixel is closer to or equal to the depth of the Z buffer (320). This is a process of storing a pattern. Processing (F)

Luminance storage device (340)-luminance of drawing pixel

Overview of processing (F)

The processing (F) stores the brightness of the drawing m in the luminance storage device (340) when the depth of the drawing pixel is closer or equal to the depth of the Z buffer (320). This is the process to do.

Processing (G)

Total occupied depth storage device (350)-Depth of drawing pixel

Overview of processing (G)

In the process (G), the occupation pattern storage device (330) is updated by the process (D) or the process (E), and the occupation pattern (P) of the drawing pixel and the occupation pattern storage device (330) are updated. When the bit-wise AND with the occupation pattern (SB) read from) is 16 bits, the total occupied depth storage device (35%) becomes “0” (100% of the pixel graphic area). 0) is a process of storing the depth of the drawing element.

By performing the above operation on all the pixels constituting the figure, an unchained process can be performed.

In performing the above processing, the following cases may occur as exceptions. In Fig. 13, if the depth of the pixel (85) to be drawn is the second closest to the front of the depth of the previously drawn pixel, the ideal brightness is If it is the third or later from the front, that is, the pixel to be drawn (85) and the foremost pixel that has been previously drawn If there is another pixel that has been previously drawn between the depths of (3 2 4), the result will be different from the ideal luminance.

As shown in Fig. 15, in the pixel (63) where the brightness of two pixels is an approximate value and there is a slight gap between adjacent pixels, the occupation pattern (64) of the drawing pixel and the occupation pattern storage device ( Since the result (66) of the bitwise OR of the occupation pattern (65) of (330) is all '1', the pixel is erroneously determined to be continuous. Also, if the luminance is not an approximate value while two M elements are adjacent, it is erroneously determined that the pixels are not continuous. As described above, if the determination as to whether or not they are continuous is incorrect, the determination as to whether or not to combine the graphic area of the occupied pattern is also erroneously made, resulting in the occupation of the wrong occupied pattern. It is stored in the pattern storage device (330). Therefore, when the pixel is drawn later at the same coordinates, the luminance is calculated from the ratio of '0' of the wrong occupation pattern, so that the luminance power of the frame buffer (310) does not become the ideal luminance. There are cases. In particular, when the depth of the drawing pixel is deeper than the depth of the Z buffer (320), the occupied pattern of the occupied pattern storage device (330) is located at the foreground. Since the ratio of the occupation pattern of the occupation pattern storage device to be seen is likely to be large, the ratio of the occupation pattern is greatly involved in calculating the luminance.

However, since such erroneous determinations occur with a low probability and are at a level that is hardly recognizable even when viewed from above, such errors are usually not a problem.

As a method of obtaining an image with higher accuracy, there is a method of using a Z-sort method in which the pixel comparison operation unit (220) draws in order from the pixel at the back to the pixel at the front. By the Z-sort method, the depth of the drawing pixel must be Since the depth of the buffer (320) is shorter than or equal to the depth of the buffer (320), the processing (B) is not executed. As a result, the luminance of the frame buffer (310) becomes close to the ideal luminance even if the determination of whether or not the pixel is continuous is incorrect. Industrial applicability

As described above, in the present invention, the anti-aliasing process is performed by one drawing by performing the brightness calculation using the foreground occupation pattern held in one element unit, so that the conventional method is used. It is faster to draw and is suitable for performing anti-aliasing with less memory.

Claims

The scope of the claims

1. In a three-dimensional image processing device,

A sub-pixel pattern generating means for obtaining a pattern (hereinafter, an occupation pattern) indicating whether or not each of a plurality of divided regions (hereinafter, “sub-pixels”) is included in the region of the figure for each pixel constituting the drawing graphic; An occupancy pattern storage means for storing the occupancy pattern of the ghost drawn in the foreground when drawing a three-dimensional image;

A three-dimensional image processing apparatus comprising:

2. When rendering a three-dimensional image: The three-dimensional image processing apparatus according to claim 1, further comprising: a luminance storage unit configured to store luminance information of a pixel to be rendered immediately before. .

3. Depth information storage means for storing depth information of a pixel drawn in the foreground when drawing a three-dimensional image, among the pixels in which all of the sub-pixels are included in the graphic region. 3. The three-dimensional image processing apparatus according to claim 1, wherein:

4. The occupation pattern of the pixel to be drawn is compared with the occupation pattern of the same coordinates stored in the occupation pattern storage device, and based on the comparison result,

An operation is performed using luminance information of the pixel to be rendered and luminance information of the same coordinates as the pixel to be rendered stored in the frame buffer and the luminance storage device,

3. The three-dimensional image processing device according to claim 2, further comprising a pixel comparison operation unit that stores a result of the operation in a frame buffer.

5. If the difference between the luminance information of the pixel to be drawn and the luminance information of the same coordinates stored in the luminance storage device is within a predetermined range, A pixel comparison operation unit that combines an occupation pattern of a pixel to be drawn and an occupation pattern of the same coordinates stored in the occupation pattern storage device, and stores the combined result in the occupation pattern storage device. 3. The three-dimensional image processing apparatus according to claim 2, comprising:

6. The three-dimensional processing according to claim 1, wherein the rejection comparison operation unit performs a Z sort (drawing in order from the back pixel to the front pixel) for the pixel to be drawn. ¾ Equipment.