WO1998004075A1

WO1998004075A1 - Communication equipment and communication system

Info

Publication number: WO1998004075A1
Application number: PCT/JP1996/002042
Authority: WO
Inventors: Takashi Shiba; Minoru Moteki; Akitsuna Yuhara; Hitoshi Yanagihara; Yasuhiro Ohta
Original assignee: Hitachi, Ltd.; Hitachi Media Electronics Co., Ltd.
Priority date: 1996-07-22
Filing date: 1996-07-22
Publication date: 1998-01-29
Also published as: JP3769301B2

Abstract

Communication equipment and a communication system whose noise immunity can be improved even in the case of a short key-code length (inclusive of the case where diffusion of a spectrum is not effected). A series of digital information containing binary information composed of 1 and -1 is set to b(j) with j being an integer. On the transmitting side, multiplication output of n (n=3 or more) partial series are serially transmitted either directly or after being modulated, while on the receiving side, the received signals are demodulated if they are modulated, and the signals corresponding to the n partial series are serially multiplied so as to reproduce the digital information series corresponding to the original values of 1 and -1. Furthermore, digital information is reproduced from that information. Synchronous reproduction means on the receiving side of a spectrum diffusion communication system multiples all the signals from time T to (n - 1)T by the present signal, where T is the information bit interval and n is 2 or greater, and the product signal is multiplied by itself to reproduce the synchronizing signal.

Description

Specification

Communication device and communication system

The present invention relates to a communication device and a communication system using a phase modulation method. Background art

Conventional digital communication methods are described in, for example, IEICE Spectrum Diffusion Communication Research Institute, IEICE Technical Report, SST 95-79, Vol. As described on the page, binary differential phase modulation (DPSK) is often used. However, in the conventional method, for example, as in the spread spectrum communication method, it is possible to obtain a processing gain by means of correlating a key code with a transmitter / receiver and to create a system resistant to noise. And can be. However, in this method, when the code length is reduced, the processing gain is reduced, and it is difficult to improve the noise immunity. Disclosure of the invention

An object of the present invention is to solve the above-mentioned problem and to provide a communication system capable of improving noise immunity even when a key code length is short (including a case where spread spectrum is not performed). It is in the thing.

The purpose of the above is to use a digital information sequence that associates binary digital information with 1 and 1 1 as b (j), where j is an integer, and that the transmitting side has n (n is 3 or more) partial sequences. The multiplied outputs are transmitted sequentially or directly or modulated, and the receiving side directly or demodulates the received signal according to the above, and then the n This is achieved by successively multiplying the signals corresponding to the fractional sequences to reproduce the digital information sequence corresponding to the original 1 and 1 and then reproducing the digital information from the information. Also, assuming that one information bit signal period T is used as a synchronous reproduction means on the receiving side of the spread spectrum communication system, the signal (T is (n−1)) T (n is 2 or more) before T and the current This is achieved by multiplying all of the signals, and then squaring the signal to reproduce the signal synchronization signal. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a system block diagram of a communication device according to a first embodiment of the present invention, and FIG. 2 is an explanatory diagram of a conventional DPSK modulation method.

FIG. 3 is a block diagram of a part of the receiving side according to a second embodiment of the present invention.

FIG. 4 is a block diagram of a part on the transmitting side according to a second embodiment of the present invention.

FIG. 5 is a block diagram of a part of the receiving side according to a third embodiment of the present invention.

FIG. 6 is a block diagram of a part of the receiving side according to a fourth embodiment of the present invention.

FIG. 7 is a block diagram of a part of a receiving side according to a fifth embodiment of the present invention.

FIG. 8 is a block diagram of a part of the receiving side according to a sixth embodiment of the present invention.

FIG. 9 is a block diagram of a part of the receiving side according to a seventh embodiment of the present invention.

FIG. 10 is a schematic diagram of a surface acoustic wave matching filter according to a first embodiment of the present invention. FIG.

FIG. 11 is a schematic diagram of a surface acoustic wave matching filter according to an eighth embodiment of the present invention.

Fig. 12 shows the output signal waveform of the matched filter.

Fig. 13 shows the signal waveform after conventional delay detection.

FIG. 14 is a signal waveform after four-stage multiplication detection of the present invention,

Figure 15 shows the output signal waveform of the matched filter.

Fig. 16 shows the signal waveform after conventional delay detection.

FIG. 17 is a signal waveform after four-stage multiplication detection according to the present invention.

FIG. 18 is a system block diagram of the communication device according to the ninth embodiment of the present invention, and FIG. 19 is a system block diagram of the communication device according to the tenth embodiment of the present invention.

FIG. 20 is a system block diagram of the communication device according to the eleventh embodiment of the present invention.

FIG. 21 is a system block diagram of a communication device according to a 12th embodiment of the present invention.

FIG. 22 is a schematic diagram of a convolver used in the communication device of the 12th embodiment of the present invention,

FIG. 23 is a system block diagram of a communication device according to a thirteenth embodiment of the present invention.

FIG. 24 is an explanatory diagram of a digital operation device used in the communication device of the thirteenth embodiment of the present invention,

FIG. 25 is a wireless LAN communication system using the communication device of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, the details of the present invention will be described with reference to the embodiments shown in FIGS. 1 to 25. Π

I will tell.

FIG. 1 shows an example of a spread spectrum communication apparatus using the present invention, using a system block. On the transmitting side, digital information corresponding to basebands 1 and 1 1 is input from the transmitting terminal 1, and digital information corresponding to 1 and 1 1 generated from the pseudo noise (PN) code generator 2. The information (here, for example, 1 corresponds to 0-1 power of the digital information and 1) is multiplied by the mixer 3. For the signal processing of this circuit part, the same function can be realized by using a digital processing circuit using a shift register and a half adder. Next, the digital information for transmission is multiplied by the η-stage multiplying circuit 4 which is a characteristic part of the present invention, by multiplying the information before 1 by (η−1) bits and the current information, respectively. can get. In a formula,

(1). Here, bj is the output signal of the n-stage multiplication circuit 4, and ci is the input signal. The n-stage multiplication circuit 4 has four stages in this embodiment, and is constituted by a three-stage shift register 5 and a multiplier 6. This circuit can perform the same processing using the half adder as described above. The signal output from the n-stage multiplication circuit 4 is multiplied by a carrier 8 generated by an oscillator 7 by a mixer 8, modulated into a high-frequency band, then amplified by an amplifier 9, and output from an antenna 10. You. On the receiving side, the received modulated signal input from the antenna 10 is amplified by the amplifier 11 and converted into a matched signal by the surface acoustic wave matched filter 12 corresponding to the PN code on the output side. Another feature, an n-stage multiplication detection circuit 13 (four stages in this case), is used to multiply the information before 1 to (n−1) bits and the current information, respectively. A demodulated detection signal is obtained. In a formula, = Π (2)

In the η-stage multiplication detection circuit 13, the information cycle is Τ, and the delay line 1, 2 時間 delay line 15, 2 遅延 delay line 15, and 3 遅延 delay line 16 are 1 to 3 bits before And the mixer 17 multiplies each signal by the current signal. Since the demodulated detection signal obtained is a signal obtained by detecting a matched signal, the pulse width is narrow. Therefore, the signal is converted into a digital signal having an appropriate pulse width ratio by a square wave output circuit 18 such as a comparator and output from an output terminal 19.

FIG. 2 shows a conventional DPSK (Differentia1PhasesSehiftKeying) system. (A) is the original digital information, (b) is the spread signal spread by the PN code (here, 5 bits), and (c) is the transmission / reception and modulation signal multiplied by the carrier. Here, in the conventional DPSK method, the digital signal corresponds to 0 when there is no phase change of the signal and 1 when there is a phase change. (D) shows the detection and demodulation method of the receiver. A feature of the DPSK method is that no special oscillation circuit is required on the demodulation side, and a demodulated signal can be obtained from terminal 20 using only 1T delay line 21 and mixer 22. However, in the conventional DPSK method, since only two types of signals having different delay times are multiplied, noise that is randomly input cannot be sufficiently suppressed. In contrast, in this method, four types of signals with different delay times are multiplied, and the noise components that are added irregularly are multiplied, thereby improving the equivalent signal-to-noise ratio. As described above, according to the present embodiment, it is possible to improve the equivalent S / N of the receiving device, improve the communication reliability, and increase the communication distance.

FIG. 3 shows a part of a second embodiment of the present invention. Second implementation In the example, an n-stage multiplication circuit and an n-stage multiplication detection circuit, which are characteristic portions of the present invention, have six stages. Fig. 3 shows the inside of the n-stage multiplication detection circuit 13; 1T delay line 23, 2T delay line 24, 3T delay line 25, 4T delay line 26, 5T delay The output of line 27 is multiplied by the current signal by mixer 28 to obtain an output detection signal. Similarly, FIG. 4 shows the inside of the n-stage multiplication circuit 4, and a transmission digital signal is obtained by a 5-stage shift register 29 and a mixer 30. As described above, according to the present embodiment, since the number of stages is further increased as compared with the first embodiment, the equivalent SZN of the receiving device is further improved, the communication reliability is improved, and the communication distance is increased. Can be planned.

FIG. 5 shows an n-stage multiplication detection circuit of the communication device of the third embodiment. The number of stages in this embodiment is four, similar to that of the first embodiment. However, an n-stage multiplication detection circuit 13 has delay lines 31 with a delay time of 1 T, delay lines with 2 T and a delay line with 3 T and 3 T The signal before 1 to 3 bits is obtained by the delay line 33 of FIG. 1, first, a multiplied signal of the 0T and 1T signals is formed by the mixer 34, and 2 Τ is obtained by the mixer 35. , 3 信号 to form a multiplied signal. Next, each signal is multiplied by the mixer 36 to obtain an output detection signal. In the first embodiment, each signal is multiplied at a time, but it is actually difficult to form such a circuit. Therefore, in the present embodiment, each signal output is multiplied by two, and finally, the output is multiplied. According to this embodiment, even when it is difficult to multiply η signals as in the first embodiment, η multiplication outputs can be obtained.

FIG. 6 shows an η-stage multiplication detection circuit of the communication device of the fourth embodiment. Although the number of stages in this embodiment is four, similar to that of the third embodiment, delay lines 37, 38, and 39 with a delay time of 1 mm are cascaded inside the η-stage multiplication detection circuit 13 Then, the signal before 1 to 3 bits is obtained, and first, the current signal is multiplied by the output of the delay line 37 of the first stage by the mixer 40, and the signal is also multiplied by the delay line 38 of the second stage. The output of the third-stage delay line 39 is multiplied by the mixer 41, and finally, the output is multiplied by the mixer 42. In the third embodiment, a delay line having a long delay time (for example, 3 T) is required. However, according to this embodiment, only a 1 T delay line may be used, so that the circuit can be downsized. . (In general, the longer the delay line, the larger the delay line.)

FIG. 7 shows an n-stage multiplication detection circuit of the communication device of the fifth embodiment. Although the number of stages in this embodiment is four, similar to the third and fourth embodiments, the internal processing of the n-stage multiplication detection circuit 13 includes the signal output of the delay line 43 with a delay time of 1 T and the current signal. Is multiplied by a mixer 44, and the signal is multiplied by the output of a delay line 45 having a delay time of 2 T by a mixer 46 to obtain an output detection demodulated signal. In the third and fourth embodiments, three mixers were required.However, according to this embodiment, only two mixers need be used, so that the circuit can be reduced in size and cost. is there.

FIG. 8 shows a part of a spread spectrum communication apparatus according to the sixth embodiment. <FIG. 8 shows a demodulation detection section of a receiver, and a detection circuit section 49 has a 1T delay line 4. The conventional DPSK differential detection method using a conventional DPSK method and a mixer 48 is used. The detected signal passes through a low-pass filter 50, and a carrier component is removed. From the obtained signal, a narrow synchronous signal 52 having the same polarity code is obtained by the mixer 51. By using this synchronization signal 52 as a comparison synchronization signal for the square wave output comparator 53, the effective SZN can be improved by picking up only the narrow matching signal part as the comparator output. Can be. In the conventional circuit, a sine wave was used as the synchronizing signal. However, the pulse width is narrower than that, and the effective SZN can be further improved.

FIG. 9 shows a part of the spread spectrum communication apparatus according to the seventh embodiment. <FIG. 9 shows a demodulation detection unit of the receiver, and the same parts as in FIG. Numbered. As in the sixth embodiment, the detection circuit section 49 uses a conventional DPSK delay detection method. The detected signal passes through the low-pass filter 50, the carrier component is removed, and is input to the square wave output comparator 53. A part of the remaining signal is multiplied by a mixer 55 with a signal passing through a 2T delay line 54 and a signal not passing through the delay line 54 according to the flow of a solid line 58 to suppress noise components. After squaring and passing through the low-pass filter 57, it is input to the comparator as a comparison synchronization signal 52. In the present embodiment, as compared with the sixth embodiment, the synchronization signal is raised to the fourth power with a different delay time from the original signal, so that the noise component is suppressed and the synchronization can be maintained more.

FIG. 10 schematically shows the surface acoustic wave matched filter 12 used in the first embodiment. In the surface acoustic wave matched filter, an input interdigital electrode 61 and an output encoding electrode 62 are arranged on a surface acoustic wave substrate 60. When the spread signal is input from the input terminal 63 and the PN code matches the change in the polarity of the encoding electrode, a sharp peak-shaped matching signal is output from the output terminal 64. The use of the surface acoustic wave matched filter of the present embodiment has a feature that the detection circuit does not require a synchronization circuit, the high-speed synchronization can be obtained, and the detection signal can be obtained with a low current.

FIG. 11 schematically shows a surface acoustic wave matched filter according to an eighth embodiment. In the figure, the same parts as those in FIG. 10 are given the same numbers. Usually, the surface acoustic wave substrate 60 often uses a crystal having a low temperature coefficient in order to suppress a delay time variation due to a temperature variation in the encoding electrode section. However, since the electromechanical coupling coefficient of the crystal substrate is small, the impedance of the interdigital transducer increases, and the mismatch loss increases. Therefore, in this embodiment, the piezoelectric thin film 6 5 high coupling coefficient was deposited only on the input interdigital electrode portion lowers the sag shaped electrode 6 1 of impedance enter, thereby suppressing mismatch loss _c By using this embodiment, it is possible to obtain a matched filter that is resistant to temperature fluctuation and has low loss.

FIGS. 12 to 17 show a comparison between a conventional signal waveform and the signal waveform of the present invention in order to show the effectiveness of the present invention. As a communication method, a spread spectrum communication method is taken as an example. Fig. 12 shows a signal level of 19.1.14 dBm (peak value of power per 1 MHz) and a noise level of 19.1 dBm.

It is an output signal waveform of the matched fill in the case of 8 dBm. FIG. 13 is a conventional delay detection waveform under the same conditions, and FIG. 14 is an output signal of the four-stage detection circuit of the present invention. In the signal of the conventional method, a noise component is observed, but in the method of the present invention, almost no noise component is observed. Fig. 15 shows the signal level of 94.0 dBm (peak value of power per 1 MHz) and the noise level.

It is an output signal waveform of the matched fill in the case of 92.5 dBm. FIG. 16 is a conventional delay detection waveform under the same conditions, and FIG. 17 is an output signal of the four-stage detection circuit of the present invention. Although it is difficult to discriminate between noise and a signal in the signal of the conventional method, in the method of the present invention, the noise component is sufficiently small and the signal can be discriminated. In addition, the signal synchronization is clearly shown, and can be used as a synchronization signal for comparators.

FIG. 18 is a block diagram of a communication device according to a ninth embodiment of the present invention. In the figure, the same parts as those in FIG. 1 of the first embodiment are denoted by the same reference numerals. In the first embodiment, the modulated signal received from the antenna 10 is directly input to the matched filter 12. However, in the present embodiment, the carrier from the oscillator 66 is once multiplied by the mixer 67 to generate the intermediate signal. It is converted to a frequency (IF) signal and input at the matched fill. This embodiment is effective when the frequency of the RF signal is high (for example, 2.4 GHz band) and it is difficult to operate the SAW matched filter 27, the surface acoustic wave delay line 28, the mixer 29, and the like. .

FIG. 19 is a block diagram of a communication apparatus according to a tenth embodiment of the present invention. Figure The same parts as those in FIG. 1 of the first embodiment are denoted by the same reference numerals. The first embodiment is an example of a spread spectrum communication system, but the present embodiment relates to direct modulation of the BPSK system. The digital signal input from the input terminal 68 is directly input to the n-stage multiplication circuit 4. The signal output from the n-stage multiplication circuit 4 is multiplied by a carrier generated by an oscillator 69 by a mixer 70, modulated into a high frequency band, then amplified by an amplifier 71, and then amplified by an antenna 72. Is output. On the receiving side, the reception modulation signal input from the antenna 72 is amplified by the amplifier 73, and a high SZN demodulation detection signal is obtained by the n-stage multiplication detection circuit 13. The demodulated detection signal obtained has a wide pulse width. Then, the signal is converted into a digital signal having an appropriate pulse width ratio by the waveform shaping circuit 74 and output from the output terminal 75. The present embodiment relates to direct modulation of the BPSK scheme. The present invention can be applied to schemes other than the spread spectrum communication scheme.

FIG. 20 is a block diagram of the eleventh embodiment of the present invention. In the figure, the same parts as those in FIG. 19 of the tenth embodiment are denoted by the same reference numerals. This embodiment relates to the direct modulation of the BPSK system, as in the tenth embodiment. In the tenth embodiment, the modulated signal received from the antenna 72 was directly input to the n-stage multiplication detection circuit 13. However, in the present embodiment, the carrier from the oscillator 76 and the mixer The signal is multiplied by 7 and converted into an intermediate frequency (IF) signal, which is input to an n-stage multiplication detection circuit 13. This embodiment is effective when the frequency of the RF signal is high (for example, in the 2.4 GHz band) and it is difficult to operate a delay line, a mixer, and the like.

FIG. 21 is a block diagram of a 12th embodiment of the present invention. In the figure, the same parts as in FIG. 1 of the first embodiment are denoted by the same reference numerals. In the spread spectrum communication method of the first embodiment, the modulated signal received from the antenna 10 is input to the matched filter 12, but in the present embodiment, the modulated signal is input to the convolver 78. You. The digital signal of the PN code generator 79 is modulated in the convolver 78 by the carrier of the oscillator 80 and the mixer 81, and convolved with the input signal from the antenna. In the first embodiment, since the SAW matched filter is used, it is difficult to change the PN code. However, in the present invention, since the convolver is used, it is possible to cope with a case where the PN code changes. Fig. 22 schematically shows the structure of a convolver using surface acoustic waves. An input signal is input from the input terminal 82, a reference signal is input to the input terminal 83, and a convolution output is output from the output terminal 84. A surface acoustic wave substrate 85 and input IDTs 86 and 87 are arranged inside the convolver, and a convolution output is obtained in the nonlinear interaction area 88 by spatial integration of the two input signals. Is received.

FIG. 23 is a block diagram of a thirteenth embodiment of the present invention. In the figure, the same parts as in FIG. 1 of the first embodiment are denoted by the same reference numerals. In the spread spectrum communication method of the first embodiment, the modulated signal received from the antenna 10 is input to the matched filter 12 and a matched signal is obtained by analog signal processing. In the example, first, the received signal is converted into a digital signal, and thereafter, the digital arithmetic unit 89 demodulates the information signal. FIG. 24 shows the processing contents of the digital arithmetic unit 89. The digitized spread signal is input to the input terminal 90, and the arithmetic processing unit performs correlation processing with the PN code as needed, and outputs a digital signal from the output terminal 91 when the correlation output exceeds a certain level. Is output. This embodiment is effective in reducing the cost of the circuit when the information speed is relatively low.

FIG. 25 shows a communication system using the present invention. In this embodiment, a communication device of this system is used for a LAN. The communication devices 96 and 97 are connected to the LAN cable 92, and the communication devices 9 and 94 are connected to each terminal 93 and 94. 5, 9 and 8 are connected. Also, the communication devices 101 and 102 are connected to the terminals 99 and 100, respectively, and the terminals can communicate freely (without passing through a wired system). If this embodiment is used, each terminal does not need to be connected to the RAN cable, so that the terminal can be moved freely (rate).

ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to raise noise immunity performance, it becomes possible to improve the reliability of a communication apparatus, and to expand a communication distance, and to implement | achieve a highly reliable communication system.

Claims

The scope of the claims

1.2 Of the digital information sequence in which binary digital information is associated with 1 and 1 1, the multiplication output of n (n is 3 or more) partial sequences is sequentially, directly, or modulated on the transmitting side. A communication device characterized by transmitting.

2. The receiving side directly or demodulates the received signal according to the above, and then sequentially multiplies the signals corresponding to the n partial sequences to obtain the digital information corresponding to the original 1 and 1 1 A communication device characterized by reproducing a sequence of numbers and further reproducing digital information from the information.

3. In the digital information sequence in which the binary digital information corresponds to 1 and 1 1, the multiplication output of n (n is 3 or more) partial sequences is sequentially, directly, or modulated on the transmitting side, and The receiving side directly or demodulates the received signal according to the above, and then sequentially multiplies the signals corresponding to the n partial sequences to obtain the digital information sequence corresponding to the original 1 and 1 1 A communication system characterized by reproducing and further reproducing digital information from the information.

4. In the communication device according to claim 2, assuming that one information bit signal period is T, a signal that is (n−1) T times before (ri is 3 or more) from the end and the current signal are all multiplied, A communication device characterized by reproducing a signal having information of a digital information sequence corresponding to the original 1 and 1 and further reproducing digital information from the information.

5. The communication device according to claim 2, wherein 1T delay lines having a delay time corresponding to one information bit signal period T are provided in cascade, in many (n-1) stages, and a reception signal is provided in the first stage of the delay line. Multiply the output of each stage by the delay line output and the original received signal to reproduce the digital information sequence corresponding to the original 1 and 1 and to reproduce the digital information from that information Communication device characterized by <

6. The communication device according to claim 2, corresponding to one information bit signal period T. (N-1) 1T, 2 Τ1 ... (η-1) を delay lines having the same delay time are provided, the received signal is input to each delay line, the output of those delay lines and the original signal Communication device that reproduces a digital information sequence corresponding to the original 1 and 1 and further reproduces digital information from the information.

7. The communication system according to claim 3, wherein the digital information sequence in which the binary digital information is made to correspond to 1 and 1 1 is sequentially multiplied and output on the transmitting side by η (η is 3 or more) partial sequences. Ν Ν (pseudo-noise) code is spread-spectrum-modulated and transmitted. The receiving side performs spread-spectrum demodulation on the received signal, and then sequentially multiplies the signals corresponding to η partial sequences. A digital information sequence corresponding to the original 1 and 1 and reproducing digital information from the information.

8. If one information bit signal period Τ is used as a synchronous reproduction means on the receiving side of the spread spectrum communication system, all signals from (Τ−1) Τ time before （(η is 3 or more) and all current signals are used. A communication device characterized by reproducing a signal synchronization signal by multiplying.

9. As a synchronous reproduction means on the receiving side of the spread spectrum communication system, assuming that one information bit signal period is を, all signals from (Τ−1) Τ hours before （(η is 3 or more) and the current signal are used. A communication device characterized in that the signal is multiplied and the signal is squared to reproduce a signal synchronization signal.