WO1997047020B1 - Gated electron emission device and method of fabrication thereof - Google Patents
Gated electron emission device and method of fabrication thereofInfo
- Publication number
- WO1997047020B1 WO1997047020B1 PCT/US1997/009196 US9709196W WO9747020B1 WO 1997047020 B1 WO1997047020 B1 WO 1997047020B1 US 9709196 W US9709196 W US 9709196W WO 9747020 B1 WO9747020 B1 WO 9747020B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- gate
- layer
- openings
- insulating
- particles
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000463 material Substances 0.000 claims abstract 49
- 239000002245 particle Substances 0.000 claims abstract 32
- 230000000875 corresponding Effects 0.000 claims 13
- 238000000151 deposition Methods 0.000 claims 11
- 238000005530 etching Methods 0.000 claims 10
- 239000000126 substance Substances 0.000 claims 3
- 230000003247 decreasing Effects 0.000 claims 1
- 230000005684 electric field Effects 0.000 claims 1
- 239000011810 insulating material Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
Abstract
A gated electron-emitter is fabricated by a process in which particles (26) are deposited over an insulating layer (24). Gate material is provided over the insulating layer in the space between the particles after which the particles and any overlying material are removed. The remaining gate material forms a gate layer (28A or 48A) through which gate openings (30 or 50) extend at the locations of the removed particles. When the gate material deposition is performed so that part of the gate material extends into the spaces below the particles, the gate openings are beveled. The insulating layer is etched through the gate openings to form dielectric openings (32 or 52). Electron-emissive elements (36A or 56A) are formed in the dielectric openings. This typically involves introducing emitter material through the gate openings into the dielectric openings and using a lift-off layer (34), or an electrochemical technique, to remove excess emitter material.
Claims
1. A method comprising the steps of : distributing a multiplicity of particles over an electrically insulating layer; providing electrically non- insulating gate material over the insulating layer at least in space between the particles ; removing the particles and substantially any material overlying the particles such that the remaining gate material forms a gate layer through which gate openings extend at the locations of the so-removed particles ; etching the insulating layer through the gate openings to form corresponding dielectric openings through the insulating layer substantially down to a lower electrically non- insulating region provided below the insulating layer; and introducing electrically non- insulating emitter material into the dielectric openings to form corresponding electron-emissive elements over the lower non- insulating region such that the electron-emissive elements are externally exposed through the gate openings .
2. A method as in Claim 1 wherein the introducing step comprises : forming a lift-off layer over the gate layer such that lift-off openings vertically aligned to the gate openings extend through the lift-off layer; depositing the emitter material over the lift-off layer and through the lift-off and gate openings into the dielectric openings; and removing the lift-off layer so as to substantially remove any emitter material accumulated over the lift- off layer.
55
3. A method as in Claim 2 wherein the gate- material providing step entails depositing part of the gate material into spaces below the particles above the insulating layer.
4. A method as in Claim 1 wherein the introducing step comprises : depositing the emitter material over the gate layer and through the gate openings into the dielectric openings; and removing at least part of the emitter material accumulated over the gate layer outside the dielectric openings .
5. A method as in Claim 4 wherein the emitter- material removing step is performed electrochemically .
6. A method as in Claim 1 further including, prior to the distributing step, the step of providing an intermediate layer over the insulating layer such that the particles are subsequently distributed over the intermediate layer above the insulating layer.
7. A method as in Claim 6 further including, between the particle removing step and the insulating- layer etching step, the step of etching the intermediate layer through the gate openings to form corresponding intermediate openings through the intermediate layer, the insulating- layer etching step also being performed through the intermediate openings.
8. A method as in Claim 7 wherein the intermediate layer adheres to both the insulating and gate layers.
56
9. A method as in Claim 7 wherein the intermediate layer inhibits clumping of the particles during the distributing step.
10. A method as in Claim 7 wherein the introducing step comprises: depositing the emitter material over the gate layer and through the gate and intermediate openings; and electrochemically removing at least part of the emitter material accumulated over the gate layer outside the dielectric openings.
11. A method as in Claim 7 wherein the intermediate layer comprises electrically non- insulating material .
12. A method as in Claim 7 wherein the gate layer comprises at least two sublayers of different chemical composition.
13. A method as in Claim 1 wherein the gate material comprises metal through which it is difficult to accurately etch small openings.
14. A method as in Claim 1 further including the steps of : forming, prior to the distributing step, a pattern- transfer layer over the insulating layer; removing, between the distributing step and the gate-material providing step, material of the pattern- transfer layer not shadowed by the particles to create corresponding pedestals from the pattern-transfer layer; removing, between the gate-material providing step and the insulating-layer etching step, the pedestals.
57
15. A method as in Claim 14 wherein the gate- material providing step entails selectively depositing the gate material over material of the insulating layer not shadowed by the particles.
16. A method as in Claim 1 wherein the diameter of each gate opening generally decreases in going downward through that gate opening.
17. A method comprising the steps of: distributing a multiplicity of particles over an electrically insulating layer; providing electrically non-insulating gate material over the insulating layer such that the gate material covers space between the particles and extends substantially into space below the particles above the insulating layer; removing the particles and substantially any material overlying the particles such that the remaining gate material forms a gate layer though which beveled gate openings extend at the locations of the so-removed particles; etching the insulating layer through the beveled gate openings to form corresponding dielectric openings through the insulating layer substantially down to a lower electrically non- insulating region provided below the insulating layer; and forming electron-emissive elements over the lower non-insulating region such that each electron-emissive element is at least partially situated in a corresponding one of the dielectric openings.
18. A method as in Claim 17 wherein each beveled gate opening generally decreases in diameter in going downward through that gate opening toward the lower non- insulating region such that the diameter of each gate
58 opening reaches a minimum value at or near the lower non- insulating region.
19. A method as in Claim 18 wherein the minimum value of the diameter of each gate opening is less than the average diameter of the particle provided over the insulating layer at the location of that gate opening.
20. A method as in Claim 18 wherein the gate material providing step is performed in a non-collimated manner .
21. A method as in Claim 18 wherein the electron- emissive element forming step comprises: depositing a lift-off layer over the gate layer such that the lift-off layer covers the edges of the gate layer at the gate openings without extending significantly laterally beyond the edges of the gate layer at the gate openings; depositing electrically non-insulating emitter material over the lift-off layer and through the gate openings into the dielectric openings to at least partially form the electron-emissive elements; and removing the lift-off layer so as to substantially remove any material overlying the lift-off layer.
22. A method as in Claim 21 wherein the lift-off layer depositing step is performed at a deposition angle of 20° - 50° relative to the upper surface of the insulating layer.
23. A method as in Claim 18 wherein the electron- emissive element forming step comprises: depositing electrically non-insulating emitter material over the gate layer and through the gate openings into the dielectric openings to at least partially form the electron-emissive elements; and removing at least part of the emitter material accumulated over the gate layer outside the dielectric openings such that the electron-emissive elements are externally exposed through the beveled gate openings.
24. A method as in Claim 23 wherein the removing step is performed electrochemically .
25. A method comprising the steps of: distributing a multiplicity of particles over a pattern-transfer layer formed above an electrically insulating layer; creating corresponding pedestals from the pattern- transfer layer by removing material of the pattern- transfer layer not-shadowed by the particles; providing electrically non-insulating gate material over the insulating layer at least in space between the pedestals; removing the pedestals and substantially any material, including the particles, overlying the pedestals such that the remaining gate material forms a gate layer through which gate openings extend at the locations of the so-removed particles; etching the insulating layer through the gate openings to form corresponding dielectric openings through the insulating layer substantially down to a lower electrically non-insulating region provided below the insulating layer; and forming electron-emissive elements over the lower non- insulating region such that each electron-emissive element is at least partially situated in a corresponding one of the dielectric openings.
26. A method as in Claim 25 wherein the gate- material providing step comprises selectively depositing the gate material over material of the insulating layer not shadowed by the particles.
27. A method as in Claim 26 further including the steps of : forming, prior to the distributing step, (a) an electrically non-insulating intermediate layer over the insulating layer and (b) the pattern- transfer layer over the intermediate layer; and etching, subsequent to the gate-material providing step, the intermediate layer through the gate openings to form corresponding intermediate openings through the intermediate layer down to the insulating layer, the insulating-layer etching step also being performed through the intermediate openings .
28. A method as in Claim 27 wherein the gate- material providing step comprises electrochemically depositing the gate material over material of the intermediate layer not shadowed by the pedestals.
29. A method as in Claim 25 wherein the pedestal- creating step comprises: exposing the pattern-transfer layer to actinic radiation using the particles as an exposure mask to cause material of the pattern-transfer layer not shadowed by the particles to change chemical composition; and removing the chemical changed material of the pattern-transfer layer.
30. A method as in Claim 25 wherein the pedestal- creating step comprises anisotropically etching the
61 pattern-transfer layer using the particles as an etch mask.
31. A method as in any of Claims 1 - 30 wherein the electron-emissive elements are formed generally in the shape of cones.
32. A method as in any of Claims 1 - 30 wherein the particles are largely spherical.
33. A method as in any of Claims 1 - 30 wherein the electron-emissive elements are operable in field- emission mode.
34. A method as in any of Claims 1 - 30 wherein the distributing step is performed under the influence of an applied electric field.
35. A method as in any of Claims 1 - 30 further including the step of providing anode means above, and spaced apart from, the electron-emissive elements for collecting electrons emitted by the electron-emissive elements .
36. A method as in Claim 35 wherein the anode means is provided as part of a light -emitting structure having light -emissive elements for emitting light upon being struck by electrons emitted from the electron- emissive elements.
37. A structure comprising: a lower electrically non-insulating region; an electrically insulating layer situated above the lower non-insulating region, a multiplicity of dielectric openings extending through the insulating
62 layer substantially down to the lower non-insulating region; a like multiplicity of electron-emissive elements, each situated at least partially in a corresponding one of the dielectric openings and being electrically coupled to the lower non-insulating region through the corresponding dielectric opening; and an electrically non- insulating gate layer situated above the insulating layer, a like multiplicity of beveled gate openings extending through the gate layer, each gate opening exposing a corresponding one of the electron-emissive elements, the diameter of each gate opening generally decreasing at a progressively increasing rate in going through that gate opening towards the lower non-insulating region so as to reach a minimum value at or near the bottom of the gate layer.
38. A structure as in Claim 37 wherein the diameter of each gate opening generally decreases in going downward through that gate opening.
39. A structure as in Claim 37 wherein the lower non- insulating region comprises: a lower electrically conductive layer; and an upper electrically resistive layer overlying the conductive layer.
40. A structure as in any of Claims 37 - 39 wherein the gate layer has a concave profile along each gate opening.
41. A structure as in any of Claims 37 - 39 wherein each electron-emissive element is generally conical in shape.
63
42. A structure as in any of Claims 37 - 39 wherein the electron-emissive elements are operable in field-emission mode.
43. A device as in any of Claims 37 - 39 further including anode means situated above, and spaced apart from, the electron-emissive elements for collecting electrons emitted by the electron-emissive elements.
44. A method as in Claim 43 wherein the anode means is part of a light-emitting device having light- emissive elements for emitting light upon being struck by electrons emitted from the electron-emissive elements .
64
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE69740027T DE69740027D1 (en) | 1996-06-07 | 1997-06-05 | GRID-CONTROLLED ELECTRON EMISSIONING DEVICE AND MANUFACTURING METHOD THEREFOR |
| JP50069698A JP3736857B2 (en) | 1996-06-07 | 1997-06-05 | Method for manufacturing electron-emitting device |
| EP97926809A EP1018131B1 (en) | 1996-06-07 | 1997-06-05 | Gated electron emission device and method of fabrication thereof |
| KR1019980710147A KR100357812B1 (en) | 1996-06-07 | 1997-06-05 | Gated electron emission device and method of fabrication thereof |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/660,537 US5865657A (en) | 1996-06-07 | 1996-06-07 | Fabrication of gated electron-emitting device utilizing distributed particles to form gate openings typically beveled and/or combined with lift-off or electrochemical removal of excess emitter material |
| US660,537 | 1996-06-07 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| WO1997047020A1 WO1997047020A1 (en) | 1997-12-11 |
| WO1997047020B1 true WO1997047020B1 (en) | 1998-02-05 |
| WO1997047020A9 WO1997047020A9 (en) | 1998-03-12 |
Family
ID=24649927
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1997/009196 WO1997047020A1 (en) | 1996-06-07 | 1997-06-05 | Gated electron emission device and method of fabrication thereof |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5865657A (en) |
| EP (1) | EP1018131B1 (en) |
| JP (1) | JP3736857B2 (en) |
| KR (1) | KR100357812B1 (en) |
| DE (1) | DE69740027D1 (en) |
| TW (1) | TW398005B (en) |
| WO (1) | WO1997047020A1 (en) |
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1996
- 1996-06-07 US US08/660,537 patent/US5865657A/en not_active Expired - Lifetime
-
1997
- 1997-06-05 JP JP50069698A patent/JP3736857B2/en not_active Expired - Fee Related
- 1997-06-05 DE DE69740027T patent/DE69740027D1/en not_active Expired - Lifetime
- 1997-06-05 WO PCT/US1997/009196 patent/WO1997047020A1/en active IP Right Grant
- 1997-06-05 KR KR1019980710147A patent/KR100357812B1/en not_active IP Right Cessation
- 1997-06-05 EP EP97926809A patent/EP1018131B1/en not_active Expired - Lifetime
- 1997-06-07 TW TW086107876A patent/TW398005B/en not_active IP Right Cessation
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