WO1997044954A1

WO1997044954A1 - 16:9 aspect ration displaying and picture out picture using 4:3 screen

Info

Publication number: WO1997044954A1
Application number: PCT/CN1997/000048
Authority: WO
Inventors: Chaoliang Zhang
Original assignee: Chaoliang Zhang
Priority date: 1996-05-17
Filing date: 1997-05-19
Publication date: 1997-11-27
Also published as: AU2884697A

Abstract

An apparatus displays 16:9 aspect ration pictures on 4:3 aspect ration TV screen. The apparatus uses an additional phase shifter of field sync. signal to move the overlapped 16:9 pictures to the top or the bottom of the screen and a small picture processor to display a number of pictures which have small size on the spare area of the screen. On other way, the apparatus uses a main picture memory and the H-scan oscillator pulses the H-scan circuit at a frequency which is 1 1/3 times as original one, to restore the picture of 16:9 system on a 4:3 CRT. After then, the apparatus uses the phase shifter of the field sync. signal and the small picture processor to perform the function of picture-out-picture, or to add other pictures or text in the spare area, achieving the screen compatibility of 16:9 and 4:3 systems by using present 4:3 screen.

Description

4: 3 TV screen display device with 16: 9 picture and external picture

Technical field

The present invention generally relates to the technical field of television reception, and in particular, to a device for displaying a 16: 9 picture and an external picture on a 4: 3 picture tube screen.

Background technique

In the current market where 16: 9-screen color TVs and ⁴ : 3-screen color TVs coexist and compete with each other, the popular 16: 9 wide-screen color TVs have been developing slowly. It is not difficult to find out why. Most of the broadcast television signals are ⁴ : 3 aspect ratio pictures, followed by masked wide pictures, and 16: 9 picture signals are rarely used, making it difficult to popularize color televisions with 16: 9 screens. For example, when watching a ⁴ : ³ TV signal without distortion with a 16: 9 screen color TV, the utilization ratio of the screen will be greatly reduced. For example, when viewing a 4: 3 image with a 28-inch 16: 9 screen, its effective display area is only equivalent to a 21-inch 4: 3 screen TV. In addition, the price of 16: 9 color picture tubes is very high, and the cost of using a data compression method to restore ⁴ : 3 pictures is also higher, so that the cost price of 16: 9 screen color TVs is much higher than that of 4: 3 screens. Color TV. Due to the above reasons, a color television with a 16: 9 screen is in a dilemma, and it is difficult to adapt to the current market demand. -International Patent Application No. WO9403999 discloses a method for displaying a 16: 9 screen on a 4: ³ display. When a 16: 9 system screen is displayed on a 4: 3 screen, the screen is compressed, that is, stretched vertically. One method is to change the edge linearity of the picture to deform the picture to an acceptable level to display the image, but this method causes the picture to have non-linear distortion and uneven brightness.

Summary of the Invention

The purpose of the present invention is to overcome the shortcomings of the prior art mentioned above, and provide an efficient and inexpensive device that uses a ⁴ : 3 picture tube screen to display a 16: 9 screen with an external picture.

According to an aspect of the present invention, a device for displaying a ⁶ : ⁹ wide picture on a 4: 3 television screen is provided, which includes:

A synchronous separation amplifier circuit for separating a synchronization signal from an image signal;

An integrator that generates a field synchronization signal according to the synchronization signal;

A phase shifter for delaying the field synchronization signal by a predetermined time to generate a delayed field synchronization signal

A field oscillator triggered by the field synchronization signal or the delayed field synchronizing signal to oscillate and output to a field output amplifier; and

A central processing unit, configured to generate a field phase shift switch signal and a field phase control signal, The above device further includes a small screen processor for displaying a plurality of small screens for external pictures or displaying image text information.

The phase shifter includes a count value set by the central processing unit or a self-set count value to control counting, and a reset counter controlled by the field synchronization signal; triggered by a pulse output from the counter to generate the counter A monostable circuit of a delayed field synchronization signal; and an oscillator for generating a counting pulse.

The above phase shifter uses RC monostable delay circuit

According to another aspect of the present invention, a device for displaying a 16: 9 wide picture on a ⁴ : 3 television screen is provided, which includes:

A central processing unit that counts and delays the field synchronization signal to generate a delayed field synchronization signal; and a field oscillator, which is controlled to trigger oscillation by the field synchronization signal or the delayed field synchronization signal according to the control of the central processing unit Output to the field output amplifier.

The above device further includes a processor for displaying a plurality of small screens of external pictures or displaying image text information.

A main picture memory, which receives a wide picture image signal, a line synchronization signal, and a field synchronization signal of a 16: 9 television system, and its output is connected to a video processor; and

The horizontal scanning oscillator generates a horizontal synchronization signal whose horizontal frequency is higher than the original scanning frequency by about one-third. The horizontal synchronization signal with an increased horizontal frequency is phase-locked with the field synchronization signal to trigger a horizontal scanning circuit, and controls the scanning circuit. The read operation of the main picture memory synchronizes the displayed image signal with the line synchronization signal with an increased horizontal frequency, and displays a picture compressed to 16: 9 on a ⁴ : 3 screen.

The above device further includes a field synchronization phase shifter for delaying the field synchronization signal by a predetermined time to generate a delayed field synchronization signal.

The phase shifter is implemented by controlling the delay of the start position of the read operation of the main picture memory.

According to the device of the present invention, in a case where a current television broadcasting system mainly plays 4: 3 pictures, a ⁴ : 3 screen picture tube can be fully utilized, and the picture utilization rate is high. When realizing picture-out-of-picture display, the cost of processing large screens is low. Even if you later transition to a 16: 9 screen system, the existing ⁴ : 3 screen picture tubes can still be fully utilized. For comparison When using a 6: 9 screen kinescope to display a 4: 3 undistorted picture and adding an external picture, the diagonal size of the main screen should be reduced by 18.29%; while using a 4: 3 screen kinescope to display 16: 9 When the picture is added to the picture, the diagonal size of the main picture is only reduced by 8.21%. In addition, the cost of the 4: 3 screen picture tube is also much lower than that of the 16 _: 9 screen picture tube. The device of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Further objects, advantages and effects of the present invention will become clearer in the following description.

Overview of the drawings

Fig. 1 is a block diagram showing a device for displaying a 6: 9 picture and an external picture on a 4: 3 television screen according to a first embodiment of the present invention.

FIG. 2 is a timing diagram of the field synchronization pulse delay time achieved by the phase shifter 5 in the apparatus shown in FIG. 1. FIG. FIG. 3 is a circuit block diagram of the phase shifter 5 in the apparatus of the first embodiment of the present invention shown in FIG. 1.

FIG. ⁴ is a block diagram showing a device for displaying a 16: 9 picture and an external picture on a ⁴ : 3 television screen according to a second embodiment of the present invention.

Figure 5 shows the 4: 3 picture tube screen when 16: 9 picture is played, the main picture outside the space to accommodate four 4: 3 picture-out pictures.

FIG. 6 shows the case where the 16: 9 picture is played on a 4: 3 picture tube screen, and the space outside the main picture accommodates ^three 16: 9 picture-by-picture pictures.

FIG. ⁷ is a schematic diagram comparing a 4: 3 picture with a 16: 9 picture (dashed line).

FIG. 8 is a block diagram showing a 4: 3 television screen displaying a 16: 9 television system screen and picture-outside picture apparatus according to a third embodiment of the present invention.

FIG. 9 is a schematic diagram of a non-distorted 16: 9 television system picture restored on a ⁴ : 3 screen in the first embodiment of the present invention.

FIG. 10 shows a schematic diagram of moving the compressed ⁴ : 3 picture to the middle of the screen in the third embodiment of the present invention, and then returning to normal.

Best Mode of the Invention

Referring to FIG. 1, a block diagram of a 4: 3 television screen displaying 16: 9 picture and picture-outside picture device according to a first embodiment of the present invention is shown. Reference numeral 1 denotes a part of a circuit in an original television receiver, wherein, After the synchronization signal is separated by the synchronous separation amplifier circuit ² , the field synchronization signal V _{A is} generated by the integrator ³ to trigger the field oscillator 4 (as shown by the dotted arrow). When receiving a 16: 9 mask type broadcast by a 4: 3 television system In the picture, the central processing unit (CPU) 7 controls the field synchronization signal, and sends it to a phase shifter 5 without passing through the dotted line. After phase shifting (time delay) by the phase shifter 5, a field synchronization pulse V _{B is} generated to trigger The field oscillator 4 „An equivalent switch K may be connected between the output of the integrator 3 and the input of the field oscillator 4, which is controlled by the CPU 7. When the switch K is turned off, the phase shifter 5 shifts the phase. The field sync pulse V _B triggers the field oscillator 4 and generates a delayed field scan, which moves a 16: 9 picture to the upper or lower part of the 4: ³ picture tube screen. The space left on the screen is provided by the small picture processor 6 control realize display picture out picture ⁵ shows a ^4: ³ displays the picture tube screen 16: 9 When surface, an outer space for the main screen ⁴ 4: ³ picture outside picture where a screen; FIG. 6 shows a 4: 3 displays the picture tube screen 16: 9 screen At the same time, the space outside the main screen accommodates three 16: 9 picture-outside pictures. When receiving a picture of a 16: 9 TV system, using field compression can restore an undistorted picture of a 16: 9 TV system on a 4: 3 screen, as shown in Figure 9,

FIG. 2 is a timing diagram of the field synchronization pulse delay time realized by the phase shifter ⁵ in the apparatus of the first embodiment of the present invention, where the field synchronization signal V _B is delayed relative to the field synchronization signal _/ ^ by a time T _p , V is the field scan period. The phase shifter ⁵ can be a simple RC monostable delay circuit, or it can be a counter, or it can be directly counted by the central processing unit CPU 7 to achieve the purpose of delaying the field synchronization pulse. In practical applications, the frequency is divided by a crystal oscillation Digital counting has the best stability. Similarly, it can also be counted by 2 f _H , phase-locked with the TV (line frequency), divided by the resonator.

FIG. 3 is a circuit block diagram of a phase shifter ⁵ in the apparatus of the first embodiment of the present invention shown in FIG. 1, which includes a counter 8, a monostable circuit ^9, and an oscillator 10. Counting pulses generated by the oscillator 10 may be by a field sync signal V _A reset control oscillator 10 is also controlled by the count CPU7 frequency variable. The count value of the counter 8 is controlled by the CPU7 set (when the count value is zero corresponds to the switch K is closed, the field sync signal is not delayed), and by the vertical sync signal V _A reset control. The counter 8 can also set the count value by itself, and when the set count value is reached, the monostable circuit 9 is triggered to generate a delayed field synchronization pulse V _B.

FIG. 4 is a block diagram showing a 4: 3 television screen displaying a 16: 9 picture and an external picture according to a second embodiment of the present invention. Among them, the field synchronization signal V _A generated by the integrator 3 is directly sent to the CPU ⁷ , and the field synchronization pulse V _{B is} generated after the CPU? Counts the delay. Similarly, an equivalent switch K is connected between the input terminal of the field synchronization signal V _{A and the} output terminal of the field synchronization signal V _{B of the} CPU 7. When it is not necessary to view the picture outside, the switch K is closed, that is, the count value is set to zero, and the field Synchronization is not delayed, and the picture is not shifted.

FIG. 8 is a block diagram showing a device for displaying a 16: 9 picture and an external picture on a ⁴ : 3 television screen according to a third embodiment of the present invention. Among them, reference numeral 20 is a video processor, reference numeral 21 is a synchronous separation circuit, reference numeral 1 1 is a main picture memory, and reference numeral 14 is a line scan oscillator (hereinafter referred to as (l + l / 3) f _H oscillator), used to increase the number of scanning lines, reference 15 is a field scanning circuit, reference 16 is a line scanning circuit, reference 12 is a video processor, reference 13 is a video amplifier, and reference 5 is a field synchronous phase shifter Reference numeral 6 is a small picture processor, reference numeral 17 is a picture tube, and reference numeral 7 is a CPU. The difference between the device of this embodiment and the existing ⁴ : 3 screen television is that a main picture memory 1 1 ( (About 1/4 field), (l + l / 3) f _H oscillator I ⁴ and field synchronous phase shifter 5. Pass the (l + l / ³ ) f _H oscillator! ⁴ Make the original line frequency increase by about one third-that is, increase the number of scanning lines by about one third over the original time, and use this line synchronization signal that is about 1/3 higher than the original line frequency (also Obtained through frequency division of the resonator) Phase-locked with the field synchronization signal to trigger the line scanning circuit 16 and control the main picture memory 11 to synchronize the displayed image signal with the line frequency (l + l / 3) f _H (ie, the video signal The frequency is correspondingly increased by about one third). In this way, when receiving the signal broadcast by the 16: 9 system, the picture is just right It is compressed to 16: 9 on the 4: 3 picture tube screen, and then the field synchronization phase shifter 5 is used, or the delay of the start position of the read operation to control the main picture memory 1 1 is used to achieve the field phase shift purpose, or both Phase shift method is used together to move the 16: 9 wide picture on the 4: 3 picture tube screen to the upper or lower part of the screen, and insert a small picture in the free space at the lower or upper part of the screen to realize the 16: 9 picture. Picture function. When receiving a signal broadcast by a 4 _: 3 television system, use a field-synchronized phase shift to move the compressed ⁴ : 3 picture to the middle of the screen, and then increase the field amplitude, for example, by "4: 3 field amplitude control" to obtain normal ⁴ : 3 screen (as shown in Figure 10). And can realize the picture-in-picture (PIP) function of 4: 3 picture.

The third embodiment of the present invention is characterized in that when a 16: 9 system signal starts to play, it can be fully compatible with two systems of 16: 9 and 4: 3, and has a high screen utilization rate, and has a 16: 9 picture Picture-in-Picture (POP) and Picture-in-Picture (PIP) functions for 4: 3 picture.

Industrial applicability

Under the current situation of 4: 3 television systems, the above device of the present invention is a better solution compatible with 4: 3 systems and 16: 9 systems. Even if the television system is all changed to 16: 9 in the future, the third embodiment of the present invention still has its practical value. The spare part of the screen can be used to display graphic information and control information in addition to the small screen. , Closed caption, etc., to achieve multi-functional information display on the TV screen7.

Claims

Rights request

1-A device displaying a 16: 9 wide screen on a 4: 3 TV screen, including:

A synchronous separation amplifier circuit (2) for separating a synchronization signal from an image signal;

An integrator (3) for generating a field synchronization signal according to the synchronization signal;

A phase shifter ( ⁵ ), configured to delay the field synchronization signal by a predetermined time to generate a delayed field synchronization signal;

A field oscillator ( ⁴ ), which is oscillated by the field synchronization signal or the delayed field synchronization signal and output to a field output amplifier; and

The central processing unit ( ⁷ ) is configured to generate a field phase shift switch signal and a field phase control signal.

2. The device according to claim 1, further comprising a small screen processor (6) for displaying a plurality of small screens for external pictures or displaying image text information.

3. The device according to claim 1 or 2, characterized in that the phase shifter (5) comprises a count value set by the central processing unit (7) or a count value set by itself to control counting, And a reset counter (8) controlled by the field sync signal; a monostable circuit (9) triggered by a pulse output from the counter 8 to generate the delayed field sync signal; and an oscillation for generating a counting pulse Device (10).

4- The apparatus according to claim 1 or ² , characterized in that the phase shifter ( ⁵ ) uses an RC monostable delay circuit.

5 · — ⁴ : ³ TV screen display 16: 9 wide screen device, including:

A synchronous separation amplifier circuit ( ² ) for separating a synchronization signal from an image signal;

An integrator (3), generating a field synchronization signal according to the synchronization signal;

A central processing unit (7), which generates a delayed field synchronization signal after delaying counting the field synchronization signals; and

The field oscillator ( ⁴ ) is triggered by the field synchronization signal or the delayed field synchronization signal according to the control of the central processing unit ( ⁷ ), and is output to a field output amplifier.

6- The device according to claim 5, further comprising a small screen processor (6) for displaying a plurality of small screens of external pictures or displaying image text information.

7. —A device with a 4: 3 TV screen displaying a 16: 9 wide picture, including:

A main picture memory (1 1) for receiving a wide picture image signal, a line synchronization signal and a field synchronization signal of a 16: 9 television system, and its output is connected to a video processor (12); and

A line scanning oscillator (I ⁴ ) generates a line synchronization signal whose line frequency is higher than the original scanning frequency by about ^one-third , and phase-locks the line synchronization signal with the line synchronization signal with an increased line frequency to trigger a line scanning circuit ( ¹⁶ ), and control the read operation of the main screen memory (1 1), so that the image signal it displays is synchronized with the line synchronization signal with the increased line frequency, and the display is compressed to 16: on a ⁴ : 3 screen: ⁹ pictures. 8- The device according to claim ⁷ , further comprising a field synchronization phase shifter (5) for delaying the field synchronization signal by a predetermined time to generate a delayed field synchronization signal.

9. The device according to claim ⁷ or 8, further comprising a small screen processor (6) for displaying a plurality of small screens for external pictures or displaying image text information,

10. The device according to claim 8, characterized in that the field synchronous phase shifter (5) is implemented by controlling a delay of a start position of a read operation of the main picture memory (n).