WO1997035255A1 - Systeme d'ordinateur virtuel reparti - Google Patents

Systeme d'ordinateur virtuel reparti Download PDF

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Publication number
WO1997035255A1
WO1997035255A1 PCT/JP1996/000674 JP9600674W WO9735255A1 WO 1997035255 A1 WO1997035255 A1 WO 1997035255A1 JP 9600674 W JP9600674 W JP 9600674W WO 9735255 A1 WO9735255 A1 WO 9735255A1
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WO
WIPO (PCT)
Prior art keywords
computer
virtual
physical
virtual computer
cpu
Prior art date
Application number
PCT/JP1996/000674
Other languages
English (en)
Japanese (ja)
Inventor
Seiji Kataoka
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP1996/000674 priority Critical patent/WO1997035255A1/fr
Publication of WO1997035255A1 publication Critical patent/WO1997035255A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements

Definitions

  • the present invention relates to a distributed virtual computer system in which a plurality of physical computers in which virtual computers are operating under the control of a control program are connected by a coupling mechanism device.
  • the present invention relates to technology that is effective when applied to a distributed virtual computer system that can realize a single system combining virtual computers across physical computers. Background art
  • a control program allocates and simulates the resources of a processing device, thereby realizing a plurality of virtual machines.
  • the virtual computer is defined by defining 0S generation configuration information, virtual machine resource allocation, and CPU service ratio information for each physical computer.
  • the system is operated using console devices for each virtual machine.
  • a plurality of physical computers and a plurality of virtual machines on physical computer is connected to the OS (guest OS) force s each calculation machine units running Objects that can be managed and operated from the console device
  • OS guest OS
  • the virtual computer in the physical computer controlled by the virtual computer control program conventionally logically divides the hardware resource in the physical computer and assigns it to each virtual computer.
  • it is not possible to design and build a flexible virtual computer system which is limited by the hard disk resource capacity built into the computer.
  • the present invention is to collectively manage and operate the entire system composed of a physical computer and a virtual computer in the computer using a virtual computer control program built in a coupling mechanism for connecting and connecting a plurality of physical computers.
  • An object of the present invention is to provide a distributed virtual computer system capable of performing the following.
  • the present invention also provides a distributed virtual system that enables automatic system operation by defining a plurality of patterns of configuration information managed by the coupling mechanism and switching configuration information patterns according to system operation time by timer reservation by a timer function.
  • An object is to provide a computer system.
  • a virtual computer control program in each physical computer is provided with an external input / output interface for sharing a hardware resource between physically divided virtual computers with each other. It is an object of the present invention to provide a single system in which one OS can be operated across physical computers without being limited by the hardware resource capacity of each physical computer by interconnecting them. Disclosure of the invention
  • a virtual computer system is a virtual computer system in which a virtual computer operates on a physical computer under the control of a virtual computer control program, and includes a plurality of physical computers, a virtual computer, and a connection commonly connected by each computer.
  • the distributed virtual computer system composed of the By incorporating a control program that performs simulation control as a computer, this coupling mechanism allows multiple computers to be unitarily operated and managed as a single system.
  • a different identifier code is added to the message so that the virtual computer can be virtualized.
  • Configuration information such as computer resource allocation and CPU service ratio, can be managed by a coupling mechanism, making it easy to operate, including configuration changes, and operation management or physical or virtual computers.
  • connecting each computer with an interface that shares the hardware resources of the computers it is possible to implement not only a virtual computer in which the hardware resources in one physical computer are logically divided, but also multiple computers. This makes it possible to realize a virtual machine that crosses physical computers.
  • operation and management can be performed as a single system by a control program that simulates and controls each computer in the coupling mechanism that is connected by a plurality of physical computers in a shared manner.
  • a control program that simulates and controls each computer in the coupling mechanism that is connected by a plurality of physical computers in a shared manner.
  • an interface for connecting physical computers to share hardware resources of multiple physical computers enables the realization of virtual machines to be performed between multiple computers across physical computers instead of physical computers. And hardware resources can be used effectively.
  • the configuration information of each physical computer, the virtual computer within the physical computer, and the virtual computer across the physical computers is all transmitted by the control program of the coupling mechanism.
  • Manages and simulates, and uses these multiple types of configuration definition files as timer reservation machines By switching the storage file side according to the function, it is possible to flexibly change the configuration according to the operation time when various system configurations are required.
  • FIG. 1 is a schematic block diagram showing a distributed shared computer system according to one embodiment of the present invention
  • FIG. 2 is a schematic block diagram showing a distributed shared computer system constituted by a plurality of virtual computer systems.
  • Fig. 3 is a logical schematic block diagram showing the assignment of each hardware resource to the computer system
  • Fig. 4 is an explanatory diagram showing the identification information of the virtual computer managed by the coupling mechanism (CF) in this embodiment.
  • Fig. 5 is an explanatory diagram showing the data between the coupling device (CF) and the service processor in the physical computer.
  • Fig. 6 is the configuration definition method of the virtual computer system and the processing flow of the IPL of a specific LPAR.
  • FIG. 7 is a flowchart showing switching of the system configuration pattern based on the configuration information of the virtual machine time-scheduled. It is a figure. BEST MODE FOR CARRYING OUT THE INVENTION
  • FIG. 1 shows the configuration of a distributed computer system according to one embodiment of the present invention.
  • a plurality of physical computers A (CPU-A) 107, a physical computer B (CPU-B) 108, and a physical computer C (CPU-C) 109 are connected.
  • This is a collective model computer system that is shared and connected by the mechanical device (CF) 100. It connects the service processor (SVP) between the CF 100 and the CPU A 107, CPU B 108, and CPU C 109.
  • SVP service processor
  • It consists of a communication control interface 104 and a CPU-A107, CPU-B108, and CPU-C109 that connect the CPUs to each other.
  • CF 100 is a hard disk drive (HD) 101, C Console display unit for exclusive use of F (CD) 102, external timer unit (SY S. T IMER) 110, CPU—A107, CPU-B108, CPU—C109 as a single system computer as a multiprocessor computer system It is composed of a virtual machine simulation control program (HYP) 103 that performs simulation control in a single program.
  • HD hard disk drive
  • SY S. T IMER external timer unit
  • CPU—A107, CPU-B108, CPU—C109 as a single system computer as a multiprocessor computer system
  • It is composed of a virtual machine simulation control program (HYP) 103 that performs simulation control in a single program.
  • Figures 2 and 3 show the system configuration for realizing a virtual machine while occupying and sharing each other's hardware resources with CPU-A107, CPU-B108, and CPU-C109. It is a real computer (bare computer) that runs on one OS (OS 1) 300 without logically dividing the hardware resource, whereas CPU-B 108 and CPU-C 109 are virtual computers.
  • a simulation control program HYP-B200, HYP-C201 that realizes a virtual machine is built in, and hardware resources are logically divided into a plurality of virtual computers LPAR-A202, LPAR-B203, LPAR-C1 ( 20 4), shared by LPAR-C 2 (205) and LPAR-D 206, Guest 0 S 2 (0 S 2) 301, Guest 0S 3 (0 S 3) 302, Guest OS 4 (0 S 4) 303
  • a virtual computer system running on guest 0S5 (OS5) 304 is realized.
  • Fig. 4 shows the identification information of the virtual machine (hereinafter referred to as L PAR) set in the HYP 103 with the built-in CF 100 in the frame format 400 displayed on the CD 102.
  • System name (SYS.NAME) 401 physical computer name (CPU NA ME) 402 when instructing operation
  • virtual computer identifier (L PAR NO) 403 when the target system is LPAR status of each system is composed of a status (STAT US) 404 which indicates the, LPAR N 0403 by way system of interest is specified only when the LPAR, an if not specified the target system power? physical computer power? , CF internal HYP 103 is 0 S force one by SY S.
  • FIG. 5 is a diagram showing a communication data format 506 used for communication between the HYP 103 having the built-in CF 100 and the SVP of the CPU—A 107, CPU-B 108, and CPU—C 109 by the communication control interface 104.
  • the format is a control type code (CLAS S) 501 indicating the type of control such as system reset for LPAR, IPL (Initial Program Load), and activator, an operation content code (ACODE) 502, and a virtual machine.
  • LPAR identification number (LPRNO) 503, ACODE 502 additional code that identifies
  • the communication data configured in this format allows the operator to use the CD 102 to centrally operate the assignment and configuration management of a plurality of LPARs.
  • CPU-B108 Instruction processor in CPU-B108, CPU-C109 between separate CPU-B108 and CPU-C109 which are physically divided, main / extended storage
  • the CPU-B 108 is connected to an external resource sharing interface 106, which has an interface that allows the input and output processors to access and communicate with each other the instruction word and data, and an interface for synchronous control of the instruction processor.
  • CPU—C 109 operates as a single system.
  • the resource sharing interface 106 is between LPAR-C 1 (204) and LPAR-C 2 (205) logically divided by HYP-B 200 and HYP-C 201 in CPU-B 108 and CPU-C 109.
  • LPAR—C l and LPAR—C 2 defined by CD 102 of CF 100 run on one system (SYS, NAME 401) OS 4 (303), and A single system that operates on two 0S is realized.
  • FIG. 6 shows a method of defining the configuration of an LPAR system, which is an operation of the CD 102 by an operator, and a processing flow of an IPL of a specific LPAR.
  • the operator displays the HYP 103 frame with a built-in CF on the CD 102 (step 601), and displays SYS. NAME 401, CPU NAME 402, LPAR.
  • NO 403 is determined and defined (step 602).
  • the LPAR control program frame is set for each LPAR NO 403 (step 603), and the number of IPs, the number of channel paths, and the logical allocation of the raw Z extended storage capacity for each LPAR are defined (step 604).
  • the IPL operation by the operator specifies the SYS. NAME 401 from the CD 102 (step 607), and executes the IPL processing (step 608).
  • the SVP of the CPU having the target LPAR determines the code (CLAS) 501 in the data from the CF 100 (step 609) and damages the ADD I NF 505 into the memory (step 610). ), ADD I NF is determined by the HYP of the CPU (step 6 12) and specified Simulation control of IPL operation on the selected LPAR system (Step 6 13)
  • FIG. 7 shows a configuration change operation flow in which the external timer mounting (SYS. T IMER) 110 is synchronized with the configuration information of the LPAR system.
  • SYS. T IMER external timer mounting
  • the procedure for determining the configuration for each L FAR system by the operator is performed by the same operation as Steps 601 to 606 in FIG. 6, and the determined LPAR configuration is assigned a file name for each business system, and the file name is assigned to the file name.
  • the time required for each configuration and the configuration change time are added to the HD 101 in the CF 100 and saved (step 701). If there is a different system configuration for a plurality of tasks, the file is duplicated and saved in HD 101 with a different file name (step 702).
  • the system configuration file name and the configuration change time stored in HD 101 are registered (step 703). When the configuration change time is reached, a specific system configuration file in HD 101 is registered. (Step 704), and dynamically change the LPAR system to a new system by HYP of each CPU (Step 705) o
  • the loosely-coupled multiprocessor can be controlled as a single system, and the CPU-A 107, CPU-B 108,
  • the data communication with the virtual machine identifier between the CPU-CIO 9 and the HYP-B200 and HYP-C 201 allows the CD 102 to perform centralized operation / management.
  • the external interface 106 that shares resources between physically divided processors, the multiprocessor system operating as a single system is logically partitioned without restrictions such as division loss. It becomes possible to realize a virtual computer system.
  • the present invention provides a distributed virtual computer system in which a plurality of physical computers in which virtual machines are operating under the control of a control program are connected by a coupling mechanism device.
  • This technology is effective when applied to a distributed virtual computer system that enables a dynamic configuration change of the system and realizes a single system that combines virtual computers across physical computers.

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)

Abstract

Système d'ordinateur virtuel réparti comprenant une pluralité d'ordinateurs physiques interconnectés par un système de connexion. Ces ordinateurs sont mis en fonctionnement alors qu'au moins l'un d'entre eux est commandé par un programme de commande d'ordinateur virtuel. Le système de connexion est pourvu d'un programme de commande destiné à la simulation collective des ordinateurs physiques et virtuels, tous les ordinateurs étant commandés sous forme d'un système unique.
PCT/JP1996/000674 1996-03-15 1996-03-15 Systeme d'ordinateur virtuel reparti WO1997035255A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP1996/000674 WO1997035255A1 (fr) 1996-03-15 1996-03-15 Systeme d'ordinateur virtuel reparti

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP1996/000674 WO1997035255A1 (fr) 1996-03-15 1996-03-15 Systeme d'ordinateur virtuel reparti

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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002287996A (ja) * 2001-03-01 2002-10-04 Internatl Business Mach Corp <Ibm> 構成可能なデータ処理システムで端末のプロファイルを保守する方法および装置
JP2003067352A (ja) * 2001-08-30 2003-03-07 Nec Corp パーティション構成変更方式、パーティション構成変更方法およびパーティション構成変更用プログラム
JP2009201089A (ja) * 2007-05-21 2009-09-03 Nec Infrontia Corp 主装置、該主装置への多機能ユニットの実装方法及びそのプログラム
EP2124396A1 (fr) 2008-05-19 2009-11-25 NEC Infrontia Corporation Unité d'accès d'interface de fente, son procédé, et son programme, ainsi que la configuration de redondance d'une unité principale, et son procédé de remplacement
US7761640B2 (en) 2007-05-21 2010-07-20 Nec Infrontia Corporation Slot interface access device, slot interface access method, and program therefor
JP2010231601A (ja) * 2009-03-27 2010-10-14 Nec Corp グリッドコンピューティングシステム、リソース制御方法およびリソース制御プログラム
US8244949B2 (en) 2007-05-18 2012-08-14 Nec Infrontia Corporation Slot interface access unit, method thereof, and program thereof, as well as redundancy configuration of main unit, and replacing method of the same
JP2012226427A (ja) * 2011-04-15 2012-11-15 Hitachi Ltd リソース管理方法及び計算機システム
US8473774B2 (en) 2007-05-18 2013-06-25 Nec Infrontia Corporation Main device redundancy configuration and main device replacing method
JP2015230586A (ja) * 2014-06-05 2015-12-21 株式会社三菱東京Ｕｆｊ銀行 情報処理装置、プログラムおよび記録媒体
JP2020123382A (ja) * 2020-04-16 2020-08-13 株式会社三菱Ｕｆｊ銀行 制御プログラム
US10761859B2 (en) 2017-05-19 2020-09-01 Fujitsu Limited Information processing system, management device, and method for controlling information processing system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05158721A (ja) * 1991-12-10 1993-06-25 Hitachi Ltd 仮想計算機システム
JPH05324362A (ja) * 1992-05-15 1993-12-07 Fujitsu Ltd 計算機システム間の通信割込み制御方式

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05158721A (ja) * 1991-12-10 1993-06-25 Hitachi Ltd 仮想計算機システム
JPH05324362A (ja) * 1992-05-15 1993-12-07 Fujitsu Ltd 計算機システム間の通信割込み制御方式

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7039692B2 (en) 2001-03-01 2006-05-02 International Business Machines Corporation Method and apparatus for maintaining profiles for terminals in a configurable data processing system
JP2002287996A (ja) * 2001-03-01 2002-10-04 Internatl Business Mach Corp <Ibm> 構成可能なデータ処理システムで端末のプロファイルを保守する方法および装置
JP2003067352A (ja) * 2001-08-30 2003-03-07 Nec Corp パーティション構成変更方式、パーティション構成変更方法およびパーティション構成変更用プログラム
US8473774B2 (en) 2007-05-18 2013-06-25 Nec Infrontia Corporation Main device redundancy configuration and main device replacing method
US8244949B2 (en) 2007-05-18 2012-08-14 Nec Infrontia Corporation Slot interface access unit, method thereof, and program thereof, as well as redundancy configuration of main unit, and replacing method of the same
US8285905B2 (en) 2007-05-18 2012-10-09 Nec Infrontia Corporation Redundancy configuration and replacement method in a system including a master main unit and slave main units
AU2008201942B2 (en) * 2007-05-21 2013-06-13 Nec Platforms, Ltd. Slot interface access device, slot interface access method , and program therefor
JP2009201089A (ja) * 2007-05-21 2009-09-03 Nec Infrontia Corp 主装置、該主装置への多機能ユニットの実装方法及びそのプログラム
US7761640B2 (en) 2007-05-21 2010-07-20 Nec Infrontia Corporation Slot interface access device, slot interface access method, and program therefor
EP2124396A1 (fr) 2008-05-19 2009-11-25 NEC Infrontia Corporation Unité d'accès d'interface de fente, son procédé, et son programme, ainsi que la configuration de redondance d'une unité principale, et son procédé de remplacement
EP3232612A1 (fr) 2008-05-19 2017-10-18 NEC Platforms, Ltd. Configuration de redondance d'une unité principale et son procédé de remplacement
JP2010231601A (ja) * 2009-03-27 2010-10-14 Nec Corp グリッドコンピューティングシステム、リソース制御方法およびリソース制御プログラム
JP2012226427A (ja) * 2011-04-15 2012-11-15 Hitachi Ltd リソース管理方法及び計算機システム
JP2015230586A (ja) * 2014-06-05 2015-12-21 株式会社三菱東京Ｕｆｊ銀行 情報処理装置、プログラムおよび記録媒体
US10761859B2 (en) 2017-05-19 2020-09-01 Fujitsu Limited Information processing system, management device, and method for controlling information processing system
JP2020123382A (ja) * 2020-04-16 2020-08-13 株式会社三菱Ｕｆｊ銀行 制御プログラム

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