WO1997023874A1

WO1997023874A1 - Reproducing circuit

Info

Publication number: WO1997023874A1
Application number: PCT/JP1996/002743
Authority: WO
Inventors: Junichi Horigome
Original assignee: Sony Corporation
Priority date: 1995-09-21
Filing date: 1996-09-24
Publication date: 1997-07-03
Also published as: KR100488636B1; KR970707541A; JP4150074B2

Abstract

A reproduction apparatus for reproducing a recording medium on which information data and sync data are serially recorded along a track in each sector. This reproduction apparatus comprises read means for reading the information data and the sync data and generating reproduction signals, AC coupling means for generating corrected reproduction signals by selecting a first time constant and one of second time constants greater than the first time constant and effecting AC coupling for this reproduction signal, detection means for outputting a detection signal representing the timing at which the read means reads out the sync data, control means for controlling the AC coupling means so as to select the first time constant up to a second timing a predetermined time after the first timing decided on the basis of this detection signal, and to select the second time constant at the second timing, binarization means for generating a binary corrected reproduction signal by binarizing the corrected reproduction signal, and demodulation means for demodulating an information signal from the binary corrected reproduction signal. Sync data can be correctly reproduced by such a simple construction by shortening the period of a transient state at a sync data portion while disappearance of DC components to be contained in the information data of the reproduction signal is prevented.

Description

Specification

Title of the invention Regeneration circuit Technical field

The present invention relates to a reproducing circuit, and more particularly to a reproducing circuit for reproducing a signal read from a disk-shaped recording medium (such as a read-only optical disk, a write-once optical disk, and a rewritable optical disk). It is suitable. Background art

[Evaluation of various data modulation methods]

The digital data (original information) we usually handle are “0” and “1”.

Has a signal form arranged in an arbitrary order, but it is not efficient to use this as it is for the recording signal in consideration of the characteristics of the recording-reproducing system. Therefore, the original information is converted (modulated) into a signal suitable for the recording medium described above and recorded, and the signal reproduced from the recording medium is restored (demodulated) to the original information. Recently, various recording codes have been proposed as a digital data recording method. For example, the characteristics required for modulation and demodulation for optical discs include:

(1) In order to increase the capacity of the file, the density can be increased.

② Easy self-synchronization for extracting information signals from playback signals

③ In case of binarization (digitalization) during reproduction, modulation is performed so as not to cause a pop-out error due to fluctuation of the reference level, or to cause fluctuation in a servo error signal during recording / reproduction. The frequency spectrum of the received signal is DC free (does not impose a DC component); 伝播 It is difficult for error propagation in which an error of a certain bit affects the reproduction of bit information that follows one after another to occur.

And the like.

There are NRZ method, NRZI method, FM method, EFM method, (2,7) -RLL method, etc., as the method ii familiar to data recording on optical discs. The number of consecutive identical bits in a data sequence is called a run (Run).

The NRZ (Non Return to Zero) method is a method that is often used in magnetic recording such as hard disks, in which the signal levels of digital data logical values “0” and “1” are low and high, respectively. It is completely compatible with levels and is the easiest to understand as a conversion of electrical signals to digital data.

The NRZI (Non Return to Zero Inverse) method is a method in which the signal level is inverted only when the key value of the digital data is “1”.

In these NRZ and NRZI systems, the maximum inversion width T max of the data string is T max = infinity, which indicates that the modulation system is difficult to achieve self-synchronization. Also, since it does not become a DC free, it is not used for data recording on current optical discs. At present, the RLL system and the EFM modulation system are employed.

RLL (Run Length Limited) refers to an encoding method in which the maximum inversion width T ma>: is limited.In particular, the minimum run is d, the maximum run is k, and the data m bit is Encoding that transforms into n-bit modulation bits is called (d, k, m, n)-RLL encoding. Depending on how each parameter is taken, there are several possible RLL codes, but these can be determined by performance evaluation parameters that indicate characteristics.

The minimum inversion width T min, one of the evaluation parameters, is much smaller. If it is too short, the reproduced waveform will be damaged due to the optical transfer OTF (0ptical Transfer Function) or the limit of folding, so a larger T min is advantageous.

Conversely, the maximum inversion width T max is related to the self-synchronous noise, and a smaller value is advantageous. That is, even if there is a time axis fluctuation (jitter) in the reproduced signal, the signal must be frequent in order to allow the extracted synchronization signal to follow the fluctuation. Also, if the inversion interval is long, there is a problem that the DC component fluctuates.

In addition, the detection window width Tw indicates the allowable value of the time axis fluctuation (jitter) of the reproduced signal. Reproduction jitter in an optical disc is a force that can be considered by various factors. It is not preferable that data shift and the like occur due to the time axis fluctuation. Therefore, it is desirable that the detection window width Tw be large.

Table 1 below shows the evaluation parameters of the main coding methods.

Table 1 Evaluation parameters for modulation code

Notation code J _ 1 km n Tmin Tmax Tw

NRZI (0) () (1) (1) 1 1

EFM 2 10 8 17 1.44 5.1 0.47

(2,7) RLL 2 7 1 2 1.5 4 0.5

(1,7) RLL 1 7 2 3 1.33 5.33 0.67

EFM (Eight to Fourteen Modulation) is a method of converting 8 data bits into 14 modulation bits. Of the 2 14 (= 2 1 4) patterns, 2 5 6 (= 2 8) patterns with d = 2 and k = 10 are selected. At this time, the three bits “0 0 0” and “0 1 One of 0 j, “100”, and “001” is selected and inserted from the viewpoint of reducing the DC component or low-frequency component of the final waveform sequence.

As a result, it has the feature that the DC component or the low frequency component is small. However, inserting three bits for connection inevitably lowers the recording density, and the algorithm for determining these three bits is quite complicated, and the modulator also has a complicated structure.

On the other hand, (2,7) -RLL modulation is a method generally used for data recording on optical discs at present. This modulation method is characterized in that the maximum inversion width T max is smaller than the minimum inversion width T min. However, since there are two modulation bits for one data bit, there is a disadvantage that the detection window width Tw is as small as 0.5 T and cannot be taken as large. Here, T indicates an interval of one data bit. In addition, since the word length is variable, it is necessary to determine word boundaries, which has the disadvantage that error propagation tends to occur. In order to solve this problem, when digital data is recorded on an optical disc, a synchronization signal (RESYNC) signal is inserted into the data every certain data section to prevent the propagation of errors. You have to be creative.

On the other hand, (1,7) -RLL modulation is a coding scheme that has recently attracted attention, and has the advantage of being able to record at high density and at a high data rate. In this method, the minimum inversion width T min is 1.33 T, which is slightly worse than the above (2,7)-1¾ 1.5 modulation, but 2 bits of data Since it is converted into three modulation bits, the detection window width Tw becomes 2Ζ3, which also has the advantage that there is relatively room for demodulation. However, since a process for reducing the DC component such as the EFM modulation described above has not been performed, a problem remains in this respect.

In data recording on the optical disc, the data bit The sequence is converted to such a PLL modulation bit, and then a recording waveform is obtained using NRZ or NRZI. That is, the input data sequence, which is the original information, is RLL-modulated, changed to T min and T max and converted to a PLL modulation bit sequence so as to be more suitable for an optical disc, and the NRZ or NRZI The recorded waveform sequence is obtained by

At this time, as shown in FIG. 6, a method of performing recording using NRZ is called inter-mark recording or bit position recording. In this bit position recording, one of the recording marks corresponds to the modulation bit "1", and at the time of reproduction, the position of the mark is detected to correspond to the bit "1". is there.

On the other hand, the method of recording using NRZI is called mark length recording or mark edge recording. In this case, the position where the signal level changes, that is, 緣 before and after the mark corresponds to the change bit. During playback, both ends of the mark on the disc are detected and correspond to bit “1”.

In the bit position recording, since only the presence or absence of a mark is detected, it is difficult to receive the influence (jitter or the like) of the disorder of the mark shape. However, a mark edge for recording two modulation bits in one mark. There is a disadvantage that the recording density is lower than that of the recording method. Therefore, when the bit position recording method is adopted, even if the detection window width Tw is somewhat narrow, a modulation code having a small minimum inversion width T min is considered to be suitable from the viewpoint of improving the recording density.

Mark length recording has the feature that the recording density can be increased. However, some recording media have different shapes at the front end and the rear end of the mark, and cannot be used with such a recording medium.

[Cause of DC level fluctuation]

Then, a signal (reproduced signal) obtained by reproducing the magneto-optical disc is reproduced. No.) S ί n generally includes, intermittently, an address component S a and a data component S d, as shown in FIG. 7A, for example. For example, in a magneto-optical disk, there is a change in the DC level S dc due to an increase in the amount of light for erasing or writing data.

(D C level fluctuation)

The causes of such fluctuations in the DC level are mainly the fluctuations in the DC level due to the difference in the reflectivity between the CD section and the M0 section, and the fluctuations in the DC level at the time of erasing. The respective fluctuations of the DC level will be specifically described with reference to FIGS. 8 and 9, taking a rewritable optical disc as an example.

(1) DC level fluctuation between CD section and M0 section

Taking a magneto-optical disk as an example, an ID (or CD) detection system that detects bit information can be used as a magneto-optical signal detector, as shown in Fig. 8, and recording / erasing is possible. There is a MO detection system. In the former ID detection system, only the light quantity changes depending on the presence or absence of a bit, and the sum A + B of the light receiving element A and the light receiving element B is obtained and used as the D detection signal (see FIG. 9A). In the latter MO detection system, the polarization plane of the beam changes slightly depending on whether the direction of magnetization is S or N, and when it is caught through PBS (polarization beam splitter), the polarization plane is changed. In the forward direction, the input of photodetector A increases, and in the reverse direction, the input of photodetector B increases. The difference A—B is obtained and used as the M0 detection signal (see FIG. 9B). The ID detection signal and the MO detection signal occur alternately in time, and these detection signals are alternately switched and combined to form a reproduced signal (see FIG. 9C).

In such a magneto-optical detection system, a difference in DC level may occur between the two detection signals due to a difference in reflectivity between the MO detection system and the ID detection system, an optical imbalance, etc. See figure C ). Also, the combination of the ID detection signal and MO detection signal is intermittently included in each sector, and DC levels differ between sectors. If there is such a difference in DC level, it will not be possible to correctly and reliably perform binarization when subsequently performing binarization.

(2) DC level fluctuation during erase

In addition, when the information is erased or automatically erased before overwriting, the amount of laser light increases, so during the erasing period, the ID detection signal that detects the bit by reflected light is used. Has a relatively large DC level, resulting in DC fluctuations in the reproduced signal (see Fig. 9D).

At this time, since the MO detection signal takes a difference, there is no detection signal originally. However, in reality, there is a residual common-mode rejection due to variations in the components of the detection system (eg, optical imbalance), which causes DC level fluctuations (see Fig. 9E). Even during this erasure, the D detection signal (eg, sector mark, address part, etc.) must be reproduced from the playback signal that combines the ID detection signal and MO detection signal in order to identify the erasure point. Therefore, it is necessary to suppress the difference in DC level _β

Therefore, in order to solve the problem of such DC level fluctuation, AC coupling (AC coupling) is performed to suppress the DC component.

[Difficulty in selecting the time constant of AC coupling]

Conventionally, as a modulation method for data recording, for example, a modulation method in which the proportions of “0” and “1” are equal, such as the above-mentioned EFM modulation, has been adopted. Since it was not included, there was no problem that it was difficult to select the time constant of AC coupling.

However, the modulation method for data recording is different from RLL modulation. When a DC component is included in a raw signal, there is a problem that a correct reproduction signal cannot be read by simply performing the AC coupling method.

That is, when the time constant of the AC coupling is reduced, as shown in FIG. 7B, the reproduced signal Sin is a discontinuous part of the data, that is, the head part of each of the address component Sa and the data component Sd. Although the period of the transient state associated with the AC coupling in the above disappears, the rise of each component becomes steep, but the DC component to be included in the reproduction signal Sin is lost, so that correct reproduction becomes difficult, and the reproduction characteristic becomes poor. There is a problem that leads to deterioration.

Conversely, if the time constant of the AC coupling is increased, as shown in FIG. 7C, the loss of the DC component included in the reproduced signal Sin is prevented, but the address component S a and the The transition period of the leading portion of the data component Sd becomes longer, which causes a problem that it is difficult to reproduce the leading portion (the signal component indicated by the circle a) of the reproduced signal Sin. Such a phenomenon is particularly prominent in mark edge recording shown in FIG.

When the reproduction signal is AC-coupled with a certain time constant in this way, if the time constant is small, the period of the transient state is shortened, and the DC component inherent in the reproduction signal is lost, so that it is difficult to reproduce correctly. become. On the other hand, if the time constant is too large, the period of the transient state becomes longer, and the DC component of the reproduced signal is not lost, but it becomes difficult to reproduce the respective leading portions of the address component Sa and the data component Sd.

To achieve higher data densities and higher bit rates, it is now becoming more preferable to adopt a modulation scheme such as (1,7) -RLL. (1,7) — Unlike EFM modulation, RLL modulation is a modulation method that does not consider the suppression of DC components. Here, apply the above question to the case of (1,7) — RLL modulation. As a result, as long as a modulation method that inherently has a DC component such as (1, 7) — RLL is adopted, reading may not be possible simply by suppressing the DC component by AC coupling. .

That is, (1, 7) — RLL modulation has a minimum run of d = 1 and a maximum run of k = 7, so at least a “0” is inserted between “1” and “1”, The maximum run of “0” is seven. Here, when AC coupling was performed with a relatively short time constant so that the synchronized data existing at the beginning of each sector could be quickly reproduced, a relatively long run continued in the data part that was subsequently reproduced. In this case, the original DC component of this part is lost, and it cannot be properly binarized in the subsequent stage. If AC coupling is performed with a relatively large time constant that can be played back properly, the synchronization data at the beginning of the sector can be reproduced for a long period of time, and during that time, the synchronized data can be played back correctly. Can not.

The present invention has been made in view of the above problems, and has as its object to prevent the loss of the DC component included in the reproduced signal with a simple configuration, and to further reduce the data. It is an object of the present invention to provide a reproducing circuit capable of shortening the period of the transient state at the discontinuous portion of the circuit. Disclosure of the invention

A reproducing circuit according to the present invention is a reproducing apparatus for reproducing a recording medium in which information data and synchronous data used for synchronization when reproducing the information data are sequentially recorded on a track. Reading means for reading out the information data and the synchronous data to generate a reproduction signal; a first time constant; and a second time constant larger than the first time constant. AC coupling means for generating a corrected reproduction signal by selecting one of the time constants and performing AC coupling on the reproduction signal, and detection indicating the timing at which the firing means reads the synchronization data. Detecting means for outputting a signal, and selecting the first time constant from a first timing determined based on the detection signal to a second timing after a predetermined time, A control means for controlling the AC coupling means so as to select the second time constant at a second timing, and a binary means for binarizing the modified reproduction signal to generate a binarized modified reproduction signal Decoding means, and demodulation means for demodulating the information signal from the binarized modified reproduction signal.

As a result, first, the input signal consisting of information data and synchronization data suppresses the fluctuation of the DC level included in the input signal in the AC coupling circuit, but it is necessary to select the time constant of the AC coupling circuit. Therefore, the DC level may disappear. In the signal form of the input signal, the DC level may be used as a part of the effective signal component for reproducing (demodulating) the input signal.

Therefore, if the DC level itself is eliminated in the AC coupling circuit to suppress the fluctuation of the DC level, the input signal having the above-described signal form cannot be effectively reproduced.

However, in the reproducing circuit according to the present invention, since the time constant of the AC coupling circuit is switched at a predetermined timing by the control means for controlling the AC coupling means, the predetermined timing is appropriately adjusted. During the period in which the DC level must be effectively treated as a signal component, the time constant of the AC coupling circuit can be switched to, for example, a direction in which the DC level is increased. Loss can be prevented, and the input signal can be properly reproduced.

Furthermore, the reproduction circuit according to the present invention is the reproduction apparatus described above, The recording medium has a sector mark indicating the beginning of a sector, a sector having the synchronization data and the information data, sequentially recorded along the track, and the detection means reads the data by the reading means. The detection signal is output when the output reproduction signal is a reproduction signal from the sector mark.

That is, the time constant of the AC coupling circuit is set in a smaller direction, and a switching signal is output from the control means for controlling the AC coupling means based on the detection of the sector mark by the detection means. If the time constant of the AC coupling circuit is switched to be increased based on the output of the switching signal, the loss of the DC level contained in the information data can be prevented. In particular, when the leading part of the synchronous data is read, the time period of the transient state is short and the signal level rises sharply because the time constant of the AC coupling circuit is relatively small, so that Synchronous data can be detected by the detecting means.

Further, in the reproducing circuit according to the present invention, in the reproducing apparatus described above, the AC coupling means may include a capacitor having one end connected to the output side of the reading means, and one end connected to the other end of the capacitor. And a connection means for selectively grounding the other ends of the plurality of resistors by the control means.

Therefore, the time constant of the AC coupling circuit is appropriately switched only by the operation of selectively grounding the other ends of the plurality of resistors by the control means, and the configuration for switching the time constant of the AC coupling circuit is extremely reduced. It can be easily done. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a diagram showing a configuration of a main part of a magneto-optical disc system according to the present embodiment.

Fig. 2 shows the recording medium of the magneto-optical disk system of Fig. 1. FIG. 2 is a diagram illustrating a sector format used in a magneto-optical disc.

FIG. 3 is a diagram showing a signal waveform of the magneto-optical disk system of FIG.

FIGS. 4A to 4D are diagrams for explaining a sector mark detection operation in the sector mark detection circuit of the magneto-optical disk system of FIG.

FIG. 5 is a circuit diagram showing another example of the configuration of the time constant switching circuit of the AC coupling plane of the magneto-optical disc system of FIG.

FIG. 6 is a diagram for explaining bit position recording and markage recording.

7A to 7C are diagrams illustrating the waveform of a reproduced signal depending on the time constant of the AC coupling circuit in the signal processing of the related art. FIG. 8 is a diagram illustrating a main part of a magneto-optical detection system of the magneto-optical disk system.

9A to 9E are diagrams illustrating the states of the ID detection signal and the MO detection signal of the magneto-optical detection system of FIG. BEST MODE FOR CARRYING OUT THE INVENTION

In short, the feature of the present invention lies in that the time constant of the AC coupling is changed in accordance with the properties of each element of the recorded data. In other words, of the recording data, AC coupling with a relatively small time constant is applied to the head of each sector of the recording data, and the transient state is converged in a short time to make it a steady state. Detection is assured. On the other hand, of the recorded data, the data part that originally has a DC component can be switched to a relatively large time constant to perform AC coupling, and the DC component of the data part can be reproduced correctly. Like You.

Hereinafter, an embodiment in which the digital signal reproducing circuit according to the present invention is applied to a reproducing system for reproducing data recorded on a magneto-optical disc will be described.

1 will be described with reference to FIGS.

[Regeneration circuit]

The magneto-optical disc system according to this embodiment generally includes a reproducing system and a recording system as shown in FIG. A light head 1a for emitting a laser beam for recording and a laser beam for reproduction to a magneto-optical disc (not shown) and a magnetic head 1b for applying a magnetic field during recording are provided. Have been. Here, first, in order to facilitate understanding of the magneto-optical disc system, the data format of the magneto-optical disc will be described with reference to FIG.

(Data format of recording medium)

Standardization work in the field of information and communication is being carried out by the TC (International Electrotechnical Commission), which is the integrated committee of the International Electrotechnical Commission (ISC). Here, optical discs are handled by SC 23 (Subcommittee).

In the current 5.25-inch magneto-optics determined here, the user data area is 30 to 60 mm, and the possible track numbers are 0 to 18750. Each track is pre-formatted so that it can be divided into 17 (1024 bytes) or 31 (512 bytes) sectors.

Fig. 2 shows an example of a 5.25-inch magneto-optical section, which is a 512-byte / sector published as ISO / IECJTC1 / SC23.14.517. It shows a sector format of 5.25 inch magneto-optical, which is a format of 102 and 24 bytes / sector. The difference between these two sector formats is the data format. It is only the length of the field followed by the buffer. These sector formats will be briefly described and then described in relation to the present invention.

The sector format shown in Fig. 2B is broadly divided into an ID section (address section), a flag section, a MO section (data section), and a buffer section. The address section is an area indicating a physical address (physical block address) on the disk, and is pre-formatted on the substrate in advance. The flag section is an area for writing a flag indicating the state of data in the sector. The data section is an area for recording data originally used by the user. The buffer area is an area for disk rotation fluctuation margin, and is provided so that data and addresses do not overlap even if a deviation occurs due to rotation jitter or the like during recording. ing.

To further explain each area, the address section (pre-format header) shown in Fig. 2A starts with the first pattern called the Sector Mark (SM) and actually rotates. VF 0 (Variable Frequency Oisci 11 a tor) that gives the rotational phase of the disk being used, AM (Address Mar) that gives the start position of the address data, and the track number as the identification signal An address information pattern composed of a combination with an ID (Idetifier) containing a sector stamper is repeated several strokes (twice in the figure) and ends with a PA (Postamble). Note that 0 frequently repeats Γ1 ”and“ 0 ”in the shortest time, so that it is guaranteed that no DC component is included. The time constant of AC coupling is changed during the period.

Here, the same identification symbol is repeatedly written on each of the two IDs. Each ID has a track number and a sector number identification code, as well as a CRC (Cyclic Redunction) to detect the error. y Check) code is also written.

The flag (ALPC / gap) shown in Fig. 2C contains FLAG indicating that writing has been performed, as well as tracking and offset detection in the bush bull method. mark test unit for level adjustment (ODF Offset De tection Flag) and laser power (ALP were: Auto laser power Con toro 1) Tochikaraku certain _β

The data section contains VF 0 (Variable Frequency Oscillator), which is a continuous data pattern for the PLL lock, and an area for writing SYNC, which is a data synchronization signal. There is a data field as an area for writing data. In the data field, in addition to the user data, when the sector to be written is defective, the alternate sector performs various processing, so-called control byte for performing defect processing, and error correction. Redundant word ECC (Error Correction Code), CRC (Cyclic Redundancy Check) code for error detection, and Resync, a special code pattern for synchronization, are written.

(Configuration of playback circuit)

Please refer to Fig. 1 again. For a magneto-optical disc (not shown) recorded according to such a sector format, a light head for emitting a laser beam for recording and a laser beam for reproduction is used. And a magnetic head 1b for applying a magnetic field during recording. As a reproducing system, a detection signal from a photodetector (not shown) that converts the return light of the laser light from the magneto-optical disk into an air signal is input to the subsequent stage of the optical head 1a. It has first and second RF amplifiers 2a and 2b.

After the first RF amplifier 2a, an AC coupling circuit 3, a sector mark detection circuit 6, a binarization circuit 4, a clock generation circuit 13, an address decoder 7, and an interpolation circuit 8 are provided after the first RF amplifier 2a. , Switching control circuit 9 and The decoder 10 is connected. Further, a servo control circuit 11 is connected after the second RF amplifier 2.

As a recording system, an encoder 15 that encodes the recording data, and a laser drive circuit 16 that drives the laser of the optical head 1a is connected to the encoder, and a magnetic drive that drives the magnetic head 1b A head drive circuit 17 and a reference frequency generation circuit 14 for generating a light clock W CLK are provided.

Further, a magneto-optical disk system according to the present embodiment is provided with a system controller 12 for controlling these various circuits. In FIG. 1, if the control lines derived from the system controller 12 to the respective circuit elements are described one by one, they are omitted because the contents of the drawing become complicated. Next, each circuit block of the magneto-optical disk system will be briefly described.

(RF amplifier)

The first RF amplifier 2a is a circuit for amplifying a data signal including a subcode in the reproduced signal from the optical head 1a, and the second RF amplifier 2b is an optical head 2b. 1 During playback signal from a, tracking error

—A circuit that amplifies signals and focus-seller signals. The tracking error signal and the force error signal from the second RF amplifier 2 are supplied to the servo control circuit 11.

(Sensor control circuit)

The servo control circuit 11 internally includes a focus servo circuit, a tracking servo circuit, a spindle servo circuit, and a motor that is a driving source of various moving mechanisms. A servo circuit for the motor that performs servo control is built in, and these various servo circuits are used to control servo control from the system controller 12 (such as servo gain) and drive, respectively. Signal and other error signals from the second RF amplifier 2b. Has become.

Based on the input of the clock pulse P c from the clock generation circuit 13, the spindle servo circuit described above rotates the spindle motor (rotating drive source of the magneto-optical disk) (not shown). This is a circuit that drives the magneto-optical disc by CLV (constant linear velocity) method or CAV (constant angular velocity).

The above-mentioned focus servo circuit is a focus error signal from the second RF amplifier 2b, specifically, a laser beam to a mirror surface formed on a magneto-optical disk. Based on a signal obtained by performing a predetermined operation in the second RF amplifier 2b on a detection signal corresponding to the amount of light reflected from the mirror surface due to light irradiation, the two-dimensional actuating device of the optical head 1 is used. This circuit adjusts the focus by driving and controlling an overnight lens (not shown) to move an objective lens (not shown) in the direction of contact and separation of the magneto-optical disk.

The above-mentioned tracking 'servo circuit is a circuit for tracking error signals from the second RF amplifier 2b, specifically, a servo error signal in a servo area formed on the magneto-optical disk. By driving and controlling the two-dimensional actuator of the optical head 1 based on a signal obtained by performing a predetermined operation in the second RF amplifier 2b on a detection signal accompanying the detection of the bobbit. This is a circuit that moves the objective lens in the radial direction of the magneto-optical disc D and adjusts its tracking network.

(AC coupling circuit)

The AC coupling circuit 3 includes a coupling capacitor C connected to the reproduction signal line derived from the first RF amplifier 2a, and a post-connection capacitor C connected between the reproduction signal line and the ground. Two resistors (first resistor R 1 and second resistor R 2) connected in parallel with each other, and one of these resistors R 1 and R 2 (second resistor in the illustrated example) And a switching circuit SW connected between the resistor R 2) and the ground. It is configured. The switching circuit SW is controlled by a window pulse Pw from a switching control circuit 9 which will be described later, and the window pulse Pw is, for example, a high level. When it is on, it is turned off when it is at a low level.

(Binarization circuit)

The binarization surface 4 is a circuit that converts the data signal input through the AC coupling circuit 3 into binary digital data by sampling and holding.

(Clock generation circuit)

The clock generation circuit 13 is a circuit that detects a clock bit component from digital data output from the binarization circuit 4 and generates a clock pulse Pc based on the detected clock bit component. In other words, if the magneto-optical disk is, for example, a disk of the Samburu servo type, the clock generating path 13 is a clock bit formed together with the servo bit in the servo area. Detect The clock bit detection signal is multiplied by, for example, a PLL circuit or the like, and generates a clock timing Pc which is a reference timing of the system.

(Address decoder)

The address decoder 7 decodes the subcode included in the digital data from the binarization circuit 4 based on the input of the clock pulse Pc from the clock generation circuit 13. This is the circuit for obtaining the address.

(Decoder)

The decoder 10 is a circuit that decodes an encoding process such as an error correction added to the digital data output from the binarization circuit 4 and outputs the decoded data D. The reproduction data D from the decoder 10 is output to the outside through the output terminal 0ut. (Sector mark detection circuit)

The sector mark detection circuit 6 is a circuit that detects a sector mark included in the reproduction signal from the AC coupling circuit 3. For example, as shown in Fig. 4, this sector mark detection method differs from the normal binarization detection method in that a read signal from a recorded sector mark (see Fig. 4A) is read. Differentiate (see Fig. 4B), hold the signal exceeding a certain level of soil E (see Fig. 4C), and, for example, pass through a flip-flop circuit (a bistable multivibrator) to select a sector mark. (Fig. 4D). Therefore, during the sector mark detection period, the AC coupling circuit 3 in the preceding stage performs AC coupling with a relatively small time constant, so that the transient state of the reproduced signal is short and the signal level rises steeply. It will be easier.

Referring again to FIG. 1, the address detected by the address decoder 7 and the sector mark detected by the sector mark detection circuit 6 are respectively obtained by the system controller 12 and the interpolation circuit in the subsequent stage. Each supplied to circuit 8,

The address and the sector mark supplied to the system controller 12 are used, for example, for controlling the scanning position of the optical head 1 during a seek operation.

(Interpolator)

The interpolator 8 detects the address and sector mark when the address decoder to be detected by the address decoder 7 is missing the sector mark to be detected by the address decoder 7. Is a circuit that interpolates Specifically, the missing address is determined by the clock pulse Pc supplied from the clock generation circuit 13 and / or the address detected by the address decoder 7. It captures sector marks. Then, from the interpolation circuit 8, the sector mark is detected based on the detection timing of the sector mark in the sector mark detection circuit 6 or the appearance timing of the sector mark when the missing sector mark is compensated. The detection pulse P sm is output.

Here, looking at the signal of the reproduced signal Sin output from the first RF amplifier 2a, as shown in FIG. 3C, the reproduced signal Sin is first a signal indicating the sector mark. The waveform SSM and then the signal waveform S VF0 indicating the VFO appear in a continuous fashion. When the signal SSM indicating the sector mark is detected by the sector mark detection circuit 6 or the signal SSM indicating the sector mark is interpolated by the interpolation circuit 8, the interpolation circuit 8 is switched to the switching control circuit 9 Outputs the sector mark detection pulse PSM to.

(Switching circuit)

The operation of the switching control circuit 9 will be described with reference to FIG. The switching control circuit 9 generates a window pulse Pw for controlling the switching circuit SW in the AC coupling circuit 3 based on the input of the sector mark detection pulse SSM from the interpolation circuit 8. Output.

More specifically, the switching control circuit 9 has a gate circuit and two counters (not shown) inside. This gate circuit is set to output a high-level signal as a window pulse PW in the initial stage. Then, in this gate circuit, the first and second counters start counting based on the input of the sector mark detection pulse PSM from the interpolation circuit 8, and the first counter performs the first predetermined operation. After the lapse of time (A), an S1 trigger pulse is issued, and the output window pulse PW of the gate circuit is set to a low level signal, and is set to a high level signal after the lapse of the second predetermined time (B). It is configured to In the first counter, an initial value A is stored based on the input of the sector mark detection pulse PSM from the interpolation circuit 8. This initial value A is a count value corresponding to the first predetermined period A during which the transient state of VF01 converges from the time of detection of the sector mark, for example, 8 bytes (96 Clock).

When a high-level signal is output as the window pulse Pw from the gate circuit, the interpolation circuit 8 detects the sector mark from the playback signal S i η in the sector mark detection circuit 6. Outputs a sector mark detection pulse PSM, which causes the first power counter to start counting, and then internally based on the input of the write clock W CLK from the reference frequency generation circuit 14. The initial value of is updated one by one. An S1 trigger pulse is generated by the first counter after a first predetermined time has elapsed (for example, after 96 clocks of 8 bytes have elapsed) and output from the gate circuit. The window pulse P w is set to a low level, and at the same time, the initial value A is reset in the first counter.

Similarly, the second counter stores an initial value B based on the input of the sector mark detection pulse PSM from the interpolation circuit 8. This initial value B is a count value corresponding to a second predetermined period B from the time of detection of the sector mark to the end of the data field.

When a high-level signal is output as the window pulse Pw from the gate circuit, the interpolation circuit 8 is activated when the sector mark detection circuit 6 detects a sector mark from the playback signal Sin. Then, a sector mark detection pulse PSM is output, whereby the second power counter starts counting, and thereafter, the light clock WCLK from the reference frequency generation circuit 14 is output. Update the internal initial value sequentially by -1 based on the input. After the second predetermined time elapses by the second counter, S 2 A trigger pulse is issued, the window pulse Pw output from the gate circuit is set to the high level, and at the same time, the initial value B is reset in the second counter.

Therefore, the signal output from the gate circuit of the switching control circuit 9 is kept at a low level from the output time of the first trigger pulse S1 to the output time of the second trigger pulse S2. The window pulse Pw is set to a high level during periods other than the above.

(Operation of AC coupling circuit)

On the other hand, the switching circuit SW in the AC coupling circuit 3 turns on when the window pulse P w output from the switching control circuit 9 is at a high level, and turns off when the window pulse P w is at a low level. From the above, when the window pulse P w is at the high level, the time constant τ _H in the AC coupling circuit 3 is determined by the value of the capacitor C and the combined resistance (the first resistance R 1 and the second resistance R 2). C ′ (R 1 · R 2 / (R 1 + R 2)), and the time constant τ _L during the low level period is the product C of the capacitor C and the first resistor R 1. · R 1

That is, the time constant τ _にお_{ける} in the high-level period is smaller than the time constant r _{L in} the low-level period.

Therefore, the time constant switching means for switching the time constant of the AC coupling circuit in the switching circuit SW of the AC coupling circuit 3, the sector mark detection circuit 6, the interpolation circuit 8, the switching control circuit 9, and the reference frequency generation circuit 14 Will be constituted.

(Operation of playback circuit)

Next, the operation of the reproducing circuit according to the above embodiment will be described mainly on the reproduced signal from the first RF amplifier 2a.

In the reproducing system, the information recorded in the sector format shown in FIG. 3 on the magneto-optical disc (not shown) is recorded on the optical head 1a and the first RF address. Read through the amplifier 2a and this playback signal is The DC component is suppressed by the C coupling circuit 3. The information mainly in the address section specified in the sector format is processed by the reproducing system sector mark detection circuit 6, clock generation circuit 13 and address decoder 7 in FIG. That is, the sector mark is detected by the sector mark detection circuit 6, and a sector mark detection signal is sent to the interpolation circuit 8. Further, the VF 0 digitized via the binarization circuit 4 is synchronized by the clock generation circuit 13 and the clock pulse P c is supplied to the addressless recorder 7 and the servo control circuit. The AM is sent to the interpolator 8 and the system controller 12 after the address is detected by the address recorder 7. On the other hand, information in the data part is sent to the decoder 10 via the binarization circuit 4. In the recording system, the write information is encoded by the encoder 15 and sent to the optical head 1 a via the laser drive circuit 16. At the same time, the system controller 12 drives the magnetic head 1 b via the magnetic head driving circuit 17.

When a sector mark is detected by the sector mark detection circuit 6 or is interpolated by the interpolation circuit 8, a sector mark detection pulse P sm is sent to the switching control circuit 9 and the switching control circuit is switched. 9 counts the light clock WCLK from the reference frequency generation circuit 14 from the input of the sector mark detection pulse Psm, and switches the switch SW of the AC circuit at a predetermined time. Generates the window pulse P w to be controlled.

When the window pulse P w is on, the time constant of the AC coupling circuit 3 is r _H (<L is the time constant), and thus, the reproduced signal waveform S s of the sector mark during these periods. The response characteristics of this device are such that the period of the transient state is short and rises sharply.

The method of detecting a sector mark is different from the usual method of detecting by binarization. Differentiating the reproduction signal, holding the signal exceeding a certain level S, and then, for example, through a flip-flop circuit Sectoroma -Detected by playing back the mark. By performing AC coupling with a relatively small time constant during the sector mark detection period, the transient state of the reproduction signal is short, the signal level rises sharply, and the sector mark can be easily detected. As a result, the probability of missing sector marks is extremely reduced, and the degree of detection of sector marks can be improved.

On the other hand, when the window fin Douparusu P w is off, the time constant of the AC coupling circuit 3 is Γ: _ (> time constant _τ Η) because it has become, the loss of the DC component舍Ma is in the reproduction signal S in Will be almost nonexistent.

It should be noted that the information recorded on the magneto-optical disk has a predetermined format as described in connection with FIG. 2, and the sector mark, Addresses are recorded in a specified order and byte length. The appearance of each element of the reproduced signal picked up by the optical head 1a is ideally represented by the clock signal from the clock generating circuit 13, the lus PC and the address decoder 7. The interpolation (interpolation), that is, the prediction, can be made in the interpolation circuit 8 by the address from. Therefore, even if no sector mark is detected, the switching control circuit 9 outputs the interpolated sector mark detection signal PSM from the interpolation circuit 8 and the light from the reference frequency generation circuit 14. On / off timing of the window pulse Pw for controlling the switching circuit SW of the AC coupling circuit 3 can be determined based on the clock WCLK.

However, in reality, such an ideal state does not continue for a long time due to uneven rotation of the magneto-optical disk. In this embodiment, a sector mark is used as a mark for the appearance of each element of the reproduction signal, and after the sector mark is detected by the sector mark detection circuit 6 or interpolated by the interpolation circuit 8, the sector mark is used. Light clock W from reference frequency generation circuit 14 with reference to detection point Judging from the CLK count value, it can be said that there is almost no error that occurs even if it is determined which element (location) in the sector format is currently picked up.

Further, once a sector mark is detected by the sector mark detection circuit 6 or a sector mark is captured by the interpolation circuit 8, even if the sector mark is not detected or interpolated from the subsequently picked-up sector. However, the data format is predetermined, and the timing at which the window pulse Pw is turned on / off is determined by the light clock from the reference frequency generation circuit 14. It can be determined by counting the number of clocks W CL K by the counter of the switching control circuit 9. Therefore, the reproducing circuit according to the present embodiment can operate even if the sector mark is not detected or interpolated in all the sectors.

As described above, when the data recorded on the magneto-optical disc is of the (1,7) -RLL type in which the recording density is improved, for example, the DC component included in the data is also effective. It will be used to reproduce (demodulate) digital signals as part of the signal components. At this time, if the DC level itself is eliminated in order to suppress the fluctuation of the DC level in an AC coupling circuit having only a constant time constant, it is possible to effectively reproduce the digital signal having the above signal. Can not

However, in the reproducing circuit according to the above embodiment, since the time constant of the AC coupling circuit 3 can be switched to r _L (> τ „), the DC component and the data included in the address of the address section are not included. It is possible to prevent the loss of the DC component contained in the data of the section, and to properly reproduce the address and data contained in the reproduction signal S in by the address decoder 7 and the decoder 10, respectively. Becomes possible.

(Deformation of AC coupling circuit) In the reproduction circuit according to the above embodiment, the AC coupling circuit 3 is composed of a capacitor, two resistors R 1 and R 2, and a switching circuit SW. Of these, the switching circuit SW was inserted and connected between one resistor (the second resistor R 2) and the ground. In addition, as shown in FIG. 5, the above two resistors R 1 and R 2 Are connected to the first and second demarcated contacts 21a and 21b, and the switching circuit SW is connected to the movable contact 21c on the ground side. The configuration may be such that the first resistance and the second resistance R 1 and R 2 are selectively switched according to the level of the current.

In this case, when the window pulse Pw is at a high level, the first fixed contact 21a and the movable contact 21c of the first resistor R1 having a low resistance value are electrically connected, When the window pulse Pw is at a low level, the second fixed contact 21b of the second resistor R2 having a high resistance value and the movable contact 21c are electrically connected.

Further, the AC coupling circuit 3 may be configured such that the time constant is small at least during the output period of the sector mark and is large during the address output period and the data output period. In addition to the configuration, various configurations can be adopted.For example, three or more resistors may be selectively switched according to the level of the window pulse Pw, or a reproduction signal may be used. A plurality of capacitors may be connected to the line in parallel, and these capacitors may be selectively switched according to the level of the window pulse Pw.

Furthermore, the AC coupling circuit is equivalent to a high-pass filter (HPF). That is, an AC coupling circuit with a small time constant is equivalent to a high-pass filter with a relatively high cut-off frequency, and an AC coupling circuit with a large time constant is equivalent to a high-pass filter with a relatively low cut-off frequency. I do. Therefore, even if the AC coupling circuit according to the present embodiment is replaced by any arbitrary high frequency filter capable of changing the cut-off frequency, the change falls within the technical scope of the present invention.

As described above, according to the digital signal reproduction circuit of the present invention, the AC coupling circuit that suppresses the fluctuation of the DC level included in the input digital signal and the time constant of the AC coupling circuit are switched at a predetermined timing. The time constant switching circuit is provided, so that the DC component to be included in the reproduced signal can be prevented from disappearing with a simple configuration, and the period of the transient state in the discontinuous portion of the data is shortened. be able to.

Claims

Claims: In a reproducing apparatus for reproducing a recording medium on which information data and synchronous data used for synchronization when reproducing the information data are sequentially recorded along a track,

Firing means for reading out the information data and the synchronization data to generate a reproduction signal;

AC coupling means for selecting one of the first time constant and the second time constant larger than the first time constant and performing AC coupling on the reproduced signal to generate a modified reproduced signal;

Detecting means for outputting a detection signal indicating a timing at which the reading means reads the synchronous data;

From the first timing determined based on the detection signal to the second timing after a predetermined time, the first time constant is selected, and the second time is used in the second timing. Control means for controlling the AC coupling means so as to select the time constant of 2,

Binarizing means for binarizing the modified reproduction signal to generate a binarized modified reproduction signal;

A demodulation means for demodulating the information signal from the binarized modified reproduction signal;

Playback device equipped with

The playback device according to claim 1, wherein the AC coupling means comprises:

A capacitor having one end connected to the output side of the reading means, a plurality of resistors having one end connected to the other end of the capacitor, and the other end of the plurality of resistors being selected by the control means Connection means that

Playback device equipped with

The reproduction device according to claim 1, wherein the information data includes a DC component.

4. The reproducing apparatus according to claim 3, wherein the information data containing the DC component is subjected to (1,7) -RLL conversion and pulse modulation.

A sector mark indicating the head of the sector, a sector having the synchronization data and the information data are sequentially recorded on the track in the recording medium,

The detection means outputs the detection signal when the reproduction signal read by the reading means is a reproduction signal from the sector mark.

The playback device according to claim 1.

In a reproducing apparatus for reproducing a recording medium on which information data and synchronous data used for synchronizing the reproduction of the information data are sequentially recorded along a track,

Reading means for reading the synchronization data and the information data to generate a reproduction signal;

First AC coupling means for generating a first modified reproduction signal by performing AC coupling on the reproduction signal with a first time constant;

Second AC coupling means for generating a second modified reproduction signal by performing AC coupling with the reproduction signal at a second time constant larger than the first time constant;

From the first timing determined based on the detection signal to the second timing after a predetermined time, the first corrected reproduction signal is selected and output, and the second time signal is output. Selecting means for selecting and outputting the second modified reproduction signal by mining; Binarizing means for binarizing the first and second modified reproduction signals to generate a binarized modified reproduction signal;

Demodulation means for demodulating the information data from the binarized modified reproduction signal;

Playback device equipped with