JPH04162257A - Digital information reading circuit for recording and reproducing device - Google Patents

Digital information reading circuit for recording and reproducing device

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Publication number
JPH04162257A
JPH04162257A JP28698290A JP28698290A JPH04162257A JP H04162257 A JPH04162257 A JP H04162257A JP 28698290 A JP28698290 A JP 28698290A JP 28698290 A JP28698290 A JP 28698290A JP H04162257 A JPH04162257 A JP H04162257A
Authority
JP
Japan
Prior art keywords
circuit
time constant
resistor
signal
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28698290A
Other languages
Japanese (ja)
Inventor
Isamu Misawa
三澤 勇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympus Corp
Original Assignee
Olympus Optical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Optical Co Ltd filed Critical Olympus Optical Co Ltd
Priority to JP28698290A priority Critical patent/JPH04162257A/en
Publication of JPH04162257A publication Critical patent/JPH04162257A/en
Pending legal-status Critical Current

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  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE:To instantaneously secure reference potential without utilizing the spontaneous discharge of a capacitor by switching the time constant of a coupled time constant circuit through a switch in accordance with a change in input signal. CONSTITUTION:A coupled time constant circuit 10 constituted by successively connecting a capacitor 2, first resistor 3, and reference potential VN in series is connected to an input terminal 1 and a series circuit composed of a change- over switch 3 and second resistor 5 is connected in parallel with the resistor 3 so that the resistor 5 can be positioned between the switch 4 and reference potential VN. The switch 4 is connected to a control terminal 8. The time constant of the circuit 10 is switched through the switch 4 in accordance with a change in input signal produced when the input signal is changed from write signals to read signals, and so forth. When the time constant is switched in such way, potential variation from the reference potential VN can be canceled and the potential VN can be secured instantaneously without utilizing the spontaneous discharge of the capacitor 2.

Description

【発明の詳細な説明】 [産業上の利用分野〕 本発明は光や磁気等を利用した記録再生装置のデジタル
情報読み取り回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital information reading circuit for a recording/reproducing device using light, magnetism, or the like.

[従来技術] この種の情報読み取り回路としては、第2図に示すもの
が一般に知られている。このような回路においては、受
光素子(図示せず)等の情報入出力部から取り出された
情報信号は入力端子9に加えられ、コンデンサ16と抵
抗器17とからなる結合時定数回路18により微分され
てタイマ回路11に入力される。このタイマ回路11で
、情報信号は、コントロール端子14によりタイミング
が制御されて増幅器12に入力され、所定のレベルまで
増幅される。そして、この増幅器12の出力は出力端子
13を介し、次段回路(図示せず)に送られる。
[Prior Art] As this type of information reading circuit, the one shown in FIG. 2 is generally known. In such a circuit, an information signal taken out from an information input/output section such as a light receiving element (not shown) is applied to an input terminal 9, and differentiated by a coupled time constant circuit 18 consisting of a capacitor 16 and a resistor 17. and input to the timer circuit 11. In this timer circuit 11, the timing of the information signal is controlled by a control terminal 14, and is input to an amplifier 12, where it is amplified to a predetermined level. The output of this amplifier 12 is sent to the next stage circuit (not shown) via the output terminal 13.

次に、このような回路の動作をさらに第3A図並びに第
3B図を参照して詳しく説明する。
Next, the operation of such a circuit will be further explained in detail with reference to FIGS. 3A and 3B.

第3A図は入力端子9に加えられるデジタル情報である
入力信号を示し、aで示す領域は読み取り信号領域を、
そしてbで示す領域は書き込み信号領域を、夫々示す。
FIG. 3A shows an input signal, which is digital information, applied to the input terminal 9, and the area indicated by a indicates the read signal area,
The areas indicated by b indicate write signal areas.

一般に書き込み信号領域すは読み取り信号領域aよりも
大きく、かつ信号のレベルも逆方向である。まず、読み
取り信号領域aの信号が順次入力端子9に加えられ、結
合時定数回路18に送られる。この信号の入力が終わる
と、書き込み信号領域すの信号が同様に結合時定数回路
18に送られる。これら信号は結合時定数回路18で微
分処理されてタイマ回路11に、ポイント15を経て入
る。この時のポイント15での出力信号の波形の推移は
第3B図に示すようになる。この図にて、C並びにdに
示す領域の出力信号は、夫々前記読み取り信号領域a並
びに書き込み信号領域すに示す入力信号に対応した信号
である。この図から明らかなように、書き込み信号領域
すから再び読み取り信号領域aに移る時、領域Cに示す
ように平均化されていた信号は領域dに示すように基準
電位VNに対して大きく変動している。これは、結合時
定数回路18内のコンデンサ16に基準電位VNよりも
高い電位か保持されるためで、記録再生装置で読み取り
時と書き込み時とでパワーが異なり、夫々の出力信号が
平均値の差として表れることに起因している。このよう
な状態で読み取り信号領域aの信号が再び入力されると
、コンデンサ16の保持電位が基準電位VNまで回復す
るために、コンデンサ16と抵抗器17とで決められる
時定数に相当した時間を必要とする。このときの回復時
間を第3B図で領域eとして示す。第3B図に示す信号
を次段のしきい値回路(図示せず)で2値化する場合、
レベルfのしきい値で判断している。このレベルfは領
域eの信号より常に低レベルとなっているので、しきい
値回路では領域eの情報、即ち回復時間に入力された信
号は欠落してしまうという問題がある。
Generally, the write signal area is larger than the read signal area a, and the signal level is also in the opposite direction. First, signals in the read signal area a are sequentially applied to the input terminal 9 and sent to the coupling time constant circuit 18. When the input of this signal is completed, the signal in the write signal area is similarly sent to the coupling time constant circuit 18. These signals are differentially processed by the combined time constant circuit 18 and enter the timer circuit 11 via point 15. The waveform transition of the output signal at point 15 at this time is as shown in FIG. 3B. In this figure, the output signals in areas C and d correspond to the input signals shown in the read signal area a and the write signal area I, respectively. As is clear from this figure, when moving from the write signal area to the read signal area a again, the signal that was averaged as shown in area C fluctuates greatly with respect to the reference potential VN as shown in area d. ing. This is because the capacitor 16 in the coupling time constant circuit 18 is held at a potential higher than the reference potential VN, and the power is different when reading and writing in the recording/reproducing device, and each output signal has an average value. This is due to the fact that it appears as a difference. When the signal of the read signal area a is inputted again in this state, it takes a time corresponding to the time constant determined by the capacitor 16 and the resistor 17 in order for the holding potential of the capacitor 16 to recover to the reference potential VN. I need. The recovery time at this time is shown as region e in FIG. 3B. When the signal shown in FIG. 3B is binarized by the next stage threshold circuit (not shown),
The judgment is made using the threshold value of level f. Since this level f is always lower than the signal in the area e, there is a problem in the threshold circuit that the information in the area e, that is, the signal input during the recovery time, is lost.

このために、従来の回路では、第2図に示すように、結
合時定数回路18の次段にタイマ回路1]と、これのコ
ントロール端子]4とが設けられている。このコントロ
ール端子]4には書き込み信号領域すの入力の終了を示
す信号か入力され、タイマ回路11により一定の待ち時
間が設定される。この待ち時間の中で結合時定数回路1
8内のコンデンサ16は自然放電を終了して基準電位V
Nて待機し、次の読み取り信号領域aの信号が入力され
るのにそなえる。
For this purpose, in the conventional circuit, as shown in FIG. 2, a timer circuit 1 and its control terminal 4 are provided at the next stage of the coupled time constant circuit 18. A signal indicating the end of the input of the write signal area is input to the control terminal 4, and a timer circuit 11 sets a certain waiting time. During this waiting time, the coupling time constant circuit 1
8, the capacitor 16 completes its natural discharge and reaches the reference potential V.
N and waits in preparation for inputting the next signal in the read signal area a.

[発明が解決しようとする課題」 上記タイマ回路11を使用した回路では、タイマ回路1
1により設定される待ち時間が、書き込み信号領域すか
ら読み取り信号領域aに移るときに、必ず必要であるた
め、この時間分アクセス時間に制限がかかり、動作速度
が遅くなる。また、結合時定数回路18内のコンデンサ
16に保持される電位は、コンデンサの自然放電の形で
行われるので、放電時間は必ずしも一定とはならない。
[Problem to be solved by the invention] In the circuit using the timer circuit 11 described above, the timer circuit 1
Since the waiting time set by 1 is always required when moving from the write signal area to the read signal area a, the access time is limited by this time and the operation speed becomes slow. Furthermore, since the potential held in the capacitor 16 in the coupled time constant circuit 18 occurs in the form of natural discharge of the capacitor, the discharge time is not necessarily constant.

このため、放電時間が回復時間よりも長くなるこもあり
、この場合には、超過時間での入力信号の欠落が生じる
。勿論、この入力信号の欠落を防止するためには、回復
時間を長く設定すれば良いが、これではより動作時間が
遅くなるという問題が生しる。
Therefore, the discharge time may be longer than the recovery time, and in this case, the input signal is lost during the excess time. Of course, in order to prevent this loss of input signals, the recovery time may be set longer, but this poses a problem in that the operation time becomes slower.

従って、本発明の目的は書き込み信号領域から読み取り
信号領域への移行時に、入力信号の欠落が生じず、しか
も高速動作の可能な記録再生装置のデジタル情報読み取
り回路を提供することである。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a digital information reading circuit for a recording/reproducing apparatus that does not cause input signal dropout when transitioning from a write signal area to a read signal area and is capable of high-speed operation.

[課題を解決するための手段」 本発明に係わる記録再生装置のデジタル情報読み取り回
路は、コンデンサと第1の抵抗器とを含み、入力情報を
微分する結合時定数回路と、この第1の抵抗器に並列に
接続され、スイッチと第2の抵抗器とからなる直列回路
と、前記結合時定数回路への入力情報の変化に応して前
記スイッチの導通と非導通とを選択的に果たし、前記結
合時定数回路の時定数を切り替える手段とを具備するこ
とを特徴とする。
[Means for Solving the Problems] A digital information reading circuit of a recording/reproducing device according to the present invention includes a capacitor and a first resistor, a coupling time constant circuit for differentiating input information, and the first resistor. a series circuit including a switch and a second resistor, which is connected in parallel to the resistor, and selectively makes the switch conductive or non-conductive in response to a change in input information to the coupled time constant circuit; The method is characterized by comprising means for switching the time constant of the coupled time constant circuit.

〔作用] 上記読み取り回路においては、書き込み信号から読み取
り信号に移行するなどの入力信号の変化に応して、スイ
ッチを介して結合時定数回路の時定数を切り替えるよう
にしている。このように時定数を切り替えることにより
、コンデンサの自然放電を利用しないで、基準電位から
の変動分をキャンセルでき、瞬時に基準電位が確保てき
る。
[Operation] In the reading circuit, the time constant of the coupling time constant circuit is switched via a switch in response to a change in the input signal, such as transition from a write signal to a read signal. By switching the time constant in this manner, fluctuations from the reference potential can be canceled without using the natural discharge of the capacitor, and the reference potential can be instantly secured.

[実施例コ 以下に、添付図面を参照して、本発明の一実施例に係わ
る記録再生装置のデジタル情報読み取り回路を説明する
[Embodiment] A digital information reading circuit of a recording/reproducing apparatus according to an embodiment of the present invention will be described below with reference to the accompanying drawings.

実施例の回路を示す第1図において、符号]は、情報記
録媒体からの光情報を電気信号情報に変換する受光素子
(図示せず)の出力側に接続された入力端子を示す。こ
の入力端子lには、コンデンサ2と第1の抵抗器3と、
基準電位VNとが直列に順次接続されてなる結合時定数
回路10が接続されている。この第1の抵抗器3には、
切替スイッチ4と第2の抵抗器5とからなる直列回路か
、この第2の抵抗器5かスイッチ4と基準電位VNとの
間に位置するようにして、並列に接続されている。前記
第1の抵抗器3の抵抗値Rと第2の抵抗器5の抵抗値r
とは後述するようにR)  rとなるように設定されて
いる。また、前記スイッチ4は、コントロール端子8に
接続され、この端子からの信号により導通と非導通の制
御か行われる。前記結合時定数回路10の出力側は、こ
の回路]0からの出力信号を一定のレベルまで増幅する
増幅器6の入力側に接続されている。そして、この増幅
器6の出力側は、出力端子7を介して、これからの信号
を2値化するしきい値回路(図示せず)に接続されてい
る。
In FIG. 1 showing the circuit of the embodiment, the symbol ] indicates an input terminal connected to the output side of a light receiving element (not shown) that converts optical information from an information recording medium into electrical signal information. This input terminal l has a capacitor 2 and a first resistor 3,
A coupling time constant circuit 10 in which a reference potential VN is successively connected in series is connected. This first resistor 3 has
Either a series circuit consisting of the changeover switch 4 and the second resistor 5, or the second resistor 5 is connected in parallel so as to be located between the switch 4 and the reference potential VN. The resistance value R of the first resistor 3 and the resistance value r of the second resistor 5
is set to be R) r as described later. Further, the switch 4 is connected to a control terminal 8, and conduction and non-conduction are controlled by a signal from this terminal. The output side of the coupled time constant circuit 10 is connected to the input side of an amplifier 6 which amplifies the output signal from this circuit 0 to a certain level. The output side of the amplifier 6 is connected via an output terminal 7 to a threshold circuit (not shown) that binarizes the signal.

上記構成の読み取り回路の動作を以下に説明する。The operation of the reading circuit having the above configuration will be explained below.

スイッチ4が開成された状態で、従来例と同様に、第3
A図の読み取り領域a並びに書き込み領域すに示すよう
な波形のデジタル信号が受光素子より順次入力端子1に
供給される。これら信号は結合時定数回路10で、従来
例と同様に微分処理され第3C図の領域g並びにhに示
すような波形で出力される。書き込み領域すの信号の処
理の終了時には、コンデンサ2は基準電位VNに比べて
高い電位を保持している。この時、図示しない手段によ
り、書き込み領域すの信号の入力が終了したことか検知
され、この手段よりコントロール端子8を介して、検出
信号Kがスイッチ4に伝えられ、このスイッチ4を閉成
して導通状態にする。
With the switch 4 open, the third
Digital signals having waveforms as shown in the reading area a and the writing area s in Figure A are sequentially supplied to the input terminal 1 from the light receiving element. These signals are subjected to differential processing in the coupled time constant circuit 10 in the same manner as in the conventional example, and are output in waveforms as shown in regions g and h in FIG. 3C. At the end of the processing of the write area signal, the capacitor 2 holds a potential higher than the reference potential VN. At this time, a means (not shown) detects whether the input of the signal to the write area has ended, and this means transmits the detection signal K to the switch 4 via the control terminal 8, closing the switch 4. to make it conductive.

二の結果、コンデンサ2と基準電位VNとの間の抵抗値
が、第1の抵抗器3の抵抗値Rと、第2の抵抗器5の抵
抗値「との並列合成抵抗値となる。
As a result of (2), the resistance value between the capacitor 2 and the reference potential VN becomes a parallel composite resistance value of the resistance value R of the first resistor 3 and the resistance value of the second resistor 5.

前述したように両抵抗値R,rはR)rとなるように設
定されているので、並列合成抵抗値は第1の抵抗器3の
抵抗値Rに比べて著しいく低くなる。
As described above, since both resistance values R and r are set to be R)r, the parallel combined resistance value is significantly lower than the resistance value R of the first resistor 3.

このため、コンデンサ2の高電位に保たれてる電位は速
やかに基準電位VNまで、第3C図に示すように下がる
。このような状態で再度読み込み領域aに入力が移って
も、その出力信号は領域1で示すように安定したレベル
となる。このため、次段のしきい値回路で、しきい値電
圧Jを考慮しても、正確に2値化される。
Therefore, the high potential of the capacitor 2 quickly drops to the reference potential VN as shown in FIG. 3C. Even if the input is shifted to the reading area a again in this state, the output signal will be at a stable level as shown in area 1. Therefore, even if the threshold voltage J is taken into consideration in the threshold circuit at the next stage, the data can be binarized accurately.

上記構成のデジタル情報読ろ取り回路においては、書き
込み領域すから読み取り領域aに移るときに、検出信号
Kによりスイッチ4が閉成される。この結果、結合時定
数生成回路10の抵抗値は2つの抵抗器3.5の並列合
成抵抗値となって著しく低くなり、コンデンサ2の電位
は基準電位まで低下する。この低下するまでの回復時間
は、コンデンサの自然放電をまったく利用していないの
で極めて短く、はとんど瞬間的になる。このため、アク
セス時間がこの回復時間にほとんど影響されず、高速動
作が可能となる。また、このように回復時間が短いので
、次ぎに入力される読み取り領域の信号の脱落の恐れが
ない。
In the digital information reading circuit configured as described above, the switch 4 is closed by the detection signal K when moving from the write area to the read area a. As a result, the resistance value of the coupled time constant generating circuit 10 becomes the parallel combined resistance value of the two resistors 3.5, and becomes extremely low, and the potential of the capacitor 2 drops to the reference potential. The recovery time until this drop is extremely short and almost instantaneous since the natural discharge of the capacitor is not utilized at all. Therefore, access time is hardly affected by this recovery time, and high-speed operation is possible. Furthermore, since the recovery time is short, there is no fear that the next input signal in the reading area will be dropped.

[効果] 本発明に係わる記録再生装置のデジタル情報読み取り回
路は、入力信号の変化に応じて、スイッチを介して結合
時定数回路の時定数を切り替えるようにしている。この
ように時定数を切り替えることにより、コンデンサの自
然放電を利用しないで、瞬時に基準電位が確保できる。
[Effects] The digital information reading circuit of the recording/reproducing apparatus according to the present invention switches the time constant of the coupling time constant circuit via a switch in response to changes in the input signal. By switching the time constant in this way, the reference potential can be instantaneously secured without using the natural discharge of the capacitor.

誤動作が無くて、高速動作が可能となる。There is no malfunction and high-speed operation is possible.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係わる記録再生装置のデジ
タル情報読み取り回路を示す回路図、第2図は従来のデ
ジタル情報読み取り装置を示す回路図、第3A図は入力
端子へ供給される情報信号の波形を示す図、第3B図は
従来の読み取り回路での結合時定数回路からの出力信号
の波形を示す図、そして第3C図は本実施例の読み取り
回路での結合時定数回路からの出力信号の波形を示す図
である。 1・・・入力端子、2・・・コンデンサ、3・・・第1
の抵抗器、4・・・スイッチ、5・・・第2の抵抗器、
10・・・結合時定数回路。 出願人代理人 弁理士 坪井  淳 第1図 第2図
Fig. 1 is a circuit diagram showing a digital information reading circuit of a recording/reproducing device according to an embodiment of the present invention, Fig. 2 is a circuit diagram showing a conventional digital information reading device, and Fig. 3A is a circuit diagram showing a digital information reading circuit of a recording/reproducing device according to an embodiment of the present invention. FIG. 3B is a diagram showing the waveform of the information signal, FIG. 3B is a diagram showing the waveform of the output signal from the coupling time constant circuit in the conventional reading circuit, and FIG. 3C is a diagram showing the waveform of the output signal from the coupling time constant circuit in the reading circuit of this embodiment. FIG. 2 is a diagram showing the waveform of an output signal. 1...Input terminal, 2...Capacitor, 3...First
resistor, 4... switch, 5... second resistor,
10... Combined time constant circuit. Applicant's agent Patent attorney Atsushi Tsuboi Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims]  コンデンサと第1の抵抗器とを含み、入力情報を微分
する結合時定数回路と、この第1の抵抗器に並列に接続
され、スイッチと第2の抵抗器とからなる直列回路と、
前記結合時定数回路への入力情報の変化に応じて前記ス
イッチの導通と非導通とを選択的に果たし、前記結合時
定数回路の時定数を切り替える手段とを具備する記録再
生装置のデジタル情報読み取り回路。
a coupled time constant circuit that includes a capacitor and a first resistor and differentiates input information; a series circuit that is connected in parallel to the first resistor and includes a switch and a second resistor;
Digital information reading of a recording/reproducing apparatus, comprising: means for selectively making the switch conductive or non-conducting in accordance with a change in input information to the coupling time constant circuit, and switching the time constant of the coupling time constant circuit. circuit.
JP28698290A 1990-10-26 1990-10-26 Digital information reading circuit for recording and reproducing device Pending JPH04162257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28698290A JPH04162257A (en) 1990-10-26 1990-10-26 Digital information reading circuit for recording and reproducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28698290A JPH04162257A (en) 1990-10-26 1990-10-26 Digital information reading circuit for recording and reproducing device

Publications (1)

Publication Number Publication Date
JPH04162257A true JPH04162257A (en) 1992-06-05

Family

ID=17711487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28698290A Pending JPH04162257A (en) 1990-10-26 1990-10-26 Digital information reading circuit for recording and reproducing device

Country Status (1)

Country Link
JP (1) JPH04162257A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997023874A1 (en) * 1995-09-21 1997-07-03 Sony Corporation Reproducing circuit
US5864531A (en) * 1996-09-24 1999-01-26 Sony Corporation DC level fluctuation correction by selecting a time constant coupled to a reproduced signal

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997023874A1 (en) * 1995-09-21 1997-07-03 Sony Corporation Reproducing circuit
KR100488636B1 (en) * 1995-09-21 2005-09-30 소니 가부시끼 가이샤 Playback device
US5864531A (en) * 1996-09-24 1999-01-26 Sony Corporation DC level fluctuation correction by selecting a time constant coupled to a reproduced signal

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