KR100801037B1 - Information Recording Method, Information Recording Apparatus and Information Recording Media - Google Patents

Abstract

The present invention relates to an information recording method, an information recording apparatus, and an information recording medium for increasing the recording density of an optical recording medium.

In the information recording method according to the present invention, a synchronization signal for dividing a track into first unit sections having a predetermined size and address information indicating the first unit sections in the form of time information are modulated on the basis of a predetermined carrier signal and thus the first unit. The carrier signal is detected from the preformatted optical recording medium for each section, and the address information is restored based on the detected carrier. The reconstructed address information is converted into a linear code, and the converted linear code is counted as a clock signal that varies depending on the size of a second unit section having a different size from the first unit section. In this way, logical address information indicating the second unit section is generated, and a recording clock variable according to the recording density of the second unit section is generated together.

Description

Information recording method, information recording apparatus and information recording medium {Information Recording Method, Information Recording Apparatus and Information Recording Media}

1 illustrates an ATIP frame recorded as a wobble signal on an optical recording medium.

2 is a block diagram showing a conventional ATIP information preformatting device.

Fig. 3 is a block diagram showing a conventional recordable CD recording / playback apparatus.

4 is a block diagram showing in detail the ATIP decoder shown in FIG.

5 is an input / output waveform diagram of a recording processing unit in the CD recording / playback apparatus shown in FIG.

6 is a flowchart showing step by step a control procedure of the information recording method according to the embodiment of the present invention;

Fig. 7 is a block diagram showing an information recording / reproducing apparatus according to the embodiment of the present invention.

8 is a block diagram illustrating in detail the ATIP decoder shown in FIG.

FIG. 9 is a block diagram showing details of the latch unit shown in FIG. 8; FIG.

10 is an input / output waveform diagram of a recording processing unit in the information recording / reproducing apparatus shown in FIG. 3;

<Description of Symbols for Main Parts of Drawings>

1,121: Optical pickup 2,122: RF signal processor

3,123: demodulation / subcode detection unit 4,124: CIRC decoder

5,125: laser power controller 6,126: demodulation / sub code insertion

7,127: CIRC encoder 8,128: wobble signal detector

9,129: ATIP decoder 10,130: Micom

11,131: BPF 12,132: Slicer

13,133: Phase Comparator & LPF 14,134: VCO

17,137: frequency demodulator 18,138: synchronization signal detector

19,139: dual phase demodulator 20: decoder

24: AND gate 25, 27, 29: multiplier

26,28: adder 30: counter

31,42,43: divider 32: latch part

41,44: Latch 111: Clock generator

114: dual phase modulator 117: frequency modulator

15,16,21,22,23,112,113,135,136,141,142: divider

140: Decoder & Latch

TECHNICAL FIELD The present invention relates to a technique for recording information on a recording medium, and more particularly, to an information recording method, an information recording apparatus, and an information recording medium for increasing the recording density of an optical recording medium.

In general, an optical recording medium is irradiated with a laser beam to record or reproduce information. Such optical recording media are roughly divided into discs for reproduction and recordable discs.

On a compact disk (hereinafter referred to as "CD"), recording data is recorded as an EFM (Eight to Fourteen Modulation) frame (Frome) in units of 588 channel bits. One block including 98 EFM frames forms a sub-code frame that is an addressable basic unit. This subcode frame is the minimum unit of time information and contains 2352 bytes of main channel data. The CD recording / reproducing apparatus randomly accesses information based on a time code (Q-code) included in a subcode frame.

CD-R and CD-RW recordable optical recording media are wobbled grooves in which user information is recorded as pits 103 corresponding to binary information in a wobble-shaped groove track 100 as shown in FIG. track 100 is formed. A wobbled land track 101 is formed between wobbled groove tracks. On both sides of the wobbled groove track 100, a wobble signal is preformatted at a predetermined period. The wobble signal reproduced in response to the wobble signal is used as a reference signal for controlling the rotational speed of the spindle motor and generating a recording channel clock. . Also, ATIP (Absolute Time In Pre-groove) information for enabling physical addressing is recorded using a carrier signal preformatted on both sides of the wobbled groove track 100 as a carrier. The basic unit of the recorded ATIP information is called an ATIP frame, and one ATIP frame corresponds to a 294 wobble period of the wobble signal recorded on both sides of the wobbled groove track 100. In the ATIP frame, the frame synchronization signal Synch is recorded at the start of the frame, followed by the CRC (cyclic redundancy check) code, which is identification information (ID) and error correction code (ECC), following the frame synchronization signal Synch. Is recorded. The frame sync signal Synch is recorded from the start of the frame to 28 wobble periods among ATIP frames of 294 wobble periods, and the identification code ID and the error correction code are recorded in the remaining wobble periods. The identification code ID is a time code divided into minutes (MM): seconds (SS): frames (FF), and is time information of a subcode frame. When recording user data, subcode frames are recorded in a 1: 1 correspondence to preformatted ATIP frames. One subcode frame includes 588 × 98 channel bits. In order to sample recording data during recording, a subcode frame requires a recording channel clock corresponding to 196 times the wobble period 294 of the ATIP frame.

2 shows a conventional ATIP information preformatting device.

Referring to FIG. 2, the conventional ATIP information preformatting apparatus includes a seven divider 112 and a two divider 113 and a two divider 113 to which a clock signal of 44.1 kHz is commonly input from the clock generator 111. Frequency modulator 115 to which the carrier signal fc from &lt; RTI ID = 0.0 &gt;) &lt; / RTI &gt; is input, and a bi-phase modulator 114 to which the channel bit stream PCHB is input from the input line 116. Here, the channel bit stream PCHB is generated by ATIP information being channel coded, and includes an ATIP frame synchronization signal Synch, an identification code ID, and an error correction code. The ATIP identification code section contains address information indicating the physical position of the optical disk and other disk management information. The seventh divider 112 divides the clock signal of 44.1 KHz from the clock generator 111 into seven to generate a double phase clock PCLK of 6.3 KHz. The divider 113 divides the clock signal of 44.1 KHz from the clock generator 14 into two to generate a carrier signal fc of 22.05 KHz. The dual phase modulator 117 modulates the channel bit stream PCHB from the input line 116 by the dual phase clock PCLK to generate the dual phase signal DPS. The dual phase signal DPS is frequency modulated by the frequency modulator 115 and then output via the output line 117. The wobble signal preformatted on the optical disc is FM-modulated at a center frequency of 22.05 kHz at ± 1 kHz.

3 shows a conventional recordable CD recording / playback apparatus.

Referring to FIG. 3, a reproduction processing unit of a conventional recordable CD recording / reproducing apparatus is an RF signal processing unit 122, a demodulation / subcode detection unit 123, and a cross-interleaved cross connected to an output terminal of the optical pickup 121. Reed-Solomon) decoder 124 is provided. The RF signal processor 122 processes the push-pull signal output from the optical pickup 121 to generate a high frequency signal. The demodulation / sub code detection unit 123 amplifies and waveform equalizes the high frequency signal from the RF signal processing unit 122, demodulates it, and separates sub codes to generate reproduction data. The CIRC decoder 124 corrects the error of the playback data for each EFM frame and corrects the error of the playback data for every 108 EFM frames using an error correction code distributed and distributed over the 108 EFM frames.

In addition, the recording processing unit of the conventional recordable CD recording / reproducing apparatus is serially connected to the wobble signal detector 128 and the ATIP decoder 129 connected in series to the output terminal of the optical pickup 121, and to the input terminal of the optical pickup 121. The laser power controller 125, the modulation / subcode insertion section 126, and the CIRC encoder 127 are connected. The wobble signal detection unit 128 includes a band pass filter (BPF) as shown in FIG. 4 to band-pass the push-pull signal output from the optical pickup 121 to a carrier signal band of 22.05 kHz to detect the wobble signal. do.

The ATIP decoder 129 restores ATIP information, which is a physical address, by using the wobble signal from the wobble signal detector 128. The ATIP decoder 129 is divided into minutes: seconds: identification code (ID) which is the time information of the frame, identification code error identification signal (ID-OK) indicating whether an error of the identification code (ID), ATIP frame synchronization signal (Synch) Upon detection, a flag signal ID-flag is generated. The ATIP decoder 129 also generates a recording channel clock (Wrt-Clk) for sampling the recording data. To this end, the ATIP decoder 129 is connected to the slicer 132 to which the wobble signal is input and to an output terminal of the slicer 132 to generate a recording channel clock Wrt-CLK. &Quot; PLL ", a frequency demodulator 137 for frequency demodulating the output signal of slicer 132, and a dual phase channel demodulator 139 for restoring the output signal of frequency demodulator 137 to dual phase channel data. ), A decoder & latch 140 for decoding the identification code ID from the dual phase channel data, and a synchronization signal detection unit 138 for detecting the frame synchronization signal Synch from the output signal of the frequency demodulator 137. It is provided. The slicer 132 generates a square wave signal by slicing the wobble signal input from the BPF 131 to a predetermined slice level. The PLL is connected to the phase comparator & low pass filter (hereinafter referred to as " LPF ") 133 connected to the output terminal of the slicer 132, and the phase comparator & LPF 133 to form a closed loop. Voltage Control Oscillator (hereinafter referred to as "VCO") 134, 98 divider 135 and 2 divider (136). The phase comparator 133 compares the phase of the square wave signal output from the slicer 132 with the phase of the output signal of the divider 136 and generates a voltage signal corresponding to the phase difference. The VCO 134 varies the frequency of the oscillation frequency according to the control voltage input from the phase comparator 133 to generate the recording channel clock Wrt-CLK. Here, the recording channel clock Wrt-CLK maintains 4.3218 MHz in which the carrier signal (fc = 22.05 kHz) of the wobble signal is multiplied by 196 times. The 98 divider 135 divides the recording channel clock Wrt-CLK by 98 to lower the frequency of the recording channel clock Wrt-CLK to 44.1 kHz. The output signal of the 98 divider 135 is divided by 2 by the 2 divider 136 and input to the phase comparator & LPF 133 at a frequency of 22.05 kHz, and is also divided by the 7 divider 141 and 6.3 kHz. The dual phase clock PCLK is restored. The frequency demodulator 137 demodulates the ATIP information by sampling the square wave signal output from the slicer 132 according to the recording channel clock Wrt-CLK. The synchronization signal detector 138 detects the frame synchronization signal Synch from the output signal of the frequency demodulator 137. The frame sync signal Synch detected by the sync signal detector 138 is input to the decoder & latch 140 and also to the microcomputer 130 as a flag signal (ID flag) indicating the start of the ATIP frame. The dual phase demodulator 139 demodulates the dual phase signal by the double phase clock PCLK input from the seventh divider 141 and supplies the demodulated phase signal to the decoder & latch 140. The decoder & latch 140 identifies an ID code in a channel bit stream input from the dual phase demodulator 139 by the data channel clock DCLK and the frame synchronization signal Synch in which the double phase clock PCLK is divided into two. ), And error correction for the identification code using the error correction code (CRC). The identification code ID detected from the decoder & latch 140 and a flag signal ID flag indicating whether the error is corrected are input to the microcomputer 130.

The microcomputer 130 generates a recording start signal Wrt-on in synchronization with the flag signal ID-Flag from the ATIP decoder 129, and generates a subcode using the identification code ID. The CIRC encoder 127 serves to insert an error correction code into the recording data. The modulation / subcode inserting unit 126 modulates the recording data input from the CIRC encoder 127 into the EFM code while sampling the recording data with the recording channel clock Wrt-Clk. It will be inserted into the frame. The laser power controller 125 intercepts the laser diode of the optical pickup 121 according to the recording channel signal from the modulation / subcode insertion unit 126.

At the time of recording, the microcomputer 130 records the recording start position of the ATIP frame pre-formatted on the optical disc from the identification code (ID) expressed in minutes: seconds: frame time information as shown in FIG. 5 (MM: SS: FF (start)). ) Is detected and a recording start signal (Wrt-on) is generated. In response to the recording start signal Wrt-on, the modulation / subcode insertion section 126 generates a recording channel signal in synchronization with the frame synchronization signal at which the ATIP frame starts, that is, the flag signal ID-flag. When the recording end position (MM: SS: FF (end)) is detected, the microcomputer 130 turns off the recording start signal Wrt-on. The modulation / subcode insertion section 126 then terminates generation of the recording channel signal in synchronization with the flag signal ID-flag.

As described above, in the recordable optical recording medium such as CD-R or CD-RW, a subcode frame including user information is recorded in a 1: 1 correspondence to an ATIP frame preformatted on the optical disc. Thus, the physical length of one subcode frame is equal to that of one ATIP frame. Main channel data, which is user information, is recorded by 2352 bytes per 1 ATIP frame.

In recent years, optical recording media have tended to increase recording density due to the development of blue lasers and the high aperture size of objective lenses. However, since the information to be recorded must be recorded in correspondence with the physical length of the preformatted ATIP frame on the optical disc for each unit subcode frame, it is difficult to increase the recording density in the current recording method. On the other hand, according to the information recording method and apparatus disclosed in Korean Patent No. 0253805, a method of changing the length of a unit recording section by generating a logical address different from the preformatted physical address on the optical disc has been proposed. However, the proposed recording method has a disadvantage in that the recording channel clock, which must be changed according to the variable length of the unit recording section, may not be provided correctly.

It is therefore an object of the present invention to provide an information recording method, an information recording apparatus, and an information recording medium for increasing the recording density.

Another object of the present invention is to provide an information recording method, an information recording apparatus, and an information recording medium which effectively provide a logical address that varies with the recording density change of a unit recording section.

It is another object of the present invention to provide a recording channel clock that can be adaptively changed in a variable unit recording period.

In order to achieve the above object, in the information recording method according to the present invention, first address information is recorded in a preformatted form in a wobble groove track, and the first address information is a recording medium defining a plurality of first unit sections. CLAIMS 1. A method of recording data in a computer, the method comprising: a) detecting a wobble signal from a wobble groove track of a recording medium; b) restoring the first address information based on the detected wobble signal; c) allocating a plurality of second unit sections different from the first unit section on a recording medium, and generating second address information defining the second unit section; d) generating a recording clock according to the second unit interval; e) recording information on the recording medium to correspond to a second unit interval in synchronization with the recording clock.

The amount of user information allocated to the second unit section is equal to the amount of user information allocated to the first unit section.

The second unit section is set smaller than the first unit section.

The recording density corresponding to the second recording section is set to m / R when m and R are integers of 0 or more.

The number of clocks of the recording clock corresponding to the second recording section is set to an integer multiple of the wobble signal preformatted on the recording medium.

The clock number of the recording clock corresponding to the second recording section is set to 2n × m when n is an integer of 0 or more.

When n and R are set to 2 and 49, respectively, m is set to an integer of 49 or more according to the recording density of the second recording section; When n and R are set to 14 and 7, respectively, m is set to an integer of 7 or more according to the recording density of the second recording section.

Converting the address information restored in step b) into a linear code; The second address of step c) is generated based on the converted linear code.

In the information recording medium according to the present invention, information is recorded by the above method.

In the information recording apparatus according to the present invention, a) first address information is recorded in a pre-formatted form on a wobble groove track, and the first address information is a wobble groove track of a recording medium defining a plurality of first unit sections. Wobble detection means for detecting a wobble signal from the signal; b) decoding means for restoring said address information based on said detected wobble signal; c) address generating means for generating second address information indicating a second unit section having a different size from the first unit section; d) recording clock generating means for generating a recording clock corresponding to the recording density of the second unit section; e) information recording means for recording information on the recording medium in correspondence with the second unit section in synchronization with the recording clock.

The amount of user information allocated to the second unit section is equal to the amount of user information allocated to the first unit section.

The second unit section is set smaller than the first unit section.

The recording density corresponding to the second recording section is set to m / R when m and R are integers of 0 or more.

The clock number of the recording clock corresponding to the second recording section is set to 2n × m when n is an integer of 0 or more.

The address generating means further includes time code converting means for converting a linear code indicating the second unit section into a time code.

And linear code converting means for converting the address information restored by the decode means into a linear code, wherein the address generating means generates second address information based on the linear code.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

6 is a flowchart showing step by step an information recording method according to an embodiment of the present invention.

As described above, the optical recording medium is preformatted with ATIP information expressed by time information. The carrier signal fc of the pre-formatted ATIP information is detected on the optical recording medium (step S1). The detected carrier signal fc is frequency demodulated and double-phase demodulated to restore ATIP information (S2). Step) The demodulated ATIP information includes a synchronization signal Synch, an identification code ID, and an error correction code in units of predetermined frames (data sectors). In the demodulation step of the ATIP information, the identification code goes through an error correction process.

In steps S3 and S4, a recording clock (CWrt-CLK) is generated in accordance with the recording density of the current sub-code frame to be recorded. Further, the identification code (ID) of the demodulated ATIP information is converted into a linear code, and the length of the converted linear code is adjusted by the recording density adjustment ratio m / R (m, R is an integer of 0 or more). The linear code is converted back into a time code to generate a logical address signal (LID) having a length different from that of the ATIP frame (step S5). Finally, the write data is recorded on the optical recording medium in accordance with the logical address signal (LID). The recording data is recorded at a length different from the physical address length preformatted on the optical recording medium by writing to the optical recording medium.

7 shows an information recording apparatus according to an embodiment of the present invention.

Referring to FIG. 7, the information recording apparatus according to the present invention is connected in series with an input terminal of the optical pickup 1 and a wobble signal detector 8 and an ATIP decoder 9 connected in series with an output terminal of the optical pickup 1; Laser power controller 5, modulation / subcode inserting section 6 and CIRC encoder 7. The wobble signal detection unit 8 includes a band pass filter 11 as shown in FIG. 8 and band-passes the push-pull signal output from the optical pickup 1 in a carrier signal band of 22.05 kHz to detect the wobble signal.

The ATIP decoder 9 restores ATIP information, which is a physical address, by using the wobble signal from the wobble signal detection unit 8. Further, the ATIP decoder 9 generates a recording channel clock CWrt-CLK suitable for a preset recording density. The identification code (ID) of the generated and reconstructed ATIP information is converted into a linear code, the linear code length is adjusted according to the adjustment ratio m / R of the recording density, and then converted into a time code. The generated identification code (LID) is input to the microcomputer 10. In addition, the ATIP decoder 9 performs error correction of the identification code (LID) so that an error discrimination signal (LID-OK) indicating whether the identification code (LID) is an error and a flag signal indicating a start position of the identification code (LID) Generate (LID-flag). Further, the ATIP decoder 9 generates a recording channel clock (CWrt-CLK) whose frequency is adaptively changed according to the recording density so that the same amount of recording data can be included in each subcode frame.

To this end, the ATIP decoder 9 has a slicer 12 to which a wobble signal is input, a PLL connected to an output terminal of the slicer 12 to generate a recording channel clock CWrt-CLK, and an output of the slicer 12. A frequency demodulator 17 for frequency demodulating the signal, a dual phase channel demodulator 19 for restoring the output signal of the frequency demodulator 17 to the dual phase channel data, and an identification code (CID) from the dual phase channel data. A decoder & latch 20 for decoding and a sync signal detector 18 for detecting the frame sync signal Synch from the output signal of the frequency demodulator 17 are provided. The slicer 12 generates a square wave signal by slicing the wobble signal input from the BPF 11 to a predetermined slice level. The PLL comprises a phase comparator & LPF 13 connected to the output terminal of the slicer 12, a VCO 14 connected to the phase comparator & LPF 13 to form a closed loop, a nm divider 15, and It consists of two dividers 16. The phase comparator 13 compares the phase of the square wave signal output from the slicer 12 with the phase of the output signal of the two divider 16 and generates a voltage signal corresponding to the phase difference. The VCO 14 generates a recording channel clock CWrt-CLK by varying the oscillation frequency according to the control voltage input from the phase comparator 13. The number of clocks of the recording channel clocks CWrt-CLK per frame is defined as 2n × m (where n is an integer of 0 or more) and is determined by an integer multiple of the wobble signal. Here, n may be set to 2 or 14, and when n and R are set to 2 and 49, respectively, m may be 49, 50, 51, 52, 53, 54, 55, depending on the recording density of the currently recorded frame. Can be set to. Further, when n and R are set to 14 and 7, respectively, m may be set to 7, 8, 9, 10, 11, 12, 13,... According to the recording density of the currently recorded frame.

The nm divider 15 divides the recording channel clock (CWrt-CLK) into n * m to convert the frequency into 44.1 (2 * fc) kHz. The output signal of the nm divider 15 is divided into two by two dividers 16 and input to the phase comparator & LPF 13 at a frequency of 22.05 kHz, and seven divided by the seven dividers 21 to 6.3 kHz. The dual phase clock PCLK is restored. The frequency demodulator 17 demodulates the ATIP information by sampling the square wave signal output from the slicer 12 in accordance with the recording channel clock Wrt-CLK. The synchronization signal detector 18 detects the frame synchronization signal Synch from the ATIP information from the frequency demodulator 17. The frame synchronization signal Synch detected by the synchronization signal detection unit 18 is input to the decoder 20. The dual phase demodulator 19 demodulates the dual phase signal by the double phase clock PCLK input from the seven divider 21 and supplies it to the decoder 20. The decoder 20 recovers the identification code ID from the channel bit stream input from the dual phase demodulator 19 by the data channel clock DCLK and the frame synchronization signal Synch in which the double phase clock PCLK is divided into two. In addition, the error correction code (CRC) is used to perform error correction on the identification code. In addition, the decoder 20 generates a CRC flag signal (CRC Flag) indicating an error occurrence position.

In addition, the ATIP decoder 9 converts the AND gate 24 to which the CRC flag signal and the frame synchronization signal Synch are input and the identification code ID output from the decoder 20 to a linear code. The length of the identification signal ID linearly coded according to the first multiplier 25, the first adder 26, the second multiplier 27 and the second adder 28, and the set recording density adjustment ratio m / R. And a third multiplier 29, a counter 30, and an R divider 31 for adjusting the voltage. The first multiplier 25 multiplies the divided information of the identification code ID output from the decoder 20 by 60, and the first adder 26 multiplies the 60 to convert the divided information into second information and the decoder ( 20 seconds is added. The second multiplier 27 multiplies the output signal of the first adder 26 by 75 to convert the frame size. The second adder 28 adds the output signal of the second multiplier 27 and the frame information from the decoder 20 to convert the identification code ID in the form of a time code into a linear code. The output signal of the second adder 28 is input to the third multiplier 29 as address information corresponding to the current position of the ATIP frame currently being accessed. The third multiplier 29 multiplies the output signal of the second adder 28 by m and supplies it to the counter 30. The counter 30 loads the output signal of the third multiplier 29 by the output signal of the AND gate 24 and simultaneously receives the clock signal CCLK input from the 14nR divider 23 starting from the load value. Count and output the count value. The AND gate 24 outputs a logic signal of 1 only when there is no error in the identification code ID detected from the decoder 20 and the frame synchronization signal Synch is detected. That is, the counter 30 normally loads the output value of the third multiplier 29 and starts counting the clock signal CCLK input from the 14nR divider 23 when the frame synchronization signal Synch is detected. The 14nR divider 23 divides the recording channel clock (CWrt-CLK) by 14nR. Therefore, the clock signal CCLK input to the counter 30 has a clock number corresponding to m / 7R per frame. The count value output from the counter 30 represents the total clock signal CCLK from the track's initial position to the current access switch.

In the case where an error occurs in the identification code ID, the decoder 20 inputs the output of logic "0" to the AND gate 24 to maintain the count value of the counter 30. Therefore, even when an error occurs in the identification code ID, the total number of clocks from the track initial position to the present can be obtained. Also, even when the frame synchronizing signal PYre is not detected, the output signal logic value of the AND gate 24 becomes "0", so that the count value of the counter 30 is maintained.

In addition, as shown in FIG. 8, the ATIP decoder 9 includes a first divider 31 into which the output value of the counter 30 is input, a latch unit 32 and a flip connected to the divider 31. A flop 33 is further provided. The first divider 31 divides the count value from the counter 30 by a predetermined value " R " and outputs the quotient CID to the input terminal of the latch unit 32, and the rest RmD to the latch unit ( The control terminal 32 and the flip-flop 33 are outputted. The remainder Rmd generated from the first divider 31 is input to the microcomputer 10 as an identification code flag signal LID Flag. The latch unit 32 converts the linearly coded identification signal into a time code suitable for the optical recording medium. For this purpose, the latch unit 32 includes a first latch 41 connected to the divider 31, a second divider 42 connected to the first latch 41, and a third agent as shown in FIG. 9. A lifter 43 and a second latch 44 are included. The first latch 41 outputs a share input from the first divider 31 to the second divider 42 whenever the remainder Rmd becomes "0". The second divider 42 divides the output signal of the first latch 41 by 75 and supplies a share thereof to the third divider 43, and supplies the remainder to the frame latch of the second latch 44. The third divider 44 divides the output signal of the second divider 42 by 60 and supplies the share to the minute latch of the second latch 44, and the rest to the second latch of the second latch 44. Supply. The LID converted into a time code by the latch unit 32 includes address information of a recording unit section different from an ATIP frame preformatted on an optical recording medium, and includes 588 × 98 channel bits. do. The flip-flop 33 receives the identification code error determination signal LID-OK by inputting the rest Rmd input from the first divider 31 and the reset signal LID Flag-Rst from the microcomputer 10. Generated and supplied to the microcomputer 10.

The microcomputer 10 generates a recording start signal Wrt-on in synchronization with the flag signal LID-Flag from the ATIP decoder 9, and generates a subcode using a logical identification code LID. The CIRC encoder 7 serves to insert an error correction code into the recording data. The modulation / subcode inserting section 6 modulates the recording data input from the CIRC encoder 7 into the EFM code while sampling the recording channel clock (CWrt-Clk), and modulates the subcode input from the microcomputer 10 into the EFM code. It will be inserted into the frame. The laser power controller 5 interrupts the laser diode of the optical pickup 1 in accordance with the recording channel signal from the modulation / subcode insertion section 6.

At the time of recording, the microcomputer 10 synchronizes with the recording start position (MM: SS: FF (start)) of the logical identification code LID input from the ATIP decoder 9 as shown in FIG. Will occur). In response to this recording start signal Wrt-on, the modulation / subcode inserting section 6 samples the recording data according to the recording channel clock CWrt-CLK converted according to the recording density to generate a recording channel signal. At the recording end position (MM: SS: FF (end)), the microcomputer 10 turns off the recording start signal Wrt-on. The modulation / sub code inserting section 16 then ends the generation of the recording channel signal in synchronization with the flag signal ID-flag corresponding to the recording off position. In this way, the subcode frame recorded on the optical recording medium having a length different from that of the ATIP frame by the logical address information includes 98 EFM frames as in the prior art. Here, even when the recording density adjustment ratio m / R is set to be large and the length of the unit recording section according to the logical identification code (LID) becomes short, the number of recording channel clocks allocated per unit recording section becomes the same, so that the corresponding unit recording section The recording density becomes high.

On the other hand, the reproduction processing section of the information recording apparatus shown in Fig. 7 includes an RF signal processing section 2, a demodulation / subcode detection section 3, and a CIRC decoder 4 connected directly to the output terminal of the optical pickup 1. The RF signal processor 2 processes the push-pull signal output from the optical pickup 1 to generate a high frequency signal. The demodulation / subcode detector 3 amplifies and waveforms the high frequency signal, demodulates the sub Separate the code to generate the playback data. The CIRC decoder 4 corrects an error of reproduction data for each EFM frame.

As described above, an information recording method and apparatus according to an embodiment of the present invention includes a user included in a logical address and a unit recording section indicating a unit recording section having a length different from that of a preformatted ATIP frame on an optical recording medium. A recording channel clock is generated that varies with the recording density of the data. Therefore, the information recording method and apparatus according to the present invention can increase the recording density of the unit recording section defined according to the logical address by making the unit recording section shorter than the ATIP frame and generating the recording channel clock suitable for the recording density. In addition, the information recording method and apparatus according to the present invention detects an identification code from an optical recording medium, converts the detected identification code into a linear code, converts the linear code value according to the recording density, and then sets the value according to the recording density. By converting the changed linear code back to the time code suitable for the optical recording medium, it is possible to effectively provide a logical address that varies according to the change in the recording density of the unit recording section.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (16)

In a method of recording data on a wobble groove track in which a first address information is pre-formatted, the first address information being recorded on a recording medium defining a plurality of first unit sections. a) detecting a wobble signal from a wobble groove track of a record carrier; b) restoring the first address information based on the detected wobble signal; c) allocating a plurality of second unit sections different from the first unit section on the recording medium, and generating second address information defining the second unit section; d) generating a recording clock according to the second unit interval; e) recording information on the recording medium in synchronization with the recording clock so as to correspond to the second unit section. The information recording method according to claim 1, wherein the amount of user information allocated to the second unit section is equal to the amount of user information allocated to the first unit section. The information recording method according to claim 1, wherein the second unit section is set smaller than the first unit section. The information recording method according to claim 1, wherein when the recording density adjustment ratio corresponding to the second unit section is m / R, m and R are set to an integer of 0 or more. 5. The information recording method according to claim 4, wherein the clock number of the recording clock corresponding to the second unit section is set to an integer multiple of a wobble signal preformatted on the recording medium. 6. The information recording method according to claim 5, wherein when the clock number of the recording clock corresponding to the second unit section is 2n x m, n and m are set to an integer of 0 or more. 7. The method of claim 6, wherein when n and R are set to 2 and 49, respectively, m is set to an integer of 49 or more according to the recording density of the second unit section; And n is set to 14 and 7, respectively, wherein m is set to an integer of 7 or more according to the recording density of the second unit section. The method of claim 1, further comprising: converting the first address information restored in step b) into a linear code; And generating second address information of step c) based on the converted linear code. An information recording medium on which information is recorded by the method according to any one of claims 1 to 8. a) wobble detection for detecting a wobble signal from the wobble groove track of a recording medium defining a plurality of first unit intervals, wherein the first address information is recorded in a pre-formatted form in the wobble groove track; Means; b) decoding means for restoring said first address information based on said detected wobble signal; c) address generating means for generating second address information indicating a second unit section having a different size from the first unit section; d) recording clock generating means for generating a recording clock corresponding to the recording density of the second unit section; e) information recording means for recording information on the recording medium in correspondence with the second unit section in synchronization with the recording clock. The information recording apparatus according to claim 10, wherein an amount of user information allocated to the second unit section is equal to an amount of user information allocated to the first unit section. The information recording apparatus according to claim 10, wherein the second unit section is set smaller than the first unit section. The information recording apparatus according to claim 10, wherein m and R are set to an integer of 0 or more when the recording density adjustment ratio corresponding to the second unit section is m / R. The information recording apparatus according to claim 13, wherein n and m are set to an integer of 0 or more when the clock number of the recording clock corresponding to the second unit section is 2n x m. The information recording apparatus according to claim 10, wherein said address generating means further comprises time code converting means for converting a linear code indicating said second unit section into a time code. 11. The apparatus of claim 10, further comprising linear code converting means for converting the address information restored by the decoding means into a linear code, wherein the address generating means generates second address information based on the linear code. Information logger.

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