WO1997015082A1 - Semiconductor devices - Google Patents

Semiconductor devices Download PDF

Info

Publication number
WO1997015082A1
WO1997015082A1 PCT/GB1996/002564 GB9602564W WO9715082A1 WO 1997015082 A1 WO1997015082 A1 WO 1997015082A1 GB 9602564 W GB9602564 W GB 9602564W WO 9715082 A1 WO9715082 A1 WO 9715082A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
semiconductor device
layers
substrate
lattice
Prior art date
Application number
PCT/GB1996/002564
Other languages
French (fr)
Inventor
John Emyr Macdonald
David Ian Westwood
Original Assignee
University College Cardiff Consultants Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University College Cardiff Consultants Limited filed Critical University College Cardiff Consultants Limited
Priority to AU73141/96A priority Critical patent/AU7314196A/en
Publication of WO1997015082A1 publication Critical patent/WO1997015082A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds

Definitions

  • FIG. 3 A more detailed semiconductor laser diode structure is shown, for the sake of example, in figure 3: the reference numerals used in Figure 3 correspond with those used in Figure 1.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)
  • Semiconductor Lasers (AREA)

Abstract

A semiconductor device arranged to emit blue light comprises a substrate (10) and an active layer (12) formed of semiconductor materials, the lattice constant X of the active layer material being related to the lattice constant Y of the substrate material by the square root of 2 (∑2), and the [100] crystallographic axis of the second layer being aligned at 45° to the [100] crystallographic axis of the first layer. With this arrangement the crystal lattices of the two layers (10, 12) are aligned uniformly, so that lattice mismatch defects do not occur between layers having quite different lattice constants.

Description

Semiconductor Devices
This invention relates to semiconductor devices and is particularly directed to achieving a lattice match between adjacent layers in semiconductor devices, particularly light emitting diodes, laser diodes and transistors. The invention has particular but not sole reference to the growth of nitride layers.
Nitrides, particularly GaN, are amongst group III-V semiconductor compounds in which there is considerable present- day interest, particularly with a view to producing diodes emitting light in the blue part of the visible spectrum. Blue LED*s have been produced, but so far it has not been possible to produce blue laser diodes because of excessive numbers of defects in the crystal growth: generally these defects derive from a lattice mismatch between the nitride and the substrate on which it is grown. Thus, the problem arises from the fact that the lattice constants of nitrides are quite different from the lattice constants of suitable substrates (including sapphire, silicon and GaAs) .
We have now devised a semiconductor device structure in which problems of lattice mismatch are substantially alleviated despite a large difference between the lattice constants of adjacent layers.
In accordance with this invention there is provided a semiconductor device which comprises first and second layers of materials the lattice constants of which are related to each other by substantially the square root of 2 and the [100] crystallographic axis of the second layer is aligned at 45° to the [100] crystallographic axis of the first layer.
This invention is based on the realisation that suitable combinations of materials are available, whose lattice constants are related by substantially V2 . These include nitrides (such as inN, GaN and AIN) on the one hand and substrate materials InSb, CdTe and InAs on the other hand. Thus, the lattice constants of InN, GaN and AIN are respectively 4.98, 4.52 and 4.38 A, V2 times these lattice constants giving 7.04, 6.39 and 6.19 A, which values are close to the lattice constants of InSb (6.48A) and InAs (6.C6 A) . It is therefore possible, with different compounds based on different combinations and different proportions of elements, to achieve a close match between the two layers which have their [100] axes at 45° to each other. For example In(l)4Ga086N would then match exactly onto InSb.
Preferably, in the device according to the invention, the first layer is a substrate and the second layer is grown on the substrate. Typically the device comprises a plurality of further layers, including one or more layers above and/or below the second layer, preferably with their crystallographic axes aligned with that of the second layer.
Preferably the second layer comprises a nitride material. Preferably the further layers comprise nitride materials. Preferably the semiconductor device is a light emitting diode or a laser diode, preferably emitting blue light.
An embodiment of this invention will now be described by way of example only and with reference to the accompanying drawings, in which:
FIGURE 1 is a schematic cross-section through a typical laser diode in accordance with this invention;
FIGURE 2 is a schematic plan view to show the relative alignments of the lattices of the substrate and layers formed on the substrate; and
FIGURE 3 is a cross-section similar to Figure 1, through a more detailed semiconductor laser diode structure.
Referring to Figure 1, there is shown a laser diode comprising a substrate 10 of e.g. InSb or InAs, an active layer 12 of e.g. GaN, and cladding layers 11,13 above and below the active layer, e.g. of Al GaN. The laser diode in practice comprises additional layers which need not be described in detail for the purpose of this specification. In accordance with the invention, the substrate lattice constant Y is equal to V2 times the lattice constant X of the layers grown on the substrate 10. Figure 2 shows diagrammatically the lattices of layers 11,12,13 with their [100] crystallographic axes aligned with the [110] axis of the substrate: the lattice of the substrate is shown by the solid lines and the lattice of the layers 11, 12, 13 is shown by the dotted lines. It will be appreciated that the [100] axis of the layers 11,12,13 is at 45° to the [100] axis of the substrate layer 10.
It is envisaged that the layers 11,12,13 will grow naturally at the required orientation on the substrate.
A more detailed semiconductor laser diode structure is shown, for the sake of example, in figure 3: the reference numerals used in Figure 3 correspond with those used in Figure 1.

Claims

1) A semiconductor device which comprises first and second layers of materials the lattice constants of which are related to each other by substantially the square-root of 2 and the [100] crystallographic axis of the second layer is aligned at 45° to the [100] crystallographic axis of the first layer.
2) A semiconductor device as claimed in claim 1, in which the first layer comprises a substrate, the second layer being grown on the substrate.
3) A semiconductor device as claimed in claims 1 or 2 , comprising a third layer disposed above or below the second layer.
4) A semiconductor device as claimed in claim 3, in which the crystallographic axes of the second and third layers are aligned.
5) A semiconductor device as claimed in any preceding claim, in which the second layer comprises a nitride material.
6) A semiconductor device as claimed in claim 5 as appended to claim 3, in which the third layer comprises a nitride material.
7) A semiconductor device as claimed in any preceding claim, in which the semiconductor device is a light emitting device.
8) A semiconductor device as claimed in claim 7, which is arranged to emit blue light.
9) A semiconductor device as claimed in any preceding claim, in which the [100] crystallographic axis of the second layer is aligned with the [110] axis of the first layer.
PCT/GB1996/002564 1995-10-18 1996-10-17 Semiconductor devices WO1997015082A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU73141/96A AU7314196A (en) 1995-10-18 1996-10-17 Semiconductor devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9521460.7A GB9521460D0 (en) 1995-10-18 1995-10-18 Semiconductor devices
GB9521460.7 1995-10-18

Publications (1)

Publication Number Publication Date
WO1997015082A1 true WO1997015082A1 (en) 1997-04-24

Family

ID=10782583

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1996/002564 WO1997015082A1 (en) 1995-10-18 1996-10-17 Semiconductor devices

Country Status (3)

Country Link
AU (1) AU7314196A (en)
GB (1) GB9521460D0 (en)
WO (1) WO1997015082A1 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0327493A2 (en) * 1988-02-03 1989-08-09 International Business Machines Corporation Epitaxial arrangement of high TC superconductors on silicon

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0327493A2 (en) * 1988-02-03 1989-08-09 International Business Machines Corporation Epitaxial arrangement of high TC superconductors on silicon

Also Published As

Publication number Publication date
GB9521460D0 (en) 1995-12-20
AU7314196A (en) 1997-05-07

Similar Documents

Publication Publication Date Title
CN101369531B (en) A semiconductor device and a method of manufacture thereof
US5075743A (en) Quantum well optical device on silicon
US9691712B2 (en) Method of controlling stress in group-III nitride films deposited on substrates
US6110277A (en) Process for the fabrication of epitaxial layers of a compound semiconductor on monocrystal silicon and light-emitting diode fabricated therefrom
US6261929B1 (en) Methods of forming a plurality of semiconductor layers using spaced trench arrays
US20160380149A1 (en) Light emitting diode having well and/or barrier layers with superlattice structure
CA2655579A1 (en) Method and device for fabricating semiconductor light emitting elements
WO2004073045A3 (en) Epitaxial growth of a zirconium diboride layer on silicon substrates
US6613461B1 (en) Gallium nitride-based compound semiconductor chip and method for producing the same, and gallium nitride-based compound semiconductor wafer
CN101636849A (en) Be grown on the template to reduce the III group-III nitride luminescent device of strain
US3985590A (en) Process for forming heteroepitaxial structure
US3935040A (en) Process for forming monolithic semiconductor display
WO2002080287A3 (en) Semiconductor structures and devices for detecting far-infrared light
US5714006A (en) Method of growing compound semiconductor layer
KR101171324B1 (en) Method of forming buffer layer for a light emitting device of a nitride compound semiconductor and buffer layer formed by the method
EP0283392A3 (en) Compound semiconductor epitaxial wafer
US3984857A (en) Heteroepitaxial displays
WO1997015082A1 (en) Semiconductor devices
US5057880A (en) Semiconductor device having a heteroepitaxial substrate
WO2002008806A3 (en) Monolithic optical system
JP2000183325A (en) Semiconductor device and formation thereof
JPS57128092A (en) Imbedded type semiconductor laser device
JPS621225A (en) Semiconductor wafer
WO2002009242A3 (en) Optical structure on compliant substrate
KR100879231B1 (en) Group 3-5 compound semiconductor and light emitting diode

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AL AM AT AU AZ BB BG BR BY CA CH CN CU CZ DE DK EE ES FI GB GE HU IL IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK TJ TM TR TT UA UG US UZ VN AM AZ BY KG KZ MD RU TJ TM

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): KE LS MW SD SZ UG AT BE CH DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase
REG Reference to national code

Ref country code: DE

Ref legal event code: 8642