WO1996002949A1 - Dispositifs photoemetteurs a surface semi-isolante - Google Patents

Dispositifs photoemetteurs a surface semi-isolante Download PDF

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Publication number
WO1996002949A1
WO1996002949A1 PCT/US1995/007313 US9507313W WO9602949A1 WO 1996002949 A1 WO1996002949 A1 WO 1996002949A1 US 9507313 W US9507313 W US 9507313W WO 9602949 A1 WO9602949 A1 WO 9602949A1
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WO
WIPO (PCT)
Prior art keywords
layer
light emitting
mesa
doped
substrate
Prior art date
Application number
PCT/US1995/007313
Other languages
English (en)
Inventor
Ching-Long Jiang
Original Assignee
The Whitaker Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by The Whitaker Corporation filed Critical The Whitaker Corporation
Priority to JP8505011A priority Critical patent/JPH10505947A/ja
Publication of WO1996002949A1 publication Critical patent/WO1996002949A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
    • H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/642—Heat extraction or cooling elements characterized by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
    • H01S5/2222—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties
    • H01S5/2224—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers having special electric properties semi-insulating semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H01S5/323—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/3235—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000 nm, e.g. InP-based 1300 nm and 1500 nm lasers
    • H01S5/32391—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength longer than 1000 nm, e.g. InP-based 1300 nm and 1500 nm lasers based on In(Ga)(As)P

Definitions

  • the present invention relates to semiconductor light emitting devices with increased operating speed and near linear light output versus current input characteristics.
  • the invention of the instant application is related to U.S. 08/276,131, filed July 15, 1994.
  • the advent of heterostructure semiconductor devices has lead to the ease in fabrication and improved characteristics of many types of semiconductor devices.
  • the light emitting diode (LED) the subject of the present invention, is an example of a device that benefits greatly from the use of heterostructure device design.
  • the heterostructure employed in the fabrication of an LED is a double heterostructure, in which an active region III- V semiconductor (ternary or quaternary) is sandwiched between two oppositely doped III-IV compounds. By choosing appropriate materials of the outer layers, the band gaps are made to be larger than that of the active layer.
  • This procedure produces a device that permits light emission due to recombination in the active region, but prevents the flow of electrons or holes between the active layer and the higher band gap sandwiching layers due to the differences between the conduction band energies and the valence band energies, respectively.
  • Figure 1 is an energy band diagram of an N-n-P (where N,P are indicative of materials with greater band gaps than the n-doped active region) double semiconductor heterostructure, which shows the discontinuities 2,3 in energy levels of the conduction band energy (E c ) and the valence band energy (E v ) at the depletion regions that create the confinement of electrons and holes in the active region 1 (The Fermi level E f , is aligned at all three materials) .
  • the minority carrier concentration (holes) in the sandwiched region can have a magnitude comparable to the majority carrier concantration in the p-doped region.
  • a further advantage stems from a structure such as that shown, is that the dielectric constant of the higher bandgap layers is lower than that of the central lower bandgap region. Accordingly, the index of refraction of the lower bandgap region is higher than that of the lower bandgap regions, an a natural dielectric slab (assuming a rectangular layer structure) waveguide is formed.
  • Light emitting devices can be fabricated to emit light from an edge of the active layer, or as stated above from a surface.
  • the devices can be either light emitting diodes or lasers.
  • the particular design shows an edge emitting LED an n-type substrate.
  • the active layer composition for the laser devices can be either of conventional bulk material or strained or unstrained quantum well type material.
  • An Edge Emitting Light Emitting Diode (ELED) fabricated by conventional techniques is shown in Figures 2-4.
  • an n- type indium phosphide (n-InP) substrate 21,31,41 has grown thereon an n-type buffer layer (not shown) p-type InGaAsP active layer 22,32,42, a p-type cladding layer of for example p-InP 23,33,43 and a p-type contact layer of for example p-InGaAs 24,34,44.
  • n-type buffer layer not shown
  • p-type InGaAsP active layer 22,32,42 a p-type cladding layer of for example p-InP 23,33,43
  • a p-type contact layer of for example p-InGaAs 24,34,44.
  • etching by standard techniques is performed so that a moat 35 is created leaving a central mesa 36, as is shown in Figure 3.
  • a dielectric layer 45 of Si0 2 or SiN ⁇ for example is then deposited over the mesa and surrounding area. However, the dielectric on the top of the mesa is removed for the purposes of making an electrical contact opening. This dielectric is of poor thermal and electrical conductivity, and serves to isolate the active layer 42 and the substrate 41 from the subsequently p-type metal contact layer 46
  • the p- type metal is deposited by conventional technique after the contact opening in the dielectric layer 45 is made. While serving as an excellent isolator, the dielectric layer has the adverse effect of poor thermal conductivity.
  • a semi-insulating or insulating substrate has deposited thereon a semi- insulating layer of InP which is etched to accommodate the p and n side electrodes as well as an vertical aperture in which an active layer is grown between p and n type cladding layers. Thereby, a light emitting device is formed in the aperture.
  • Connecting the n-type cladding to the n side electrode is an conducting n-type InP layer which is buried in a groove etched in the semi-insulating layer.
  • This structure having the light emitting device in a relatively small and confined region reduces the intrinsic parasitic capacitance by reducing the area of the p-n junctions of the device, and thereby the capacitance which is directly proportional to the area of the p-n junction.
  • a good understanding of the ill-effects of this parasitic peripheral pn junction capacitance is found by a review of the prior art disclosed in Figure 5 of the '358 reference.
  • the etching and fabrication of these light emitting devices are rather complicated. What is needed is a light emitting device that can be fabricated simply, and thereby at a low cost, yet still exhibits the reduction in intrinsic capacitance.
  • Another ill-effect of conventional light emitting devices is the poor ability to dissipate joule heating, and the subsequent non-linear light versus current characteristics. What is needed is a fast switching light emitting devices with relatively linear light output power versus current input characteristics.
  • the present invention is intended for application to light emitting devices including diodes and lasers.
  • light emitting devices including diodes and lasers.
  • a particular structure will be the principle focus of discussion.
  • a discussion will follow which describes the fabrication of light emitting device that are surface emitters fabricated on an n-type substrate.
  • both basic types of devices can be fabricated on a p-type substrate.
  • the active layer construction for the laser devices can be either of conventional bulk material, or strained or unstrained quantum well type material.
  • Figure 1 is an example of an energy band diagram of a double heterostructure junction with an active layer having a lower band gap than the outer layers.
  • Figure 2 is a schematic cross sectional view of planar growth of materials needed to fabricate a conventional SLED.
  • Figure 3 is a cross section of an etched mesa in a conventional SLED.
  • Figure 4 is a cross-sectional view of a conventional SLED.
  • Figure 5 is a cross sectional view of the present invention after mesa etching.
  • Figure 6 is a cross sectional view of the present invention.
  • Figure 7 is cross sectional view of a surface emitting laser without a blocking layer.
  • Figures 8a-8d are schematic views of various types of conventional surface emitting lasers.
  • Figure 9 is a cross sectional view of a laser of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • the substrate 51 is for example an n-InP wafer that is doped to a degree that it is conductive, for example doping levels of approximately 10 17 to 10 19 cm "1 .
  • a heterostructure is formed by epitaxially growing successive layers of an n-InP buffer (not shown) , an InGaAsP for the active layer 52, a p-InP for the p type cladding 53 and a p contact layer 54 thereon. The epitaxial material is grown first in a planar structure and is then masked with dielectric or photoresist. The mask is patterned and partially removed.
  • this isolating layer 65 is for example a layer of semi- insulating iron doped InP which serves to isolate the active layer and the substrate from the subsequently deposited p-type metal layer 66.
  • the surface light emitting device then functions as described above, having an n-electrode and a p-electrode contacting the conducting substrate 51 and the p-metal contact 66, respectively.
  • the light is transmitted through the n-InP conducting substrate, which is transparent to the emitted light due to the fact that its bandgap is greater than that of the active region, as described above.
  • This structure minimizes the area of the pn junctions through mesa structure, and has the benefit thereby of reducing the ill-effects of pn junction capacitance.
  • the deposition of a semi-insulating layer as the isolating layer 65 serves as well to decrease the capacitance between the p- electrode and the n-electrode, outside the mesa region.
  • Another benefit of the present device design is its capability to dissipate the joule heat generated in operation. Joule heating in conventional light emitting devices results in non-linear light output power versus bias currents.
  • the structure of the present invention has the ability to dissipate heat through two paths.
  • the layer of semi-insulating InP 65 which has a thermal conductivity of approximately .68 watt-cm ⁇ -K "1 forms one path.
  • the layer 65 has the same thermal expansion coefficient and lattice constant as the n-doped InP substrate, and can thereby be grown to any desired thickness, which has obvious ramifications relative to the degree of electrical isolation as well as the ability of the device to dissipate heat.
  • this could be a layer of Fe-doped InP exhibiting a resistivity in the range 10 6 -10 10 Ohm-cm, however other materials could be used in keeping with the theme and spirit of the invention.
  • the dissipation of heat away from the pn junctions of the mesa structure allows the device to operate at high injection current levels without significant heating of the pn junctions, thereby improving the light output power linearity with respect to bias current.
  • the n-doped conducting layer 51 itself acts as a second path to dissipate joule heating away from the pn junctions of the mesa structure as well with the same benefit as just described.
  • the n-type electrode can be directly connected to the substrate, eliminating an additional processing step. So, in addition to providing a better thermal dissipation path, the conducting substrate acts as an electrical connection point as well, keeping the device profile smaller than the other reduced capacitance devices as described in the patents which have been incorporated herein by reference.
  • an active layer 72 of bulk, strained or unstrained quantum well semiconductor materials for example p-GaAS/p-GaAlAs is sandwiched of thickness d between two layers of higher bandgap materials 73 and 74.
  • material 73 could be p-GaAlAs and 74 could be n-GaAlAS.
  • These materials 73 and 74 are chosen to have not only greater bandgaps than that of the active region, but also a lower index of refraction.
  • the index of refraction of the active region is and that of the materials 73 and 74 n 2 , where n x >n 2 .
  • a waveguide is created in the active region having a width d.
  • RECTIFIED SHEET (RULE 91) bandgaps of the materials are chosen to facilitate the required inversion for lasing, as well as carrier confinement.
  • the fact that the recombination region is well defined and of fixed dimension results in a cavity that tends to confine the optical wave in the active region, thereby providing amplification for a larger fraction of the wave than would be the case in an unguided wave.
  • the end result is a higher degree of optical efficiency, thereby requiring smaller input current per unit output power, and therefore a reduction in heat .
  • FIGS 8a-8d show various types of heterostructure lasers which are conventional in the art.
  • the mirror is shown at 801
  • the substrate of n- InP is shown at 802
  • the p-GalnAsP active layer is shown at 803
  • the p-InP layer is shown at 804
  • the Si0 2 is shown at 805
  • the p-GalnAsP window/cap is shown at 806, the electrode is shown at 807.
  • Figures.8c a higher bandgap InP provides a potential barrier to lateral current diffusion is shown, and in Figure 8d, the planar potential barrier layer is shown.
  • the p-InP layer in Figures 8c and 8d are shown at 809.
  • Figure 8a is an example of a laser having no current blocking layer.
  • Figures 8b shows the use of polyimide as a blocking layer, and Figures 8c and 8d show the use of reverse bias junctions to effect a potential barrier current blocker.
  • the significance of current confinement is the ability to increase optical efficiency of the optical resonator.
  • all of the structures of Figure 8 have the problems
  • the substrate 91 is an n-type conductive layer
  • the mesa structure 92 is of the same basic design as that of the LED with the exception that reflectors 93 are disposed so as to enable the resonance required to lase .
  • These reflectors are deposited or placed by standard techniques readily known to the skilled artisan.
  • the InP cladding layers 94 provide the carrier confinement as well as the cladding layers for the waveguide established in the active layer 95.
  • the layer of InP 97 is chosen for its semi- insulative properties. For example, this could be a layer of Fe-doped InP exhibiting a resistivity in the range 10 6 -10 10 Ohm-cm, however other materials could be used in keeping with the theme and spirit of the invention. These layer 97 again serves to reduce the overall parasitic capacitance of the device, and thereby increase the modulation bandwidth of the laser. Finally, as mentioned in rather great detail in relation to the SLED, the layers 91 and 97 serve to dissipate heat, resulting in more linear characteristics of the laser output, and the layer 91 enables the direct electrical contact to the device.
  • RECTIFIED SHEET (RULE 91) emitters fabricated on an n-type substrate.
  • both basic types of devices can be fabricated on a p-type substrate. All such variations of this basic design and materials as could be implemented by the ordinary skilled artisan are considered within the theme and spirit of the invention.
  • the active layer construction for the laser devices can be either of conventional bulk material, or strained or unstrained quantum well type material. Various modifications will become apparent to those of ordinary skill in the art. All such variations which basically rely on the teachings which this invention advances are considered within the scope of the invention.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

Les dispositifs photoémetteurs décrits, qui sont destinés à des largeurs de bande de modulation accrues, nécessitent des vitesses de commutation plus élevées. La réduction de la capacité de la jonction pn ainsi que l'utilisation d'une couche de blocage semi-isolante et d'un substrat conducteur permettent de résoudre partiellement les problèmes de capacité intrinsèque rencontrés dans les structures à hétérojonctions des semi-conducteurs conventionnels. Une configuration à dissipation thermique utilisant les couches semi-isolantes et conductrices du dispositif décrit permet de compenser la non-linéarité du rapport entre l'énergie optique restituée et la tension de polarisation.
PCT/US1995/007313 1994-07-15 1995-06-08 Dispositifs photoemetteurs a surface semi-isolante WO1996002949A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8505011A JPH10505947A (ja) 1994-07-15 1995-06-08 半絶縁性面発光素子

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US27613194A 1994-07-15 1994-07-15
US08/276,131 1994-07-15

Publications (1)

Publication Number Publication Date
WO1996002949A1 true WO1996002949A1 (fr) 1996-02-01

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4188244A (en) * 1975-04-10 1980-02-12 Matsushita Electric Industrial Co., Ltd. Method of making a semiconductor light-emitting device utilizing low-temperature vapor-phase deposition
WO1986000172A1 (fr) * 1984-06-15 1986-01-03 American Telephone & Telegraph Company Dispositifs a semiconducteurs avec heterostructures noyees
EP0344904A2 (fr) * 1988-06-01 1989-12-06 Nortel Networks Corporation Croissance de phosphure d'indium semi-isolant par l'épitaxie en phase liquide
JPH0220085A (ja) * 1988-07-08 1990-01-23 Nec Corp 半導体レーザ装置
JPH02170486A (ja) * 1988-12-23 1990-07-02 Hitachi Ltd 半導体発光装置
JPH0311688A (ja) * 1989-06-08 1991-01-18 Oki Electric Ind Co Ltd 半導体レーザの製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4188244A (en) * 1975-04-10 1980-02-12 Matsushita Electric Industrial Co., Ltd. Method of making a semiconductor light-emitting device utilizing low-temperature vapor-phase deposition
WO1986000172A1 (fr) * 1984-06-15 1986-01-03 American Telephone & Telegraph Company Dispositifs a semiconducteurs avec heterostructures noyees
EP0344904A2 (fr) * 1988-06-01 1989-12-06 Nortel Networks Corporation Croissance de phosphure d'indium semi-isolant par l'épitaxie en phase liquide
JPH0220085A (ja) * 1988-07-08 1990-01-23 Nec Corp 半導体レーザ装置
JPH02170486A (ja) * 1988-12-23 1990-07-02 Hitachi Ltd 半導体発光装置
JPH0311688A (ja) * 1989-06-08 1991-01-18 Oki Electric Ind Co Ltd 半導体レーザの製造方法

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 014, no. 163 (E - 0910) 29 March 1990 (1990-03-29) *
PATENT ABSTRACTS OF JAPAN vol. 014, no. 437 (E - 0980) 19 September 1990 (1990-09-19) *
PATENT ABSTRACTS OF JAPAN vol. 015, no. 125 (E - 1050) 27 March 1991 (1991-03-27) *
TOPICAL MEETING ON SEMICONDUCTOR LASERS, ALBUQUERQUE, NEW MEXICO, FEBRUARY 10-11, 1987, p.55-58, K. WAKAO ET AL. :"InGaAsP/ InP planar buried heterostructure laser *

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