WO1994018702A1 - A thin film semiconductor device and method - Google Patents

A thin film semiconductor device and method Download PDF

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Publication number
WO1994018702A1
WO1994018702A1 PCT/US1994/001352 US9401352W WO9418702A1 WO 1994018702 A1 WO1994018702 A1 WO 1994018702A1 US 9401352 W US9401352 W US 9401352W WO 9418702 A1 WO9418702 A1 WO 9418702A1
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film
semiconductor device
oxide film
thin film
low temperature
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PCT/US1994/001352
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French (fr)
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Katsuyoshi Harada
Satoshi Hattori
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Watkins-Johnson Company
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Publication of WO1994018702A1 publication Critical patent/WO1994018702A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

Definitions

  • the present invention relates to a thin film semiconductor device, and more particularly, to a thin film semiconductor device which consists of silicon oxide films such as a gate insulator film, inter-metal dielectric film, and passivation insulator film which are formed on the surface of a glass substrate or the like kind.
  • a silicon oxide film in this type of thin film semiconductor device is achieved by forming a silicon film onto a semiconductor wafer using the reaction of trialkoxysilane and ozone in the temperature range between 300-500°C, as described in the Japanese Early Patent Disclosure 62-42536, for example.
  • even a 400°C range causes problems for practical use due to uneven film quality.
  • a thin film semiconductor device using a glass substrate requires treatment at a low temperature to avoid breakage of the glass substrate, cracking, break in conductor, or stress migration on the thin film caused by a stress occurring between the glass substrate and film. Therefore, the silicon oxide film which constructs a gate insulator film and the like must be formed at a low temperature.
  • formation of a gate silicon oxide or the like is preferred to be conducted at 300°C or below because the electrical property of the thin film semiconductor device degrades due to elimination of hydrogen from the amorphous silicon film at a high temperature.
  • Silicon oxide films produced according to the technique described above give rise to problems such as reduction in the property of the thin film -semiconductor device as well as in productivity due to inconsistent film quality and increased heat stress which is imposed upon the glass substrate, electrode films and the like during film formation.
  • a main characteristic of the present invention is the placement of an amorphous silicon film, a gate insulator film which was formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, a gate electrode film located on top or under the aforesaid gate insulator film, a source electrode film and a drain electrode film all formed on a substrate.
  • Another main characteristic of the present invention is the placement of a passivation film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone in the thin film semiconductor device of the aforesaid Claim 1.
  • Another main characteristic of the present invention is the placement of a primary electrode film, a multi-layered amorphous silicon film, a passivation insulator film for the aforesaid amorphous silicon film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, and a secondary electrode film.
  • Another main characteristic of the present invention is that the deposition temperatures of each insulator film in the aforementioned thin film semiconductor device are between 100-300°C.
  • Another main characteristic of the present invention is the placement of a polycrystalline silicon film, a gate insulator film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a low temperature, a gate electrode film located on top or under the aforesaid gate insulator film, a source electrode film and a drain electrode film all formed on a substrate.
  • Another main characteristic of the present invention is the placement of either an inter-metal dielectric film or a passivation insulator film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone.
  • Another main characteristic of the present invention is the placement of a primary electrode film, a polycrystalline silicon film, a passivation insulator film for the aforesaid crystal silicon film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, and a secondary electrode film.
  • Another main characteristic of the present invention is that the deposition temperatures of each insulator film in the aforementioned thin film semiconductor device are between 100-400°C.
  • Figure 1 is a typical cross-sectional view of a reverse staggered type amorphous silicon thin film transistor in the first sample of the present invention.
  • Figure 2 is a typical cross-sectional view of a staggered type amorphous silicon TFT in the first sample of the present invention.
  • Figure 3 is a typical cross-sectional view of a thin film diode ring system in the third sample of the present invention.
  • Figure 4 is a graph showing leak current characteristics of the silicon oxide film which is formed at a low temperature in accordance with the chemical vapor phase deposition method using triethoxysilane and ozone.
  • Figure 5 is a cross-sectional view of the rough surface of the surface of the substrate of the aforesaid silicon oxide film showing the gap-filling capability of the silicon oxide film.
  • Figure 6 is a typical cross-sectional view of a planar type polycrystalline silicon thin film transistor in the fourth sample of the present invention.
  • Figure 7 is a typical cross-sectional view of a staggered type polycrystalline silicon thin film transistor in the fifth sample of the present invention.
  • Figure 8 is a typical cross-sectional view of a thin film diode switch system in the sixth sample of the present invention.
  • the trialkoxysilane preferably contains an alkoxide base of 1-4 carbons, more particularly, trimethoxysilane, triethoxysilane, tri-n-propoxysilane, triisopropoxysilane , tri -n-butoxysilane , tri-sec-butoxysilane , triisobutoxysilane , tri-tert-butoxysilane can be used.
  • trimethoxysilane triethoxysilane, tri-n-propoxysilane, triisopropoxysilane , tri -n-butoxysilane , tri-sec-butoxysilane , triisobutoxysilane , tri-tert-butoxysilane can be used.
  • trimethoxysilane trimethoxysilane, triethoxysilane, tri-n-propoxysilane, triisopropoxysilane , tri -n-butoxysilane , tri-sec-but
  • trialkoxysilane bubble with inert gas such as helium, argon and nitrogen to vaporize it to supply into the reaction system, or supply it with diluted gas such as the aforesaid inert gas after it was vaporized by heat.
  • inert gas such as helium, argon and nitrogen
  • Ozone which is the other reaction gas, is commonly supplied into the reaction group after it is diluted with oxygen.
  • the ozone concentration should not exceed 10 wt%, and 3-7 wt% is the best.
  • the supplement ratio of the ozone and trialkoxysilane to the reaction group should be 1 mol of trialkoxysilane to 0.5-10 mols of ozone, preferably 1-5 mols. If too much ozone exists, icroparticles in the gas phase become aggressive, and then to attach to the substrate. On the other hand, if too little ozone exists, the reaction speed becomes slow, making it impractical .
  • the best material for the aforementioned substrate is silicon, quartz, ceramic, aluminum, stainless steel, as well as glass or different types of resins such as polyester, polyimide, and glass epoxy, but glass is the best.
  • the shape of the substrate is not particularly limited to a certain shape.
  • a gate insulator film consisting of a silicon oxide film on the substrate using trialkoxysilane and ozone in accordance with the chemical vapor deposition technique at a lower temperature than the conventional way prevented dehydrogenation of the amorphous silicon film, which furthermore prevented degradation of the electrical property of the amorphous silicon film.
  • the formation of the silicon oxide film is conducted under a low temperature, therefore there is no danger of lowering the reliability of the substrate, or the gate electrode film and such due to substantial increase of the heat stress to the gate electrode film or the like.
  • this formed-in- low-heat silicon oxide film has a superior film quality, and the leak current property is superior, as indicated in Figure 4.
  • the insulator-gate type thin film semiconductor device with the gate insulator film formed at a low temperature has a superior electrical property as well as being able to generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.
  • the silicon oxide film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone is highly liquid, and finely coats the rough surface without producing defects, increasing the reliability of the thin film semiconductor device.
  • Figure 1 shows a typical cross-sectional view of a reverse staggered type amorphous silicon thin film transistor (abbreviated as amorphous silicon TFT) in the first sample of the present invention.
  • amorphous silicon TFT reverse staggered type amorphous silicon thin film transistor
  • an aluminum film, as gate electrode 11, is formed selectively on glass substrate 10, made of Corning 7059, in a thickness of 1,000A using vacuum evaporation.
  • gate oxide film 12 is formed on gate electrode 11 by creating a reaction gas by mixing a mixed gas which was made by bubbling heated triethoxysilane at 45°C with nitrogen at a flow rate of 2.0 liter/min. and 7.5 liter of ozone concentration 4.5% oxygen with diluting nitrogen gas at 18 liter/min.
  • This reaction gas is led to the surface of glass substrate 10 which is heated to 250°C to make triethoxysilane and ozone within the mixed gas react with each other to form silicon oxide film 12 in a thickness of approximately 1,000A on glass substrate 10.
  • Silicon oxide film 12 is formed at a low temperature of 250°C.
  • Figure 4 shows a good leakage current of 10 "6 A/mm 2 when lMV/cm of an electric field is imposed on it.
  • amorphous silicon film 13 is selectively formed in a thickness of 2,000A onto the location of gate electrode 11 on the surface of silicon oxide film 12 according to the plasma CVD method under the condition of 280°C glass substrate temperature, disilane 2cc/min., and hydrogen 40cc/min.
  • Silicon film 14 for channel protection is selectively formed onto the location of gate electrode 11 on the surface of silicon oxide film 12 under the same conditions as the aforesaid gate oxide film 12.
  • Source electrode 15 and drain electrode 16 consisting of a chrome film and an aluminum film respectively are selectively formed onto amorphous silicon film 13, sandwiching silicon oxide film 14 in the thickness of 1,500A using the vacuum evaporation method, acquiring amorphous silicon TFT.
  • gate oxide film 12 and silicon oxide film 15 for channel protection were formed at a low temperature of 250°C, the film qualities are good as well as there is no degradation of aluminum gate electrode 11 due to heat stress.
  • the amorphous silicon TFT has an excellent electric property due to the fact that the electric property of the amorphous silicon film is kept normal by preventing dehydrogenation of amorphous silicon film 13, thus is manufactured with a high yield.
  • forming a silicon oxide film at a low temperature reduces the manufacturing costs compared to the conventional method.
  • the silicon oxide film which is formed in accordance with the chemical vapor deposition method using trialkoxysilane and ozone is highly liquid, and finely coats the rough surface without producing defects, increasing the reliability of the amorphous silicon TFT.
  • the aforesaid silicon oxide film S is formed onto insulator film I in a fine pattern, then its cross-section is etched with a 1% HF fluid with no pores, indicating the roughness of the film, and are formed in silicon oxide film S.
  • FIG. 2 shows a typical cross-sectional view of another staggered type amorphous silicon TFT in accordance with the present invention.
  • An outline of the manufacturing process for the amorphous silicon TFT includes selectively forming on glass substrate 20, Corning 7059, to a thickness of 1,000A using the vacuum evaporation method.
  • Passivation oxide film 22 is formed onto the surface of glass substrate 20 which was heated to 250°C in a thickness of 2,000A under the conditions described above.
  • Source electrode 23 and drain electrode 24 made with two layers of a chrome film and aluminum film are selectively formed in a thickness of 1,500A onto the surface of passivation film 22 which is on shield film 21.
  • Amorphous silicon film 25 is selectively formed onto passivation oxide film 22, source electrode 23 and drain electrode 24 according to the plasma CVD method in a thickness of 2,000A.
  • gate oxide 26 is selectively formed in a thickness of 2,000A onto the surface of glass substrate 20 which was heated to 250°C under the aforesaid silicon oxide film formation conditions.
  • gate electrode 27 of an aluminum film is selectively formed in a thickness of 1,500A between source electrode 23 and drain electrode 24 on gate oxide film 26 in accordance with the vacuum evaporation method.
  • gate oxide film 26 at a low temperature of 250°C prevents source electrode 23 and drain electrode 24 of aluminum from degradation, and also prevents dehydrogenation of amorphous silicon film 25, thus maintaining the normal electric property of amorphous silicon film, amorphous silicon TFT has good electric property, and can generate a high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced, since the formation of the silicon oxide film is conducted at a low temperature.
  • the passivation oxide film has a good fluidity, and finely coats even extremely rough surface without producing defects, increasing the reliability of the amorphous Si TFT.
  • FIG. 3 shows a typical cross-sectional view of a thin film diode ring system in the third sample of the present invention.
  • ITO film 31 as a transparent electrode is formed selectively on glass substrate 30, made of Corning 7059.
  • p-i-n diode structure 33 made of polycrystalline silicon layers is formed in accordance with the plasma CVD method after chrome film 32 is formed onto ITO film 31 in accordance with the vacuum vaporizing method.
  • Chrome film 34 is formed onto n layer, then passivation oxide film 35 of a silicon oxide film is formed using the method described above onto the substrate.
  • a connecting wire layer for chrome electrode 36 is selectively formed between each diode in accordance with the vacuum evaporation method as indicated in Figure 3.
  • passivation oxide film 35 in the manufacturing process described above, forming passivation oxide film 35 at a low temperature of 250°C prevents ITO film 31 from degradation, thus acquiring a superior electric property at a high manufacturing yield. Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature.
  • the aforesaid passivation 65 has a good fluidity during deposition, and finely coats even extremely rough surfaces without producing defects, increasing the reliability of the thin film diode ring.
  • a silicon oxide film is formed onto the surface of glass substrate 10 at 250°C.
  • the temperature can be selected from 100-300°C, or preferably 150-260°C.
  • Figure 6 shows a typical cross-sectional view of a planar type polycrystalline silicon thin film transistor (abbreviated as polycrystalline silicon TFT) in the fourth sample of the present invention. An outline of the manufacturing process for the polycrystalline silicon TFT is shown below.
  • polycrystalline film 41 is formed selectively on glass substrate 40, made of Corning 7059, in a thickness of 2,000A using the CVD method.
  • inter-metal dielectric film 42 which coats polycrystalline silicon 41 is formed selectively onto the surface of glass substrate 10 which was heated to 260°C in accordance with the aforesaid silicon oxide film formation method.
  • gate oxide film 43 made of the same silicon oxide film is selectively formed onto the center of polycrystalline silicon film 41.
  • An aluminum film such as gate electrode 44 is formed in a thickness of 2,000A onto gate oxide film 43 in accordance with the vacuum evaporation method.
  • passivation oxide film 45 which covers gate electrode 44, is formed onto the surface of glass substrate 10 which was heated to 260°C under the conditions of the above-mentioned gate oxide film formation.
  • source electrode 46 and drain electrode 47 which are made of aluminum films, are selectively formed in accordance with the vacuum evaporation method in a thickness of 1,500A to acquire polycrystalline silicon TFT.
  • gate oxide film 43 and passivation oxide film 45 at a low temperature of 260°C prevents gate electrode 44 of aluminum from degradation, and also prevents breakage of glass substrate 40, thus acquiring a highly reliable polycrystalline silicon TFT at a high manufacturing yield " . Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature.
  • the aforesaid silicon oxide film is highly liquid during deposition, and finely coats even extremely rough surfaces without producing defects, increasing the reliability of the polycrystalline TFT.
  • Figure 7 shows a typical cross-sectional view of a staggered type polycrystalline silicon TFT in the fifth sample of the present invention.
  • An outline of the manufacturing process for the polycrystalline silicon TFT is shown below.
  • source electrode 51 and drain electrode 52 consisting of a two layer film of an aluminum and chrome film, are formed selectively on glass substrate 50, made of Corning 7059, in a thickness of 1,500A using the vacuum evaporation method.
  • polycrystalline silicon film 53 is formed onto source electrode 51, drain electrode 52 and glass substrate 50, which is between the electrodes in a thickness of 2,000A in accordance with the CVD method.
  • a silicon oxide film as gate oxide film 54 which coats polycrystalline silicon film 53, source electrode 51 and drain electrode 52 is formed onto the surface of glass substrate 50 which is preheated to 260°C under the aforesaid conditions.
  • gate electrode 55 of an aluminum film is selectively formed in a thickness of 2,000A between source electrode 51 and drain electrode 52 on gate oxide film 54 in accordance with the vacuum evaporation method to acquire a polycrystalline silicon TFT.
  • gate oxide film 54 at a low temperature of 260°C prevents source electrode 51 of aluminum and drain electrode 52 from degradation, and also prevents breakage of glass substrate 50, thus acquiring a highly reliable polycrystalline silicon TFT at a high manufacturing yield. Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature. Furthermore, as described in the first example, the aforesaid silicon oxide film is highly liquid during deposition, and has superior step coverage of even extremely rough surfaces, increasing the reliability of the polycrystalline TFT.
  • FIG 8 shows a typical cross-sectional view of a thin film diode switch system in the sixth sample of the present invention.
  • ITO film 61 as a transparent electrode is formed selectively on glass substrate 60, made of Corning 7059.
  • p-i-n diode structure 83 made of polycrystalline silicon layers is formed in accordance with the plasma CVD method after chrome film 62 is formed onto ITO film 61 in accordance with the vacuum vaporizing method.
  • Chrome film 64 is formed onto n layer, then passivation 65 of a silicon oxide film is formed using the method described above onto the substrate.
  • a connecting wire layer for chrome electrode 66 is selectively formed between each diode in accordance with the vacuum evaporation method as indicated in Figure 8.
  • passivation oxide film 65 in the manufacturing process described above, forming passivation oxide film 65 at a low temperature of 260°C prevents ITO film 61 from degradation, thus acquiring a superior electric property at a high manufacturing yield. Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature.
  • the aforesaid passivation 65 is highly liquid during deposition, and finely coats even extremely rough surfaces without producing voids (defects) , increasing the reliability of the thin fil diode switch.
  • a silicon oxide film is formed onto the surface of glass substrate 10 at 260°C.
  • the temperature can be selected from 100-400°C, or better yet 100-360°C, and the best 150-260°C.
  • a glass substrate is used.
  • silicon, quartz, ceramics, aluminum, stainless steel substrate, etc. can be used, and also resins such as polyester, polyimide and glass epoxy are suitable materials for the substrate material .
  • the shape of the substrate is not limited.
  • silicon oxide film which was formed in accordance with the chemical vapor phase deposition method at a low temperature using trialkoxysilane and ozone for insulator film such as amorphous silicon TFT, polycrystalline silicon TFT and a thin film diode switch, but it is not limited to these usages, as this silicon oxide film can be used as an insulator film for other forms of semiconductor devices such as the amorphous silicon solar battery, or image sensor device.
  • the passivation insulator film made of silicon oxide film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional being formed on the surface of the film semiconductor film increases the reliability of the thin film semiconductor device.
  • the passivation insulator film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional being formed onto the surface of the substrate, dehydrogenation of the amorphous silicon film is prevented, furthermore, degradation of the electrical property of the amorphous silicon film.
  • the formation of the silicon oxide film is conducted under a low temperature, therefore there is no danger of lowering the reliability of the substrate, or the gate electrode film and such due to substantial increase of the heat stress to the gate electrode film or the like.
  • this formed-in-low-heat silicon oxide film has elaborate film quality, and the leak current property is superior.
  • the insulator-gate type thin film semiconductor device with the gate insulator film which is formed at a lower temperature has a superior electrical property as well as being able to generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.
  • the silicon oxide film has a superior step coverage which increases the reliability of the thin film semiconductor device.
  • the temperature range for the chemical vapor deposition is kept between 100-300°C, better yet 150-260°C.
  • the gate insulator film consisting of a silicon oxide film being made in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional, cracks on the substrate or degradation of the film quality of the polycrystalline silicon film or electrode film due to heat stress is controlled, and there is no danger of lowering the reliability of the substrate, gate electrode film and such. Furthermore, this formed-in-low-heat silicon oxide film has superior film quality, and the leak current property is superior, as indicated in Figure 4. As a result, the insulator-gate type thin film semiconductor device with the gate insulator film which is formed at a low temperature has a superior electrical property as well as can generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.
  • the silicon oxide film has a superior step coverage which increases the reliability of the thin film semiconductor device.
  • the formation of either the inter-metal dielectric film or the passivation film consisting of a silicon film made in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than conventional onto the surface of the thin film semiconductor device increases reliability of the thin film semiconductor device.
  • the insulator-gate type thin film semiconductor device with the gate insulator film which is formed at a low temperature has a superior electrical property as well as can generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.

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  • Formation Of Insulating Films (AREA)

Abstract

There is described the formation of a silicon thin film semiconductor device at a low temperature. An aluminum film, as gate electrode (11), is formed selectively on glass substrate (10), made of Corning 7059. Then, gate oxide film (12) is formed on gate electrode (11) in the following manner. A reaction gas, which is created by mixing a mixed gas which was made by bubbling heated triethoxysilane at 45 °C with nitrogen at flow rate of 2.0 liter/min. and 7.5 liter of ozone concentration 4.5 % oxygen with diluting nitrogen gas at 18 liter/min., is lead to the surface of glass substrate (10) which is heated to 250 degrees C to make these gases react with each other to form a silicon oxide film, gate oxide film (12). Amorphous silicon film (13) is formed onto the gate oxide film. A silicon film, channel passivation film (14) is formed onto the amorphous silicon film in the same manner as above. Source electrode (15) and drain electrode (16) are formed from an aluminum film or the like. Due to the low temperature formation of the silicon oxide film, high reliability of the glass substrate and amorphous silicon film is maintained.

Description

A THIN FILM SEMICONDUCTOR DEVICE AND METHOD
Brief Description of the Invention
The present invention relates to a thin film semiconductor device, and more particularly, to a thin film semiconductor device which consists of silicon oxide films such as a gate insulator film, inter-metal dielectric film, and passivation insulator film which are formed on the surface of a glass substrate or the like kind.
Background of the Invention
Conventionally, formation of a silicon oxide film in this type of thin film semiconductor device is achieved by forming a silicon film onto a semiconductor wafer using the reaction of trialkoxysilane and ozone in the temperature range between 300-500°C, as described in the Japanese Early Patent Disclosure 62-42536, for example. However, it is difficult to form a film using this technique at 300°C or below. In the case of film formation on a silicon substrate for example, even a 400°C range causes problems for practical use due to uneven film quality.
Particularly, a thin film semiconductor device using a glass substrate requires treatment at a low temperature to avoid breakage of the glass substrate, cracking, break in conductor, or stress migration on the thin film caused by a stress occurring between the glass substrate and film. Therefore, the silicon oxide film which constructs a gate insulator film and the like must be formed at a low temperature. In addition, in the case of a thin film semiconductor device using amorphous silicon film, formation of a gate silicon oxide or the like is preferred to be conducted at 300°C or below because the electrical property of the thin film semiconductor device degrades due to elimination of hydrogen from the amorphous silicon film at a high temperature.
Furthermore, during the formation of a silicon oxide film, film formation of superior step coverage, which well covers the uneven surface of the substrate, associated with miniaturization of the semiconductor device is needed.
Silicon oxide films produced according to the technique described above, give rise to problems such as reduction in the property of the thin film -semiconductor device as well as in productivity due to inconsistent film quality and increased heat stress which is imposed upon the glass substrate, electrode films and the like during film formation.
Objects and Summary of the Invention
It is a general object of the present invention to solve the problems described above, and provide a superior thin film semiconductor device consisting of a silicon oxide film of a superior step coverage as well as consistent film quality using a low temperature formation.
It is another object of the present invention to provide a method of forming their dielectric or insulating films by the chemical vapor deposition of trialkoxysilane and ozone at temperatures between 100-400°C.
A main characteristic of the present invention is the placement of an amorphous silicon film, a gate insulator film which was formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, a gate electrode film located on top or under the aforesaid gate insulator film, a source electrode film and a drain electrode film all formed on a substrate.
Another main characteristic of the present invention is the placement of a passivation film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone in the thin film semiconductor device of the aforesaid Claim 1.
Another main characteristic of the present invention is the placement of a primary electrode film, a multi-layered amorphous silicon film, a passivation insulator film for the aforesaid amorphous silicon film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, and a secondary electrode film.
Another main characteristic of the present invention is that the deposition temperatures of each insulator film in the aforementioned thin film semiconductor device are between 100-300°C.
Another main characteristic of the present invention is the placement of a polycrystalline silicon film, a gate insulator film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a low temperature, a gate electrode film located on top or under the aforesaid gate insulator film, a source electrode film and a drain electrode film all formed on a substrate.
Another main characteristic of the present invention is the placement of either an inter-metal dielectric film or a passivation insulator film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone. Another main characteristic of the present invention is the placement of a primary electrode film, a polycrystalline silicon film, a passivation insulator film for the aforesaid crystal silicon film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, and a secondary electrode film.
Another main characteristic of the present invention is that the deposition temperatures of each insulator film in the aforementioned thin film semiconductor device are between 100-400°C.
Brief Description of the Drawings
The foregoing and other objects of the invention will be more clearly understood from the following detailed description when read in conjunction with the accompanying drawings, wherein:
Figure 1 is a typical cross-sectional view of a reverse staggered type amorphous silicon thin film transistor in the first sample of the present invention.
Figure 2 is a typical cross-sectional view of a staggered type amorphous silicon TFT in the first sample of the present invention.
Figure 3 is a typical cross-sectional view of a thin film diode ring system in the third sample of the present invention.
Figure 4 is a graph showing leak current characteristics of the silicon oxide film which is formed at a low temperature in accordance with the chemical vapor phase deposition method using triethoxysilane and ozone.
Figure 5 is a cross-sectional view of the rough surface of the surface of the substrate of the aforesaid silicon oxide film showing the gap-filling capability of the silicon oxide film.
Figure 6 is a typical cross-sectional view of a planar type polycrystalline silicon thin film transistor in the fourth sample of the present invention.
Figure 7 is a typical cross-sectional view of a staggered type polycrystalline silicon thin film transistor in the fifth sample of the present invention.
Figure 8 is a typical cross-sectional view of a thin film diode switch system in the sixth sample of the present invention.
Description of Preferred Embodiment (s)
In the present invention, the trialkoxysilane preferably contains an alkoxide base of 1-4 carbons, more particularly, trimethoxysilane, triethoxysilane, tri-n-propoxysilane, triisopropoxysilane , tri -n-butoxysilane , tri-sec-butoxysilane , triisobutoxysilane , tri-tert-butoxysilane can be used. However, triethoxysilane is the most preferable. It is most common to have a trialkoxysilane bubble with inert gas such as helium, argon and nitrogen to vaporize it to supply into the reaction system, or supply it with diluted gas such as the aforesaid inert gas after it was vaporized by heat.
Ozone, which is the other reaction gas, is commonly supplied into the reaction group after it is diluted with oxygen. The ozone concentration should not exceed 10 wt%, and 3-7 wt% is the best.
The supplement ratio of the ozone and trialkoxysilane to the reaction group should be 1 mol of trialkoxysilane to 0.5-10 mols of ozone, preferably 1-5 mols. If too much ozone exists, icroparticles in the gas phase become aggressive, and then to attach to the substrate. On the other hand, if too little ozone exists, the reaction speed becomes slow, making it impractical .
The best material for the aforementioned substrate is silicon, quartz, ceramic, aluminum, stainless steel, as well as glass or different types of resins such as polyester, polyimide, and glass epoxy, but glass is the best. The shape of the substrate is not particularly limited to a certain shape.
Formation of a gate insulator film consisting of a silicon oxide film on the substrate using trialkoxysilane and ozone in accordance with the chemical vapor deposition technique at a lower temperature than the conventional way prevented dehydrogenation of the amorphous silicon film, which furthermore prevented degradation of the electrical property of the amorphous silicon film. The formation of the silicon oxide film is conducted under a low temperature, therefore there is no danger of lowering the reliability of the substrate, or the gate electrode film and such due to substantial increase of the heat stress to the gate electrode film or the like. In addition, this formed-in- low-heat silicon oxide film has a superior film quality, and the leak current property is superior, as indicated in Figure 4.
As a result, the insulator-gate type thin film semiconductor device with the gate insulator film formed at a low temperature has a superior electrical property as well as being able to generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.
The silicon oxide film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone is highly liquid, and finely coats the rough surface without producing defects, increasing the reliability of the thin film semiconductor device.
The first example of a device formed in accordance with the present invention is explained below with reference to the Figures. Figure 1 shows a typical cross-sectional view of a reverse staggered type amorphous silicon thin film transistor (abbreviated as amorphous silicon TFT) in the first sample of the present invention. An outline of the manufacturing process for the amorphous silicon TFT follows.
First, an aluminum film, as gate electrode 11, is formed selectively on glass substrate 10, made of Corning 7059, in a thickness of 1,000A using vacuum evaporation.
Then, gate oxide film 12 is formed on gate electrode 11 by creating a reaction gas by mixing a mixed gas which was made by bubbling heated triethoxysilane at 45°C with nitrogen at a flow rate of 2.0 liter/min. and 7.5 liter of ozone concentration 4.5% oxygen with diluting nitrogen gas at 18 liter/min. This reaction gas is led to the surface of glass substrate 10 which is heated to 250°C to make triethoxysilane and ozone within the mixed gas react with each other to form silicon oxide film 12 in a thickness of approximately 1,000A on glass substrate 10. Silicon oxide film 12 is formed at a low temperature of 250°C. However, Figure 4 shows a good leakage current of 10"6 A/mm2 when lMV/cm of an electric field is imposed on it.
Then amorphous silicon film 13 is selectively formed in a thickness of 2,000A onto the location of gate electrode 11 on the surface of silicon oxide film 12 according to the plasma CVD method under the condition of 280°C glass substrate temperature, disilane 2cc/min., and hydrogen 40cc/min. Silicon film 14 for channel protection is selectively formed onto the location of gate electrode 11 on the surface of silicon oxide film 12 under the same conditions as the aforesaid gate oxide film 12. Source electrode 15 and drain electrode 16 consisting of a chrome film and an aluminum film respectively are selectively formed onto amorphous silicon film 13, sandwiching silicon oxide film 14 in the thickness of 1,500A using the vacuum evaporation method, acquiring amorphous silicon TFT.
In the above manufacturing process, since gate oxide film 12 and silicon oxide film 15 for channel protection were formed at a low temperature of 250°C, the film qualities are good as well as there is no degradation of aluminum gate electrode 11 due to heat stress. Also, the amorphous silicon TFT has an excellent electric property due to the fact that the electric property of the amorphous silicon film is kept normal by preventing dehydrogenation of amorphous silicon film 13, thus is manufactured with a high yield. In addition, forming a silicon oxide film at a low temperature reduces the manufacturing costs compared to the conventional method.
The silicon oxide film which is formed in accordance with the chemical vapor deposition method using trialkoxysilane and ozone is highly liquid, and finely coats the rough surface without producing defects, increasing the reliability of the amorphous silicon TFT. In other words, as indicated in Figure 5 when the aforesaid silicon oxide film S is formed onto insulator film I in a fine pattern, then its cross-section is etched with a 1% HF fluid with no pores, indicating the roughness of the film, and are formed in silicon oxide film S.
In addition, the etching speed at a film-forming temperature of 250°C for silicon oxide film is 2,000A/min. (1% HF fluid) , and it was confirmed that the etching speed depends on the film forming temperature, the lower the film forming temperature, the faster the etching speed was. Therefore, a desired etching speed can be acquired by setting the proper etching conditions. Figure 2 shows a typical cross-sectional view of another staggered type amorphous silicon TFT in accordance with the present invention. An outline of the manufacturing process for the amorphous silicon TFT includes selectively forming on glass substrate 20, Corning 7059, to a thickness of 1,000A using the vacuum evaporation method. Passivation oxide film 22 is formed onto the surface of glass substrate 20 which was heated to 250°C in a thickness of 2,000A under the conditions described above. Source electrode 23 and drain electrode 24 made with two layers of a chrome film and aluminum film are selectively formed in a thickness of 1,500A onto the surface of passivation film 22 which is on shield film 21. Amorphous silicon film 25 is selectively formed onto passivation oxide film 22, source electrode 23 and drain electrode 24 according to the plasma CVD method in a thickness of 2,000A. Then gate oxide 26 is selectively formed in a thickness of 2,000A onto the surface of glass substrate 20 which was heated to 250°C under the aforesaid silicon oxide film formation conditions. In addition, gate electrode 27 of an aluminum film is selectively formed in a thickness of 1,500A between source electrode 23 and drain electrode 24 on gate oxide film 26 in accordance with the vacuum evaporation method.
In the manufacturing process described above, forming gate oxide film 26 at a low temperature of 250°C prevents source electrode 23 and drain electrode 24 of aluminum from degradation, and also prevents dehydrogenation of amorphous silicon film 25, thus maintaining the normal electric property of amorphous silicon film, amorphous silicon TFT has good electric property, and can generate a high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced, since the formation of the silicon oxide film is conducted at a low temperature.
In addition, as described in the first example, the passivation oxide film has a good fluidity, and finely coats even extremely rough surface without producing defects, increasing the reliability of the amorphous Si TFT.
Figure 3 shows a typical cross-sectional view of a thin film diode ring system in the third sample of the present invention. An outline of the manufacturing process for the thin film diode ring system is shown below. First, ITO film 31 as a transparent electrode is formed selectively on glass substrate 30, made of Corning 7059. Then, p-i-n diode structure 33 made of polycrystalline silicon layers is formed in accordance with the plasma CVD method after chrome film 32 is formed onto ITO film 31 in accordance with the vacuum vaporizing method. Chrome film 34 is formed onto n layer, then passivation oxide film 35 of a silicon oxide film is formed using the method described above onto the substrate. Furthermore, a connecting wire layer for chrome electrode 36 is selectively formed between each diode in accordance with the vacuum evaporation method as indicated in Figure 3.
In the manufacturing process described above, forming passivation oxide film 35 at a low temperature of 250°C prevents ITO film 31 from degradation, thus acquiring a superior electric property at a high manufacturing yield. Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature.
Furthermore, as described in the first example the aforesaid passivation 65 has a good fluidity during deposition, and finely coats even extremely rough surfaces without producing defects, increasing the reliability of the thin film diode ring.
In the first and third examples, a silicon oxide film is formed onto the surface of glass substrate 10 at 250°C. However, the temperature can be selected from 100-300°C, or preferably 150-260°C. Figure 6 shows a typical cross-sectional view of a planar type polycrystalline silicon thin film transistor (abbreviated as polycrystalline silicon TFT) in the fourth sample of the present invention. An outline of the manufacturing process for the polycrystalline silicon TFT is shown below. First, polycrystalline film 41 is formed selectively on glass substrate 40, made of Corning 7059, in a thickness of 2,000A using the CVD method. Then, inter-metal dielectric film 42 which coats polycrystalline silicon 41 is formed selectively onto the surface of glass substrate 10 which was heated to 260°C in accordance with the aforesaid silicon oxide film formation method. Then, gate oxide film 43 made of the same silicon oxide film is selectively formed onto the center of polycrystalline silicon film 41. An aluminum film such as gate electrode 44 is formed in a thickness of 2,000A onto gate oxide film 43 in accordance with the vacuum evaporation method. Then passivation oxide film 45, which covers gate electrode 44, is formed onto the surface of glass substrate 10 which was heated to 260°C under the conditions of the above-mentioned gate oxide film formation.
Furthermore, source electrode 46 and drain electrode 47, which are made of aluminum films, are selectively formed in accordance with the vacuum evaporation method in a thickness of 1,500A to acquire polycrystalline silicon TFT.
In the manufacturing process described above, forming gate oxide film 43 and passivation oxide film 45 at a low temperature of 260°C prevents gate electrode 44 of aluminum from degradation, and also prevents breakage of glass substrate 40, thus acquiring a highly reliable polycrystalline silicon TFT at a high manufacturing yield". Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature.
Furthermore, as described in the first example, the aforesaid silicon oxide film is highly liquid during deposition, and finely coats even extremely rough surfaces without producing defects, increasing the reliability of the polycrystalline TFT.
The fifth sample process of the present invention is explained below using figures. Figure 7 shows a typical cross-sectional view of a staggered type polycrystalline silicon TFT in the fifth sample of the present invention. An outline of the manufacturing process for the polycrystalline silicon TFT is shown below. First, source electrode 51 and drain electrode 52 consisting of a two layer film of an aluminum and chrome film, are formed selectively on glass substrate 50, made of Corning 7059, in a thickness of 1,500A using the vacuum evaporation method. Then, polycrystalline silicon film 53 is formed onto source electrode 51, drain electrode 52 and glass substrate 50, which is between the electrodes in a thickness of 2,000A in accordance with the CVD method. A silicon oxide film as gate oxide film 54 which coats polycrystalline silicon film 53, source electrode 51 and drain electrode 52 is formed onto the surface of glass substrate 50 which is preheated to 260°C under the aforesaid conditions. Finally, gate electrode 55 of an aluminum film is selectively formed in a thickness of 2,000A between source electrode 51 and drain electrode 52 on gate oxide film 54 in accordance with the vacuum evaporation method to acquire a polycrystalline silicon TFT.
In the manufacturing process described above, forming gate oxide film 54 at a low temperature of 260°C prevents source electrode 51 of aluminum and drain electrode 52 from degradation, and also prevents breakage of glass substrate 50, thus acquiring a highly reliable polycrystalline silicon TFT at a high manufacturing yield. Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature. Furthermore, as described in the first example, the aforesaid silicon oxide film is highly liquid during deposition, and has superior step coverage of even extremely rough surfaces, increasing the reliability of the polycrystalline TFT.
Figure 8 shows a typical cross-sectional view of a thin film diode switch system in the sixth sample of the present invention. An outline of the manufacturing process for the thin film diode switch system is shown below. First, ITO film 61 as a transparent electrode is formed selectively on glass substrate 60, made of Corning 7059. Then, p-i-n diode structure 83 made of polycrystalline silicon layers is formed in accordance with the plasma CVD method after chrome film 62 is formed onto ITO film 61 in accordance with the vacuum vaporizing method. Chrome film 64 is formed onto n layer, then passivation 65 of a silicon oxide film is formed using the method described above onto the substrate. Furthermore, a connecting wire layer for chrome electrode 66 is selectively formed between each diode in accordance with the vacuum evaporation method as indicated in Figure 8.
In the manufacturing process described above, forming passivation oxide film 65 at a low temperature of 260°C prevents ITO film 61 from degradation, thus acquiring a superior electric property at a high manufacturing yield. Also the manufacturing cost is reduced since the formation of the silicon oxide film is conducted at a low temperature.
Furthermore, as describe in the first example, the aforesaid passivation 65 is highly liquid during deposition, and finely coats even extremely rough surfaces without producing voids (defects) , increasing the reliability of the thin fil diode switch.
In the fourth and sixth examples, a silicon oxide film is formed onto the surface of glass substrate 10 at 260°C. However, the temperature can be selected from 100-400°C, or better yet 100-360°C, and the best 150-260°C.
In the first and sixth examples, a glass substrate is used. However it is not limited to the glass substrate, but silicon, quartz, ceramics, aluminum, stainless steel substrate, etc. can be used, and also resins such as polyester, polyimide and glass epoxy are suitable materials for the substrate material . The shape of the substrate is not limited.
In the first and sixth examples, an example was given using silicon oxide film which was formed in accordance with the chemical vapor phase deposition method at a low temperature using trialkoxysilane and ozone for insulator film such as amorphous silicon TFT, polycrystalline silicon TFT and a thin film diode switch, but it is not limited to these usages, as this silicon oxide film can be used as an insulator film for other forms of semiconductor devices such as the amorphous silicon solar battery, or image sensor device.
In the aforesaid invention, the passivation insulator film made of silicon oxide film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional being formed on the surface of the film semiconductor film increases the reliability of the thin film semiconductor device.
In the aforesaid invention, the passivation insulator film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional being formed onto the surface of the substrate, dehydrogenation of the amorphous silicon film is prevented, furthermore, degradation of the electrical property of the amorphous silicon film. In addition, the formation of the silicon oxide film is conducted under a low temperature, therefore there is no danger of lowering the reliability of the substrate, or the gate electrode film and such due to substantial increase of the heat stress to the gate electrode film or the like. Furthermore, this formed-in-low-heat silicon oxide film has elaborate film quality, and the leak current property is superior.
As a result, the insulator-gate type thin film semiconductor device with the gate insulator film which is formed at a lower temperature has a superior electrical property as well as being able to generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.
In addition, the silicon oxide film has a superior step coverage which increases the reliability of the thin film semiconductor device.
In the aforesaid invention, the temperature range for the chemical vapor deposition is kept between 100-300°C, better yet 150-260°C.
In the aforesaid invention, due to the formation of the gate insulator film consisting of a silicon oxide film being made in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional, cracks on the substrate or degradation of the film quality of the polycrystalline silicon film or electrode film due to heat stress is controlled, and there is no danger of lowering the reliability of the substrate, gate electrode film and such. Furthermore, this formed-in-low-heat silicon oxide film has superior film quality, and the leak current property is superior, as indicated in Figure 4. As a result, the insulator-gate type thin film semiconductor device with the gate insulator film which is formed at a low temperature has a superior electrical property as well as can generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.
In addition, as indicated in the effects of Claim 1, because the silicon oxide film has a superior step coverage which increases the reliability of the thin film semiconductor device.
In the aforesaid invention, the formation of either the inter-metal dielectric film or the passivation film consisting of a silicon film made in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than conventional onto the surface of the thin film semiconductor device increases reliability of the thin film semiconductor device.
In the aforesaid invention, due to the formation of the passivation film being made in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a lower temperature than is conventional, cracks on the substrate or degradation of the film quality of the polycrystalline silicon film or electrode film due to heat stress is controlled, and there is no danger of lowering the reliability of the substrate, or gate electrode film and such. Furthermore, this formed-in-low-heat silicon oxide film has superior film quality, and the leak current property is superior as Figure 4 indicates .
As a result, the insulator-gate type thin film semiconductor device with the gate insulator film which is formed at a low temperature has a superior electrical property as well as can generate high manufacturing yield. Also the manufacturing cost for the thin film semiconductor device can be reduced since the formation of the silicon oxide film is conducted at a low temperature.

Claims

HAT IS CLAIMED:
1. A thin film semiconductor device, comprising an amorphous silicon film, a gate insulator film which is formed by chemical vapor deposition using trialkoxysilane and ozone at a low temperature, a gate electrode film located on top or under the aforesaid gate insulator film, a source electrode film and a drain electrode film all formed on a substrate.
2. A thin film semiconductor device of Claim 1 including a passivation insulator film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone.
3. A thin film semiconductor device comprising a primary electrode film, a multi-layered amorphous silicon film, a passivation insulator film for the aforesaid amorphous silicon film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, and a secondary electrode film.
4. A thin film semiconductor device, wherein the deposition temperatures of each insulator film in the aforementioned thin film semiconductor device of Claim 1 and 3 are between 100-300°C.
5. A thin film semiconductor device, comprising a polycrystalline silicon film, a gate insulator film which is formed in accordance with the chemical vapor deposition using trialkoxysilane and ozone at a low temperature, a gate electrode film located on top or under the aforesaid gate insulator film, a source electrode film and a drain electrode film all formed on a substrate.
6. A thin film semiconductor device of Claim 5, which consists of either an inter-metal dielectric film or a passivation insulator film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone.
7. A thin film semiconductor device, comprising a primary electrode film, a multi-layered polycrystalline silicon film, a passivation insulator film for the aforesaid crystal silicon film which is formed in accordance with the chemical vapor deposition method at a low temperature using trialkoxysilane and ozone, and a secondary electrode film.
8. A thin film semiconductor device, wherein the deposition temperatures of each insulator film in the aforementioned thin film semiconductor device of Claim 5 and 7 are between 100-400°C.
9. The method of forming a thin insulating film comprising depositing the thin film by chemical vapor deposition from an atmosphere comprising trialkoxysilane and ozone at a temperature between 100-400°C.
PCT/US1994/001352 1993-02-04 1994-02-04 A thin film semiconductor device and method WO1994018702A1 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4845054A (en) * 1985-06-14 1989-07-04 Focus Semiconductor Systems, Inc. Low temperature chemical vapor deposition of silicon dioxide films

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4845054A (en) * 1985-06-14 1989-07-04 Focus Semiconductor Systems, Inc. Low temperature chemical vapor deposition of silicon dioxide films

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
H. KOTANI et al., "Low-Temperarure APCVD Oxide Using TEOS-Ozone Chemistry for Multilevel Interconnections", IEDM 1989, page 669-672. *

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