WO1994013059A1 - Current mirror arrangement - Google Patents
Current mirror arrangement Download PDFInfo
- Publication number
- WO1994013059A1 WO1994013059A1 PCT/FI1993/000506 FI9300506W WO9413059A1 WO 1994013059 A1 WO1994013059 A1 WO 1994013059A1 FI 9300506 W FI9300506 W FI 9300506W WO 9413059 A1 WO9413059 A1 WO 9413059A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- current
- signal path
- resistor
- path
- semiconductor switch
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—Dc amplifiers in which all stages are dc-coupled
- H03F3/343—Dc amplifiers in which all stages are dc-coupled with semiconductor devices only
Definitions
- the invention relates to a current mirror arrangement for monitoring a bidirectional current flow- ing in a signal path, said arrangement comprising a first semiconductor switch comprising a control electrode and main current path electrodes, the current of said control electrode being arranged to control the current flowing through said main current path electrodes, a resistor arranged between the control electrode and the signal path, a resistor arranged between a main current path electrode and the signal path, and a resistor arranged in the signal path.
- a current mirror is a device which generates a certain output current as a function of an input current.
- a current mirror arrangement can be used in all electronic devices which require bidirectional current mirroring. Current mirroring is needed, for example, in the examination of the current of signalling conductors in analog telephone exchanges.
- information on a current flowing in a monitored conductor can be transferred, for example, to a certain resistor from which it is examined, for example by means of a comparator, whether the current flowing in the conductor concerned is greater than a given limit value.
- the known current mirrors require thus separate arrangements for the measurement of currents flowing in different direc ⁇ tions.
- the known solutions comprise, for example, a transistor the base and emitter of which are coupled to the conductor to be measured, i.e. the signal path, by means of resistors.
- the signal path is provided with a measuring resistor, and a diode is coupled over the base-emitter junction in order that a current flowing in the other direction would not cause overvoltage in this junction.
- An alternative solution is wide voltage division which is implemented with resistors and to which a comparator, for example, is coupled.
- the object of the invention is to provide a new type of current mirror arrangement by means of which the problems associated with the known solutions can be avoided.
- a current mirror arrange ⁇ ment of the invention which is characterized in that the arrangement further comprises a second semiconductor switch which is known per se and comprises a control electrode and main current path electrodes, that the control electrode of the second semiconductor switch is coupled to that main current path electrode of the first semiconductor switch which is coupled through the resistor to the signal path, that a main current path electrode of the second semiconductor switch is coupled to the control electrode of the first semiconductor switch and through the resistor to the signal path, and that certain other main current path electrodes of each semiconductor switch are coupled together.
- the current mirror arrangement of the invention is based on the idea that by suitable coupling of the second semiconductor switch it is possible to achieve a so-called bipolar current mirror.
- the solution according to the present invention has several advantages, as the arrangement of the inven- tion is capable of bipolar measuring, i.e. it can measure a current irrespective of its direction. In addition, the new arrangement does not require protect ⁇ ing diodes. In the following, the invention will be described in greater detail with reference to the accom ⁇ panying drawing, in which
- Figure 1 illustrates a current mirror arrange ⁇ ment of the invention.
- a current mirror arrangement is disposed in connection with a monitored signal path 1.
- the signal path may be, for example, a DC signalling conductor in an analog telephone exchange.
- the current mirror arrangement comprises a first semiconductor switch 2 comprising a control electrode 3 and main current path electrodes 4 and 5.
- the switch is preferably an NPN semiconductor tran ⁇ sistor, as in the figure, or a PNP semiconductor tran- sistor.
- the control electrode 3 refers to a base B
- the main current path electrodes 4 and 5 refer to an emitter E and a collector C.
- the current of the control electrode 3 controls the current, flowing through the main current path electrodes 4 and 5, i.e. the measuring current I m in the figure, which is a function of the current I x of the signal path.
- the arrangement further comprises a resistor Rl coupled between the control electrode 3 of the first transistor, or semiconductor switch 2, and the signal path 1.
- the arrangement comprises a resistor R3 coupled between a main current path electrode, or emitter 4, and the signal path 1, and a resistor R2, or measuring resistor, coupled in the signal path 1.
- the current mirror arrangement further com ⁇ prises a second semiconductor switch 6 which is known per se and which is preferably a transistor as the first semiconductor switch 2.
- the second semiconductor switch naturally comprises a control electrode 7, or a base B, and main current path electrodes 8 and 9, or an emitter E and a collector C.
- the control electrode 7 of the second semi ⁇ conductor switch 6 is coupled to that main current path electrode 4, or emitter, of the first semiconductor switch 2 which is coupled through a resistor R3 to the signal path 1.
- a main current path electrode, or emitter 8, of the second semiconductor switch 5 is coupled to the control electrode 3, or base B, of the first semiconductor switch 2, and via the resistor Rl to the signal path.
- certain other main current path electrodes 5 and 9, i.e. collectors C in practice, of each semiconductor switch 2 and 6 are coupled together.
- the aim of the resistor R2, or measuring resistor is to provide a difference of voltage over the resistor, by means of which voltage difference a current is generated to either one of the transistors 2 and 6, depending on the direction of the current I x in the signal path.
- the collectors of the transistors are coupled together in a collector line, or measuring current line J.
- the measuring current line comprises a resistor R4.
- a measuring current I n is generated by a voltage source U(s) when the transistor 2 switches on the current as it receives a control signal to its control electrode, or base B.
- the measuring current line J, or collector line conducts a current which provides an equilibrium.
- the ratio between the resistors R2 and R3 determines the current transfer coefficient between the currents I x and I B .
- the voltage U(s) is higher than the voltage U(x) of the signal path when NPN transistors are concerned and vice versa when PNP transistors are concerned.
- the resistor R2 in the signal path 1 and the resistor Rl which connects the main current path electrode 8, or emitter E, of the second semiconductor switch 6 to the signal path 1 are arranged to connect the current I m in the measuring current line J, or collector line, common to the semiconductor switches 2 and 6 through the main current electrodes 4 and 5 of the first semiconductor switch 2.
- the transistor 6 receives the control current from point (b) via R3 to its control electrode 7, or base B, where- by the collector line, or measuring current line J, is coupled.
- the main current electrodes 5 and 9, now collectors C, of the semicon ⁇ ductor switches, or transistors 2 and 6, are coupled together in the measuring current line J.
- the resistor R2 in the signal path 1 and the resistor R3 which connects the main current path electrode 4, or emitter E, of the first semiconductor switch 2 to the signal path 1 are arranged to connect the current I m in the measuring current line J by means of the control electrode 7 of the second semiconductor switch through the main current electrodes 8 and 9 of the second semi ⁇ conductor switch.
- the semiconductor switches 2 and 6 are substantially analogous, and the resistances of the resistors Rl and R3 which connect the main current electrodes 4 and 8 of the semiconductor switches 2 and 6 to the signal path 1 are substantially of the same magnitude.
- This embodi ⁇ ment simplifies the coupling. It is .essential in the solution of the inven ⁇ tion that in the signal path 1, e.g. in a signalling circuit, the same current I ra can be used to express the current I x irrespective of its direction. It is essen ⁇ tial to the operation that the current flowing in the measuring resistor R2 causes a voltage drop between the resistors Rl and R3. Depending on the direction of the current I x , the voltage U(R2) of the measuring resistor R2 exceeds the base-emitter voltage of either one of the transistors, whereby the measuring current I n of the collector line flows through this transistor.
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP94900838A EP0671075A1 (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
DE4396116T DE4396116T1 (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
GB9510896A GB2288093B (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
AU55643/94A AU5564394A (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
SE9502019A SE516351C2 (en) | 1992-11-30 | 1995-06-01 | A current mirror arrangement |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI925449 | 1992-11-30 | ||
FI925449A FI93062C (en) | 1992-11-30 | 1992-11-30 | A current mirror |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1994013059A1 true WO1994013059A1 (en) | 1994-06-09 |
Family
ID=8536297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FI1993/000506 WO1994013059A1 (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP0671075A1 (en) |
AU (1) | AU5564394A (en) |
DE (1) | DE4396116T1 (en) |
FI (1) | FI93062C (en) |
GB (1) | GB2288093B (en) |
SE (1) | SE516351C2 (en) |
WO (1) | WO1994013059A1 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0029135A1 (en) * | 1979-11-16 | 1981-05-27 | Licentia Patent-Verwaltungs-GmbH | Impedance circuit with adjustable resistance value |
DE3628922A1 (en) * | 1986-08-26 | 1988-03-03 | Ackermann Albert Gmbh Co | Circuit arrangement for connecting two or more telephone sets to one subscriber line |
-
1992
- 1992-11-30 FI FI925449A patent/FI93062C/en not_active IP Right Cessation
-
1993
- 1993-11-30 DE DE4396116T patent/DE4396116T1/en not_active Withdrawn
- 1993-11-30 GB GB9510896A patent/GB2288093B/en not_active Expired - Fee Related
- 1993-11-30 EP EP94900838A patent/EP0671075A1/en not_active Withdrawn
- 1993-11-30 WO PCT/FI1993/000506 patent/WO1994013059A1/en active Application Filing
- 1993-11-30 AU AU55643/94A patent/AU5564394A/en not_active Abandoned
-
1995
- 1995-06-01 SE SE9502019A patent/SE516351C2/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0029135A1 (en) * | 1979-11-16 | 1981-05-27 | Licentia Patent-Verwaltungs-GmbH | Impedance circuit with adjustable resistance value |
DE3628922A1 (en) * | 1986-08-26 | 1988-03-03 | Ackermann Albert Gmbh Co | Circuit arrangement for connecting two or more telephone sets to one subscriber line |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN, Vol. 15, No. 323, E-1101; & JP,A,03 119 812 (TOSHIBA CORP.), 22 May 1991 (22.05.91), Abstract. * |
Also Published As
Publication number | Publication date |
---|---|
FI925449A (en) | 1994-05-31 |
FI93062C (en) | 1995-02-10 |
DE4396116T1 (en) | 1995-12-21 |
EP0671075A1 (en) | 1995-09-13 |
SE9502019L (en) | 1995-06-01 |
SE9502019D0 (en) | 1995-06-01 |
GB2288093B (en) | 1996-11-20 |
SE516351C2 (en) | 2001-12-17 |
GB2288093A (en) | 1995-10-04 |
FI93062B (en) | 1994-10-31 |
GB9510896D0 (en) | 1995-08-02 |
FI925449A0 (en) | 1992-11-30 |
AU5564394A (en) | 1994-06-22 |
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