GB2288093A - Current mirror arrangement - Google Patents

Current mirror arrangement

Info

Publication number
GB2288093A
GB2288093A GB9510896A GB9510896A GB2288093A GB 2288093 A GB2288093 A GB 2288093A GB 9510896 A GB9510896 A GB 9510896A GB 9510896 A GB9510896 A GB 9510896A GB 2288093 A GB2288093 A GB 2288093A
Authority
GB
United Kingdom
Prior art keywords
signal path
current mirror
current
path
mirror arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9510896A
Other versions
GB9510896D0 (en
GB2288093B (en
Inventor
Jarmo Loukusa
Kauko Varanka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Publication of GB9510896D0 publication Critical patent/GB9510896D0/en
Publication of GB2288093A publication Critical patent/GB2288093A/en
Application granted granted Critical
Publication of GB2288093B publication Critical patent/GB2288093B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

The invention relates to a current mirror arrangement for monitoring a bidirectional current in a signal path. The arrangement comprises a first semiconductor switch (2) with a control electrode (3) and main current path electrodes (4, 5). The arrangement further comprises a resistor (R1) arranged between the control electrode (3) and the signal path (1), a resistor (R3) arranged between a main current path electrode (4) and the signal path (1), and a resistor (R2) arranged in the signal path (1). The current mirror arrangement further comprises a second semiconductor switch (6) which comprises a control electrode (7) and main current path electrodes (8, 9) connected to the first semiconductor switch (2) in the signal path (1) to implement a bipolar current mirror function irrespective of the direction of the current (1x) in the signal path (1). <IMAGE>
GB9510896A 1992-11-30 1993-11-30 Current mirror arrangement Expired - Fee Related GB2288093B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI925449A FI93062C (en) 1992-11-30 1992-11-30 A current mirror
PCT/FI1993/000506 WO1994013059A1 (en) 1992-11-30 1993-11-30 Current mirror arrangement

Publications (3)

Publication Number Publication Date
GB9510896D0 GB9510896D0 (en) 1995-08-02
GB2288093A true GB2288093A (en) 1995-10-04
GB2288093B GB2288093B (en) 1996-11-20

Family

ID=8536297

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9510896A Expired - Fee Related GB2288093B (en) 1992-11-30 1993-11-30 Current mirror arrangement

Country Status (7)

Country Link
EP (1) EP0671075A1 (en)
AU (1) AU5564394A (en)
DE (1) DE4396116T1 (en)
FI (1) FI93062C (en)
GB (1) GB2288093B (en)
SE (1) SE516351C2 (en)
WO (1) WO1994013059A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029135A1 (en) * 1979-11-16 1981-05-27 Licentia Patent-Verwaltungs-GmbH Impedance circuit with adjustable resistance value
DE3628922A1 (en) * 1986-08-26 1988-03-03 Ackermann Albert Gmbh Co Circuit arrangement for connecting two or more telephone sets to one subscriber line

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029135A1 (en) * 1979-11-16 1981-05-27 Licentia Patent-Verwaltungs-GmbH Impedance circuit with adjustable resistance value
DE3628922A1 (en) * 1986-08-26 1988-03-03 Ackermann Albert Gmbh Co Circuit arrangement for connecting two or more telephone sets to one subscriber line

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Patent Abstracts of Japan, Vol 15, No 323, E-1101, abstract of JP,A,3-119812 (TOSHIBA CORP) 22.5.91 *

Also Published As

Publication number Publication date
FI925449A0 (en) 1992-11-30
FI93062C (en) 1995-02-10
SE9502019L (en) 1995-06-01
GB9510896D0 (en) 1995-08-02
FI925449A (en) 1994-05-31
WO1994013059A1 (en) 1994-06-09
DE4396116T1 (en) 1995-12-21
FI93062B (en) 1994-10-31
EP0671075A1 (en) 1995-09-13
SE516351C2 (en) 2001-12-17
SE9502019D0 (en) 1995-06-01
GB2288093B (en) 1996-11-20
AU5564394A (en) 1994-06-22

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20051130