AU5564394A - Current mirror arrangement - Google Patents
Current mirror arrangementInfo
- Publication number
- AU5564394A AU5564394A AU55643/94A AU5564394A AU5564394A AU 5564394 A AU5564394 A AU 5564394A AU 55643/94 A AU55643/94 A AU 55643/94A AU 5564394 A AU5564394 A AU 5564394A AU 5564394 A AU5564394 A AU 5564394A
- Authority
- AU
- Australia
- Prior art keywords
- current mirror
- mirror arrangement
- arrangement
- current
- mirror
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—DC amplifiers in which all stages are DC-coupled
- H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Measurement Of Current Or Voltage (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI925449 | 1992-11-30 | ||
FI925449A FI93062C (en) | 1992-11-30 | 1992-11-30 | A current mirror |
PCT/FI1993/000506 WO1994013059A1 (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
Publications (1)
Publication Number | Publication Date |
---|---|
AU5564394A true AU5564394A (en) | 1994-06-22 |
Family
ID=8536297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU55643/94A Abandoned AU5564394A (en) | 1992-11-30 | 1993-11-30 | Current mirror arrangement |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP0671075A1 (en) |
AU (1) | AU5564394A (en) |
DE (1) | DE4396116T1 (en) |
FI (1) | FI93062C (en) |
GB (1) | GB2288093B (en) |
SE (1) | SE516351C2 (en) |
WO (1) | WO1994013059A1 (en) |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2946305A1 (en) * | 1979-11-16 | 1981-05-21 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | IMPEDANCE CIRCUIT WITH CONTROLLABLE RESISTANCE |
DE3628922A1 (en) * | 1986-08-26 | 1988-03-03 | Ackermann Albert Gmbh Co | Circuit arrangement for connecting two or more telephone sets to one subscriber line |
-
1992
- 1992-11-30 FI FI925449A patent/FI93062C/en not_active IP Right Cessation
-
1993
- 1993-11-30 DE DE4396116T patent/DE4396116T1/en not_active Withdrawn
- 1993-11-30 WO PCT/FI1993/000506 patent/WO1994013059A1/en active Application Filing
- 1993-11-30 GB GB9510896A patent/GB2288093B/en not_active Expired - Fee Related
- 1993-11-30 EP EP94900838A patent/EP0671075A1/en not_active Withdrawn
- 1993-11-30 AU AU55643/94A patent/AU5564394A/en not_active Abandoned
-
1995
- 1995-06-01 SE SE9502019A patent/SE516351C2/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
FI925449A0 (en) | 1992-11-30 |
FI93062C (en) | 1995-02-10 |
SE9502019L (en) | 1995-06-01 |
GB9510896D0 (en) | 1995-08-02 |
FI925449A (en) | 1994-05-31 |
WO1994013059A1 (en) | 1994-06-09 |
DE4396116T1 (en) | 1995-12-21 |
FI93062B (en) | 1994-10-31 |
EP0671075A1 (en) | 1995-09-13 |
GB2288093A (en) | 1995-10-04 |
SE516351C2 (en) | 2001-12-17 |
SE9502019D0 (en) | 1995-06-01 |
GB2288093B (en) | 1996-11-20 |
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