WO1994002894A2 - Systeme de traitement de donnees a dispositif de traitement de boucles de programme - Google Patents

Systeme de traitement de donnees a dispositif de traitement de boucles de programme Download PDF

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Publication number
WO1994002894A2
WO1994002894A2 PCT/GB1993/001470 GB9301470W WO9402894A2 WO 1994002894 A2 WO1994002894 A2 WO 1994002894A2 GB 9301470 W GB9301470 W GB 9301470W WO 9402894 A2 WO9402894 A2 WO 9402894A2
Authority
WO
WIPO (PCT)
Prior art keywords
instruction
data
program
bit
register
Prior art date
Application number
PCT/GB1993/001470
Other languages
English (en)
Other versions
WO1994002894A3 (fr
Inventor
Gérard Chauvel
Yves Wenzinger
Peter Dent
Original Assignee
Texas Instruments France
Texas Instruments Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR9208667A external-priority patent/FR2693586B1/fr
Priority claimed from FR9208665A external-priority patent/FR2693576B1/fr
Priority claimed from FR9208664A external-priority patent/FR2693571B1/fr
Priority claimed from FR9208669A external-priority patent/FR2693573B1/fr
Priority claimed from FR9208668A external-priority patent/FR2693572B1/fr
Application filed by Texas Instruments France, Texas Instruments Incorporated filed Critical Texas Instruments France
Priority to KR1019950700141A priority Critical patent/KR950702719A/ko
Priority to JP6503868A priority patent/JPH08509080A/ja
Priority to EP93916063A priority patent/EP0650613A1/fr
Publication of WO1994002894A2 publication Critical patent/WO1994002894A2/fr
Publication of WO1994002894A3 publication Critical patent/WO1994002894A3/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015One dimensional arrays, e.g. rings, linear arrays, buses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094Condition code generation, e.g. Carry, Zero flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • G06F9/3804Instruction prefetching for branches, e.g. hedging, branch folding
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store

Abstract

L'invention concerne un système de traitement de données du type microprocesseur à deux niveaux pipeline qui comprend un dispositif exécutant une séquence d'instructions de façon répétitive, un compteur (74) de programme et un registre (76) de programme-adressage-démarrage destiné à enregistrer le numéro de la première instruction de la séquence d'instructions, ainsi qu'un compteur de répétition (70) qui s'initialise quand la première instruction de cette séquence d'instructions est exécutée. L'avant-dernière instruction de la séquence d'instructions à répéter contient un code de fin de boucle (EOL) qui, une fois la dernière instruction de la boucle exécutée, ordonne que la teneur du registre (76) de programme-adressage-démarrage soit chargée dans le compteur (74) du programme tant que le compteur de répétition n'est pas à zéro. Le code de fin de boucle (EOL) permet d'utiliser nettement moins de circuits et d'augmenter la vitesse de traitement des boucles.
PCT/GB1993/001470 1992-07-13 1993-07-13 Systeme de traitement de donnees a dispositif de traitement de boucles de programme WO1994002894A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019950700141A KR950702719A (ko) 1992-07-13 1993-07-13 프로그램 루프를 처리하는 장치를 갖는 데이타-프로세싱 시스템(data-processing system with a device for handling program loops)
JP6503868A JPH08509080A (ja) 1992-07-13 1993-07-13 プログラムループ処理のためのデバイスを備えたデータ処理システム
EP93916063A EP0650613A1 (fr) 1992-07-13 1993-07-13 Systeme de traitement de donnees a dispositif de traitement de boucles de programme

Applications Claiming Priority (9)

Application Number Priority Date Filing Date Title
FR9208664 1992-07-13
FR9208667A FR2693586B1 (fr) 1992-07-13 1992-07-13 Dispositif de lecture/écriture de données en mode sélectif dans un système de traitement de données.
FR9208668 1992-07-13
FR9208665A FR2693576B1 (fr) 1992-07-13 1992-07-13 Système multiprocesseur à contrôle local.
FR9208667 1992-07-13
FR9208669 1992-07-13
FR9208664A FR2693571B1 (fr) 1992-07-13 1992-07-13 Système de traitement de données dont le programme de commande comporte des instructions dépendant de paramètres d'état.
FR9208669A FR2693573B1 (fr) 1992-07-13 1992-07-13 Système de traitement de données à registre d'état dont la mise à jour dépend du programme.
FR9208668A FR2693572B1 (fr) 1992-07-13 1992-07-13 Système de traitement de données comportant un dispositif amélioré de traitement des boucles de programme.

Publications (2)

Publication Number Publication Date
WO1994002894A2 true WO1994002894A2 (fr) 1994-02-03
WO1994002894A3 WO1994002894A3 (fr) 1994-05-11

Family

ID=27515576

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1993/001470 WO1994002894A2 (fr) 1992-07-13 1993-07-13 Systeme de traitement de donnees a dispositif de traitement de boucles de programme

Country Status (1)

Country Link
WO (1) WO1994002894A2 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116028118A (zh) * 2023-01-31 2023-04-28 南京砺算科技有限公司 保障数据一致性的指令执行方法及图形处理器、介质
CN117132450A (zh) * 2023-10-24 2023-11-28 芯动微电子科技(武汉)有限公司 一种可实现数据共享的计算模块和图形处理器

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4097920A (en) * 1976-12-13 1978-06-27 Rca Corporation Hardware control for repeating program loops in electronic computers
JPS57114950A (en) * 1981-01-08 1982-07-17 Nippon Telegr & Teleph Corp <Ntt> Loop processing system for program controller
EP0231928A2 (fr) * 1986-02-03 1987-08-12 Nec Corporation Circuit pour la commande par programme
EP0374419A2 (fr) * 1988-12-21 1990-06-27 International Business Machines Corporation Méthode et dispositif pour générer des boucles d'itération par matériel et microcode

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4097920A (en) * 1976-12-13 1978-06-27 Rca Corporation Hardware control for repeating program loops in electronic computers
JPS57114950A (en) * 1981-01-08 1982-07-17 Nippon Telegr & Teleph Corp <Ntt> Loop processing system for program controller
EP0231928A2 (fr) * 1986-02-03 1987-08-12 Nec Corporation Circuit pour la commande par programme
EP0374419A2 (fr) * 1988-12-21 1990-06-27 International Business Machines Corporation Méthode et dispositif pour générer des boucles d'itération par matériel et microcode

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 006, no. 209 (P-150) 21 October 1982 & JP 57 114950 A 17 July 1982 *
See also references of EP0650613A1 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116028118A (zh) * 2023-01-31 2023-04-28 南京砺算科技有限公司 保障数据一致性的指令执行方法及图形处理器、介质
CN116028118B (zh) * 2023-01-31 2023-07-25 南京砺算科技有限公司 保障数据一致性的指令执行方法及图形处理器、介质
CN117132450A (zh) * 2023-10-24 2023-11-28 芯动微电子科技(武汉)有限公司 一种可实现数据共享的计算模块和图形处理器
CN117132450B (zh) * 2023-10-24 2024-02-20 芯动微电子科技(武汉)有限公司 一种可实现数据共享的计算装置和图形处理器

Also Published As

Publication number Publication date
WO1994002894A3 (fr) 1994-05-11

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