WO1992022144A1 - Recepteur a balayage rapide de bande large - Google Patents

Recepteur a balayage rapide de bande large Download PDF

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Publication number
WO1992022144A1
WO1992022144A1 PCT/US1992/004583 US9204583W WO9222144A1 WO 1992022144 A1 WO1992022144 A1 WO 1992022144A1 US 9204583 W US9204583 W US 9204583W WO 9222144 A1 WO9222144 A1 WO 9222144A1
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WO
WIPO (PCT)
Prior art keywords
signal
receiver
channels
carrier signals
wide bandwidth
Prior art date
Application number
PCT/US1992/004583
Other languages
English (en)
Inventor
Gregory L. Cannon
Original Assignee
Motorola, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola, Inc. filed Critical Motorola, Inc.
Publication of WO1992022144A1 publication Critical patent/WO1992022144A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/1027—Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J1/00—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general
    • H03J1/0008—Details of adjusting, driving, indicating, or mechanical control arrangements for resonant circuits in general using a central processing unit, e.g. a microprocessor

Definitions

  • This invention relates generally to radio receivers and more particularly relates to receivers having channel scanning capabilities.
  • Receivers operating in multi-channel communication systems generally employ a method of scanning the multiple channels for activity. Once a signal has been detected and based on some degree of prioritization, the receiver proceeds to receive that signal.
  • a single receiver has only two methods of discovering channel activity. One of them is to program the front end of the receiver to sequentially receive a number of particular channels and perform a signal detection routine to sample each channel for activity. In this case, the radio must spend a lot of time searching for channels. This time is basically spent in stabilizing a reference source to the frequency of each channel and then detecting the presence of a signal on that channel. As can be expected this time is significant for a multi-channel radio.
  • the other method of discovering channel activity requires a system with dedicated channels, like control channels in a trunked system.
  • This control channel is used to inform a subscriber unit of system activity on other channels.
  • the radio may only be able to communicate on channels that are a part of the system. If another radio is not using the system to initiate communication, then the system will not have knowledge of the channel activity of that radio, and will thus not be able to pass along that information to the scanning radio.
  • radio communication devices can no longer spend a significant amount of their operating time searching for channels. The need for a scanning method that will effectively and quickly scan a number of channels without the use of a dedicated channel is therefore clear.
  • a wideband receiver for detecting the presence of signals on any one of a plurality of radio frequency channels.
  • the wide bandwidth receiver includes a receiver for receiving a wideband signal having a plurality of radio frequency channels.
  • the receiver also includes a mixer for mixing the wide bandwidth signal to produce an intermediate signal which includes signal on any one of the plurality of channels.
  • Also included in the receiver is means for detecting energy components in the IF signal that correspond to the carrier signals to determine the presence of a carrier signal.
  • FIG. 1 is a block diagram of the essential elements of a receiver in accordance with the present invention.
  • FIG. 2 is a block diagram of the Digital Signal Processor
  • DSP digital signal processing
  • FIGs. 3a through 3c are timing diagrams of existing methods of carrier detection versus the method of the present invention.
  • FIG. 4 is a flow chart of the operation of the wideband quick scan receiver in accordance with the present invention.
  • FIG. 5 is the timing diagram of the operation of the DSP of FIG. 2.
  • FIG. 6 is a plot of the behavior of the Fourier Bessel coefficients J n ( ⁇ ).
  • the radio communication device 100 is a receiver which includes an antenna 102 for receiving a radio frequency signal 101.
  • the received signal 101 is applied to the first input of a mixer 104.
  • the second input of the mixer 104 is coupled to a controllable oscillator 110 whose reference frequency is controlled by a controller 116.
  • the output signal of the mixer 104 is filtered by a filter 106 and applied to the first input of a second mixer 108.
  • the second input of the mixer 108 is coupled to a second reference oscillator 112. If, for example, the received signal 101 is in the 900 MHz range the 900 MHz signal is mixed down to a first intermediate frequency, e.g. under 109 MHz, by the mixer 104.
  • This first IF signal is filtered and once again mixed down to a second intermediate frequency such as 100 KHz.
  • the bandwidth of the received signal 101 is wide, preferably 200 KHz.
  • the wide bandwidth of the signal 101 is intended to provide a large portion of the spectrum on which a plurality of carrier signals may be present.
  • the filter 114 receives the second IF signal which is preferably centered at 100 KHz and filters the signal before applying it to a two-way sample and hold circuit 118.
  • the operation of the sample and hold circuit 118 is controlled by a digital signal processing unit (DSP) 120.
  • the DSP controls the interrupts directed to the sample and hold circuit 118.
  • the operation of the DSP 120 will be explained in full detail later.
  • the output of the sample and hold circuit 118 is coupled to the DSP 120.
  • the operation of the DSP 120 is controlled by a controller 116.
  • the sampled second IF signal is analyzed to determine the presence of carrier signals. Once such a determination is made, the controller 116 is notified. Upon such notification, the controller 116 directs a demodulator 113 coupled to the output of the filter 114, to demodulate the detected carrier signal in the received signal 101. In the event that these carrier signals contain voice, the demodulator output proceeds to present this voice to a speaker 124. Data information after being processed by the controller 116 are presented on a display 122.
  • the controller 116 proceeds to change the frequency of the reference oscillator 110 applied to the second input of the mixer 104 to allow the receiver 100 to look at a second portion of the spectrum.
  • a wide bandwidth signal is received and processed by the DSP 120 and the controller 116. This process continues until all the available spectrum that the receiver 100 is operating in has been scanned.
  • FIG. 2 a block diagram of the internal elements of the DSP 120 is shown in accordance with the principals of the present invention.
  • the DSP 120 includes a DSP controller 202 which is in full communication with the controller 116 of the receiver 100.
  • the DSP controller 202 is also in full communication with the sample and hold block 118 of the receiver 100.
  • a buffer 204 is used to receive samples from the filtered second IF signal from the sample and hold circuit 118.
  • the operation of the buffer 204 is controlled by the DSP controller 202.
  • An interrupt generated by the DSP controller 202 to the sample and hold circuit 118 transfers one bit of data to the buffer 204.
  • the buffer 204 is coupled to a register bank 206 which is coupled to a multiplier 210 and adder 208 and a buffer 212.
  • the operation of the multiplier 210, adder 208, and buffer 212 are controlled by the DSP controller 202.
  • the combination of the register bank 206, the multiplier 210, and the adder 208 calculate the Fast Fourier Transform (FFT) function of the filtered second IF signal 115.
  • FFT Fast Fourier Transform
  • FT Fourier Transform
  • These three block 206, 210, and 208 provide the FFT calculator means of the receiver 100.
  • the calculated FFT functions are stored in the buffer 212 via the DSP controller 202. With the FFT calculation results available, the DSP controller 202 can detect the presence of carrier signals in the receive signal 101.
  • the calculation of FFT is well known in the art. For a more detailed understanding of fast fourier transforms and procedures to calculate them, refer to Signals and Systems; continuous and discrete, by Rodger E. Ziemer, William H. Tranter, and D. Roland Fannin, published by Macmillan Publishing Co., Inc., pages 394-405.
  • the buffer 204 accepts 1024 samples of the IF signal from the sample and hold circuit 118. With 1024 samples and the sampling frequency of 400 KHz, each element of the frequency domain corresponds to 400 KHz over 1024 frequency differences.
  • the first carrier signal will be 12.5 KHz away from DC. This indicates that the 32 nd sample of the 1024 samples will correspond to the first carrier signal. It is the relative magnitude of the complex value of 32 nd sample that is used to determine if a signal is present at that carrier frequency.
  • a threshold detector 203 coupled to the DSP controller 202 compares this magnitude to a predetermined threshold value stored in buffer 212.
  • the positive results of this comparison indicates the presence of a carrier signal.
  • This indication is communicated to the controller 116 via the DSP controller 202 and the buffer 212.
  • the second carrier signal would be 25 KHz away from the first or a total of 37.5 KHz from DC.
  • the 96 th sample in the bank of 1024 samples corresponds to this second carrier.
  • the next one will be another 25 KHz away which is another 64 samples away in the bank of the 1024 samples.
  • the sample location corresponding to this carrier signal is at 160 th .
  • Other carrier signals are sampled similarly.
  • a sample calculation will show that a signal having 200 KHz bandwidth and eight channels can be successfully scanned with an FFT calculation having a resolution of 1024 samples. With the ability to sample eight channels simultaneously, the effective sampling time and scanning time would greatly be reduced. Note that the number of samples does not need to be 1024. These number of samples have been chosen to provide acceptable resolution and reliable signal capture.
  • FIGS. 3a, 3b, and 3c three timing diagrams are presented to compare the timing benefits of the scanning method of the present invention versus previously known techniques.
  • FIG. 3a shows the existing method of scanning airwaves without the use of digital signal processing units. As can be seen by 3022, a period of 10 milliseconds (ms) is required for phase locked loop synthesizer to lock to a received signal. A period 3024 equal to about 7 ms is required for the detection of a carrier signal.
  • FIG. 3b shows existing scanning technology using digital signal processing . Once again 10 milliseconds of phase locked loop is required as shown by 3042 plus 4 ms of carrier detect as shown by 3044. Note that FIGS. 3a and 3b are representative of one channel scan.
  • FIG. 3c shows the timing diagram 306 in accordance with the present invention.
  • 3062 represents the 10 ms required by the phase locked loop synthesizer to lock to the wide bandwidth signal 101.
  • An additional 4 ms are required for the carrier detect, as shown by 3064.
  • the filtered IF signal 115 available, approximately 1.5 ms is needed, as shown by 3066, to calculate the FFT of all the expected carrier signals in the wide bandwidth signal 101.
  • the scanning of the eight channels therefore takes place in 15.5 ms.
  • the significant benefit of the present invention is that the most time consuming task of frequency synthesis and signal reception need be implemented only once for the eight channel scan. Therefore, the only repeated time would be the one and half millisecond for fast fourier transform that would have to be repeated 8 times. This results in the entire scan time to be 26 milliseconds which is significantly lower than any of the two previous methods discussed in FIGS. 3a and b.
  • the receiver 100 includes a dual mixer conversion circuit.
  • the reference oscillator 110 to the first mixer 104 is controlled by the controller 116.
  • the wide bandwidth signal 101 received by the antenna 102 is mixed down to a first and second IF signal by the mixer 104 and 108, respectively.
  • the second IF signal is preferably around 100 KHz considering that the bandwidth of the received signal 101 is preferably 200 KHz.
  • the sample and hold circuit 118 in conjunction with the DSP 120 and the controller 116 process the IF signal and calculate the FFT of the IF signal at the location of the expected carrier signals.
  • the 200 KHz signal 101 is expected to include eight channels separated by 25 KHz. With the fast fourier transform calculated, the DSP 120 can detect the presence of a carrier signal on any one of the eight slots on the received signal 101. With this method a significant reduction in the scanning time is achieved because the phase locked loop circuitry do not have to be steered for every scan.
  • a flow chart 400 of the operation of the receiver 100 is shown in accordance with the present invention.
  • the operation receives the wideband signal 101 via a block 404.
  • the received wideband signal 101 is mixed to generate the IF signal via a block 406.
  • This block 406 is followed by a "sample and hold the IF signal” block 408 which is coupled to a "place sampled signal in buffer” block 410.
  • the block 410 places sampled signal into the buffer 204.
  • the operation increments a counter M via block 412 and evaluates its contents via a condition block 414. At the condition block 414, the value of M is compared against "1024".
  • the NO output of this block 414 which indicates that not enough samples have been acquired is routed to the sample and hold IF signal block 408.
  • the operation performs the FFT calculation via a block 416.
  • a block 418 is executed that would store the J 0 1 to JQH in the buffer of the controller 116, as shown in FIG. 4B.
  • the Jo 1 is the first value of the Fourier Bessel function belonging to the first carrier signal in the received wideband signal 101. As explained earlier, in the preferred embodiment this signal is centered at 12.5 KHz in the filtered IF signal 115.
  • JQ 2 is the first value of the Fourier Bessel function belonging to the second carrier signal in the signal 101 and so on with J 0 8 being the first Fourier Bessel function of the eighth carrier signal in the wide bandwidth signal 101.
  • the output of block 418 is coupled to a condition block 420 where the value of Jo 1 to Jo 8 are compared to a predetermined value X.
  • the NO output of block 420 indicates that none of the expected carrier signals in the wide bandwidth signal 101 are present.
  • This output is coupled yet to another condition block 424 where a decision is made as to whether the N wide band signals have been scanned. Since the receiver 100 can be designed to receive a number of wide bandwidth signals each containing a number of channels, there is no limitations as to how many signals can be scanned.
  • the integer N denotes the number of wide bandwidth signals that the receiver 100 is designed to receive. This integer N is normally selected based on the characteristics of the system and the timing and the speed of operation of the elements of the radio 100 particularly the DSP 120.
  • the NO output of the condition block 424 is coupled to a "receive next wide bandwidth signal" block 426. With this block 426, the oscillator 110 under the control of the controller 116, generates a referencing signal suitable to allow the reception of a second wide bandwidth signal. At the output of block 426, the operation of the flow chart 500 is returned to the generate IF signal block 406. The YES output of the condition block 424 returns the operation to the start block 402.
  • the YES output of the condition block 420 is coupled to "a receive signal in the order of priority" block 422.
  • the carrier signals are prioritized in accordance with a predetermined format. The priority of the carrier signals is naturally stored in the memory of the receiver 100. Once a number of carrier signals have been detected, the demodulator 113 can be directed by the controller 116 to receive them in the order of priority.
  • the output of block 422 is coupled to the input of the condition block 424 whose operation was explained earlier. Referring now to FIG. 5, a timing diagram 500 of the operation of the DSP 120 is shown.
  • the timing diagram 500 includes portions 502 which are employed by the DSP 120 to scan the available channels.
  • the time that the DSP 120 is not scanning is denoted by 504.
  • the DSP is performing other tasks within the receiver 100. Some of its tasks include assistance in the demodulation of the received signals, interaction with user, and so forth.
  • the controller 116 It is possible to receive a number of wide bandwidth signals and inspect them for the presence of carrier signals before proceeding to demodulate any one of the carrier signals that have been detected. This may be necessary in systems where the number of carrier signals are limited or the order of priority is significant. In such system, it will be necessary for the controller 116 to store the results of the DSP 120 for later use. Once all the available or desired channels have been scanned, the controller 116 proceeds to command the demodulator 113 to demodulate the signals in the order of priority. The storing of the calculated information with the DSP 120 allows further manipulation of data during one wide bandwidth channel scan. With the use of this quick wideband scan, the receiver 100 can scan a number of channels in a fraction of the time required by existing methods. This is only possible via the use of high speed DSPs which have become available within the past few years.
  • the samples of the filtered IF signal 115 after being buffered are presented to a filter bank 222 via the DSP controller 202.
  • This filter bank 222 includes a plurality of filters in parallel.
  • the input signal from the DSP 202 is coupled to the input of all the parallel filters.
  • the outputs of these parallel filters are coupled to a bank of threshold detectors, block 220.
  • the filters included in the filter bank 222 are tuned to the center frequencies of the shifted carrier signals.
  • the presence of a signal at the output of each of these filters indicates the presence of a carrier signal corresponding to that filter. This condition is detected by the bank of threshold detectors 220 and communicated to the controller 116.
  • this invention relies upon control over the IF bandwidth, such that the bandwidth can be made larger than the bandwidth required for a single signal. Instead of attempting to sequentially receive single channels, an attempt is made to receive a signal that can include many signals at once, and then use signal processing to find out if any of the subsignals represent channel activity.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

On décrit un récepteur (100) servant à détecter la présence de signaux dans n'importe quel canal d'une multiplicité de canaux radioélectriques. Le récepteur (100) à grande largeur de bande se compose d'un récepteur recevant un signal de grande largeur de bande (101) comportant une multiplicité de canaux radioélectriques. Le récepteur (100) comprend aussi un mélangeur (104) servant à mélanger le signal (101) de grande largeur de bande afin de produire un signal intermédiaire (115) qui comprend des signaux sur n'importe lequel des canaux appartenant à la multiplicité de canaux. Le récepteur est également équipé d'un détecteur (120) permettant de détecter dans le signal FI (115) des composantes d'énergie qui correspondent aux signaux porteurs, afin de déterminer la présence d'un signal porteur.
PCT/US1992/004583 1991-06-05 1992-06-02 Recepteur a balayage rapide de bande large WO1992022144A1 (fr)

Applications Claiming Priority (2)

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US71042291A 1991-06-05 1991-06-05
US710,422 1991-06-05

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1120920A1 (fr) * 1998-10-05 2001-08-01 AOR, Ltd. Recepteur large bande et procede de balayage de voie
WO2009039211A1 (fr) * 2007-09-17 2009-03-26 Qualcomm Incorporated Procédé et appareil permettant de réduire l'espace de fréquence de la recherche de fréquence

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517562A (en) * 1979-10-23 1985-05-14 Mcgraw-Edison Company FM Communication system
US4701934A (en) * 1985-09-03 1987-10-20 Motorola, Inc. Method of doppler searching in a digital GPS receiver
US4995098A (en) * 1988-09-06 1991-02-19 Motorola, Inc. Adaptive scanning method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4517562A (en) * 1979-10-23 1985-05-14 Mcgraw-Edison Company FM Communication system
US4701934A (en) * 1985-09-03 1987-10-20 Motorola, Inc. Method of doppler searching in a digital GPS receiver
US4995098A (en) * 1988-09-06 1991-02-19 Motorola, Inc. Adaptive scanning method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1120920A1 (fr) * 1998-10-05 2001-08-01 AOR, Ltd. Recepteur large bande et procede de balayage de voie
EP1120920A4 (fr) * 1998-10-05 2004-03-17 Aor Ltd Recepteur large bande et procede de balayage de voie
WO2009039211A1 (fr) * 2007-09-17 2009-03-26 Qualcomm Incorporated Procédé et appareil permettant de réduire l'espace de fréquence de la recherche de fréquence
US8145132B2 (en) 2007-09-17 2012-03-27 Qualcomm Incorporated Method and apparatus for reducing frequency space from frequency search
KR101143224B1 (ko) * 2007-09-17 2012-05-22 콸콤 인코포레이티드 주파수 탐색으로부터 주파수 공간을 감소시키기 위한 방법 및 장치
CN101861749B (zh) * 2007-09-17 2016-10-26 高通股份有限公司 用于从频率搜索中减小频率空间的方法和装置

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