Classifications

• • A—HUMAN NECESSITIES
  • A63—SPORTS; GAMES; AMUSEMENTS
  • A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
  • A63F3/00—Board games; Raffle games
  • A63F3/06—Lottos or bingo games; Systems, apparatus or devices for checking such games
  • A63F3/0625—Devices for filling-in or checking
  • A63F3/064—Electric devices for filling-in or checking
• • A—HUMAN NECESSITIES
  • A63—SPORTS; GAMES; AMUSEMENTS
  • A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
  • A63F9/00—Games not otherwise provided for
  • A63F9/24—Electric games; Games using electronic circuits not otherwise provided for
  • A63F2009/2401—Detail of input, input devices
  • A63F2009/2411—Input form cards, tapes, discs
  • A63F2009/2419—Optical
  • A63F2009/242—Bar codes
• • A—HUMAN NECESSITIES
  • A63—SPORTS; GAMES; AMUSEMENTS
  • A63F—CARD, BOARD, OR ROULETTE GAMES; INDOOR GAMES USING SMALL MOVING PLAYING BODIES; VIDEO GAMES; GAMES NOT OTHERWISE PROVIDED FOR
  • A63F9/00—Games not otherwise provided for
  • A63F9/24—Electric games; Games using electronic circuits not otherwise provided for
  • A63F2009/2448—Output devices
  • A63F2009/245—Output devices visual
  • A63F2009/2457—Display screens, e.g. monitors, video displays
  • A63F2009/2458—LCD's

Definitions

• This invention relates to electronic games, and more particularly, to electronic game monitors.
• the convention ⁇ al bingo game is played with a standard set of bingo cards.
• Each card in that set of bingo cards for example, 6000 cards in a set, consists of a plurality of numerals which are positioned in a matrix.
• the standard bingo card is a 5 X 5 matrix.
• the position or sequence of numerals on a bingo card has been somewhat standard- ized.
• a bingo card bearing the serial numbe "3254” would have the numeral "1Q” at position row 1-col ⁇ umn 1, numeral "7” at row 2-column 1, numeral M 5" at row 3-column 1, numeral "2” at row 3-column 1 and numeral "6” at row 5-column 1.
• the numerals for each colum are restricted to a certain range of the decimal number system. For example, only numbers from one to 15 are per mitted to reside in one of the five positions for the first column.
• the second column can only in ⁇ clude numbers 16 to 30; the third column numbers 31 to 45; the fourth column numbers 46 to 60; and fifth column num ⁇ bers 61 to 75.
• a player When the bingo game is played at a gaming establish- ment, a player is generally playing with more than one bingo card. It is not uncommon for a player to be-playin with ten cards. Consequently, it is in many instances difficult for a player to search and mark a called number on all of his cards in the allotted time. It is, therefore, desirous to have a game monitor that is capable of tracking the called numbers and indi ⁇ cating to the player that a winning configuration (bingo) has been detected among his multitude of bingo cards. In addition, it is preferable that such a game monitor does not drastically alter the format or physical configuration of the existing game card so. as to permit the continuing use of existing game cards and as not to disrupt players' familiarity with the existing game.
• the present invention provides an electronic game monitor for use with a game card
• the game card generally includes a matrix thereon.
• the game monitor comprises automatic matrix entry means for receiving numerals which are positioned on a game card.
• the numerals, representing locations of the matrix, are depicted in a generally bar code-like fashion.
• the game monitor also comprises cen ⁇ tral controlling means for controlling the operation of the game monitor, the game monitor being operable with the numerals of at least two of the game cards.
• the game mon ⁇ itor further comprises keyboard means for entering alpha- numerics, the keyboard means includes a plurality of keys. Display means are provided for displaying alphanumerics and game configurations.
• the automatic ma'trix entry means further comprises a barcode reader for receiv ⁇ ing the numerals of the game cards, and barcode processing means for transforming the numerals into a form usable by the game monitor.
• Figure 1 is a partial, perspective view of the game monitor of the present invention
• Figure 2 is a simplified block diagram of the game monitor of Figure 1;
• Figure 3 is a schematic view of the central control ⁇ ling means of the game monitor of Figure 2;
• Figure 4A is a schematic view of an aspect of the automatic matrix entry means of the game monitor of Figure 2;
• Figure 4B is a schematic view of another aspect of the automatic matrix entry means of the game monitor of Figure 2;
• Figure 5 is a schematic view of the keyboard means of the game monitor of Figure 2
• Figure 6A is a schematic view of an aspect of the display means of the game monitor of Figure 2;
• Figure 6B is a schematic view of another aspect of the display means of the game monitor of Figure 2;
• Figure 7 is a simplified flow diagram of the software for the game monitor of Figure 1 ;
• Figure 8 is a flow diagram of the initialization routine of the software for the game monitor of Figure 7;
• Figure 9 is a flow diagram of the RAM test routine of the software for the game monitor of Figure 7;
• Figure 10 is a flow diagram of the idle routine of the software for the game monitor of Figure 7;
• Figure 11 is a flow diagram of the card input t routine of the software for the game monitor of Figure 7;
• FIGS 12A-12E are flow diagrams of the play routine of the software for the game monitor of Figure 7. Best Mode for Carrying Out the Invention
• game monitor 12 for tracking numerals that are involved in games such as bingo, keno, etc. Each game is played with game cards each of which has a matrix of numerals thereon. More particularly, game monitor 12 comprises central controlling means 14, as best shown in Figure 2, for controlling the operation of game monitor 12, automatic matrix entry means 16 for entering the numerals of the matrix, keyboard means 13 for entering alphanumerics and instructions, and display means 20 for displaying messages.
• FIG. 1 Illustrated in Figure 1 is one such bingo card 27 that has a strip 28 of bar codes.
• the bar code used may be one of a number of conventional bar codes such as the universal product code (UPC) and other codes illus ⁇ trated and described in D. Allais, Bar Cqde Symbology, February 16, 1982 (Interfac ' Mechanisms, Inc.)-.
• the bar code employed is a type generally referred to as the "3 of 9 Code.”
• numbers are represented by letters of the English alphabet. For example, the number "1" is repre- sented by the letter "A", the number "2" by the letter
• a conventional bingo card is a 5 X 5 matrix.
• the numerals f ⁇ t each column are restricted to a certain range of the decimal number system. For example, only numbers from one to 15 are permitted to reside In one of the five positions for the first column. Similarly, the second column can only include numbers 16 to 30; the third column numbers 31 to 45; the fourth column numbers 46 to 60; and fifth column numbers 61 to 75.
• a bingo card 27 with such a strip 28 of bar code is scanned by automatic matrix entry means 16.
• Matrix entry, means 16 in the preferred embodiment com- prises an optical barcode reader 50, the CMM Machine Mount Scanner manufactured by Welch Allyn of Skaneateles Falls, New York.
• Central controlling means 14 in the preferred embodiment is capable of storing the matrices of up to 50 bingo cards. As each bingo number is being called out by an announcer, the player enters the corresponding numeral into central controlling means 14 via keyboard means 18.
• Central controlling means 14 compares that numeral with all of the numerals on bingo cards which have been auto ⁇ matically entered earlier. Wherever a match occurs, cen- tral controlling means 14 denotes and keeps track of that numeral.
• central controlling means 14 scans eac of the entered matrices to see if the manually-entered, called-out numbers occupy a sufficient number of position such that a winning combination is present.
• a winning combination may be numbers of a row, a column, diagonal, the four corners, etc. If such a winning combi nation is detected, then the presence of that winning com ⁇ bination is outputted to display means 20.
• central controlling means 14 comprises a central processing means 30 for controlling the routing of information, an input/out ⁇ put controlling means 32, a read-only memory device 34, and a random-access memory device 36.
• cen ⁇ tral controlling means 14 comprises an address latching means 38, a bi-directional data latching means 40, and a plurality of operating signal devices 42a through 42d. Inverters 44, 46 and 48 are also provided.
• central processing means 30 in the preferred embodiment is a 8085 microprocessor manufactured by Intel Corp. of Santa Clara, California.
• Microprocessor 30 includes a plurality of dual-function address/data inputs/outputs ADO through AD7 which are in communication with read-only memory device 34, random-access memory de ⁇ vice 36, address latching means 38, and data latching means 40.
• microprocessor 30 includes a plu ⁇ rality of address outputs A8 through A12 which are in com ⁇ munication with both memory device 34 and memory device 36.
• microprocessor 30 includes a plurality of controlling outputs A13 through A15 each of which is in communication with an input of input/output controlling means 32.
• microprocessor 30 includes a plurality of special function inputs and outputs such as interrupt (INTR), serial-in-data (SID), serial-out-data (SOD), dual-function input/output or memory (IO/M), write (WR) , and read (RD) .
• the INTR input is adapted to receive the bar code information from automatic matrix entry means 16.
• the receipt of the bar code information by microprocessor 30 is in an asynchronous fashion, i.e., the presence' of a signal at the INTR input forces microprocessor 30 to start the reception of the bar code information from matrix entry means 16.
• Microprocessor 30 then converts this information, which is in the conventional ASCII format. into a binary-coded decimal (BCD) format.
• BCD binary-coded decimal
• Input/output controlling means 32 in the preferred embodiment is a 74LS138 multiplexer manufactured by Texas Instruments Inc. of Dallas, Texas. Multiplexer 32 in ⁇ cludes a plurality of inputs A, B and C each of which is in communication with one of microprocessor controlling outputs A13 through A15. In addition, multiplexer 32 in ⁇ cludes a plurality of outputs Y0 through Y7 which are in communication with automatic matrix entry means 16, key ⁇ board means 18, and display means 20. The output signals of multiplexer 32 are input/output select signals 1U SEL1 through To SEL#.
• Read-only memory device 34 in the preferred embodi ⁇ ment is a 2732A programmable read-only memory (ROM) manu ⁇ factured by Intel Corp.
• ROM 34 includes a plurality of addressing inputs A0 through A11 which are in communica- tion with microprocessor 30 or address latching means 38, and a plurality of data outputs 00 through 07 which are in communication with microprocessor 30 or data latching means 40.
• ROM 34 includes special inputs such as output enable (OE)and chip enable (CE) . The presence of a low signal at input CE, which is transmitted from port A12 of microprocessor 30, enables the operation of ROM 34.
• OE output enable
• CE chip enable
• Random-access memory device 36 in the preferred em ⁇ bodiment is a 2123 random access memory (RAM) manufacture by Intel Corp.
• RAM 36 includes a plurality of address in puts A0 through A10 which are in communication with micro processor 30 or address latching means 38, and a pluralit of data outputs DO through D7 which are in communication with microprocessor 30 or data latching means 40.
• RAM 36 includes special inputs such as output enable (OE) , chip enable (cJE)and write enable (WE) .
• OE output enable
• cJE chip enable
• WE write enable
• a low signal at input CE " a high signal as originally transmitted from port A12 of microprocessor 30 and subsequently inverted by inverter 44, enables the operation of RAM 36. Conversely, the high signal outputted by microprocessor 30 disables ROM 34.
• Address latching means 38 in the preferred embodiment is a 74 S373 latch manufactured by Texas Instruments.
• Address latch 38 includes a plurality of inputs 1D through 8D which communicate with microprocessor 30 and another plurality of outputs 1Q through 8Q which communicate with ROM 34 and RAM 36.
• a special input, latch enable (LE) is provided.
• data latching means 40 in the preferred embodiment is a 74LS245 bi-directional bus transceiver or data latch manufactured by Texas Instruments.
• Data latch 40 includes a plurality of dual-function inputs/outputs B1 through B8 which are in communication with keyboard means 18 and display means 20. The signals which are in commu ⁇ nication with these devices are designated DB0 through DB7.
• data latch 40 includes another plural ⁇ ity of dual-function inputs/outputs A1 through A8 whic - communicate with microprocessor 30, ROM 34 and ' RAM 36. "
• data latch 40 includes an enable (ENA 1 ) input and a bi-directional control input (DIR).
• ENA 1 enable
• DIR bi-directional control input
• the output signals of devices 42a through 42d and 48 are memory read (MEMR) , memory write (MEMW) , in ⁇ put/output read (I/O R) , input/output write (I/O W) and (I/O W) , respectively.
• MIMR memory read
• MEMW memory write
• I/O R in ⁇ put/output read
• I/O W input/output write
• I/O W input/output write
• automatic matrix entry means 16 it comprises barcode reader 50, as describes previously, a barcode reader operating means 52 and a barcode processing means 54.
• Barcode reader 50 is capable of transforming a " 'strip 28 of bar codes into usable digital information.
• barcode operating means 52 is provided to enable barcode processing means 54 to transform the digital information from barcode reader 50 into usable data.
• Barcode operating means 52 in the pre ⁇ ferred embodiment includes a flip-flop 56 and an OR gate 58.
• Flip-flop 56 in the preferred embodiment is a D-type flip-flop.
• the signals inputted into gate 58 are 10 SEL6 from multiplexer 32 and ⁇ O of device 42d.
• the output of gate 58 is inputted into flip-flop 56.
• the other input of flip-flop 56 receives the SOD signal from microprocessor 30.
• the output of flip-flop 56 is defined as the "SERIAL IN" signal.
• automatic matrix entry means 16 in the preferred embodiment is capable of reading and transforming bar code information, that capability is merely exemplary.
• Automatic matrix entry means 16 in alternative embodiments may be capable of reading other forms of coded numerals and transforming the coded numerals into usable digital information.
• barcode processing means 54 includes a barcode microprocessor 60 and an indicator 62.
• Barcode microprocessor in the preferred embodiment is a LTS-III microprocessor manufactured by Welch Allyn.
• the SERIAL IN signal from flip-flop 56 activates a transistor 64 which in turn enables barcode reader 50 via lines EN and V+.
• the information sensed by barcode reader 50, the "3 of 9 Code" is then transmitted to microprocessor 60 via line DIG IN.
• Microprocessor 60 then transforms this digi ⁇ tal information into a conventional ASCII format.
• the ASCII format utilizes the numerals one to 128 each of which represent a decimal number, a letter of the alpha ⁇ bet, or a symbol that generally appears on the keyboard of a conventional teletype machine.
• Microprocessor 60 then outputs the processed information to microprocessor 30 via output line OUT. The information on this line is serial data.
• An inverter 66 is provided to output a SID signal to the interrupt input INTR of microprocessor 30. The presence of the S ' lD signal forces microprocessor 30 to start the reception of data from barcode microprocessor 60.
• Microprocessor 30 first converts the ASCII informa- tion into binary-coded-decimal (BCD) format and then for ⁇ wards this information to RAM 36 for storage.
• indicator device 62 is provided to indicate the acceptance by game monitor 12 of a barcode. In the preferred e bodi- ment, indicator device 62 is a beeper. Beeper 62 is acti ⁇ vated by a transistor 68.
• a 4 X 5 switch array 70 is provided.
• key ⁇ board means 18 comprises a row selection means 72, a column selection means 74, and column selection control ⁇ ling means 76. More particularly, rows of switch array 70 are connected to row selection means 72 and columns of switch array 70 are similarly connected to column selec ⁇ tion means 74.
• Row selection means 72 in the preferred embodiment is a 74LS173 register or polling latch manu ⁇ factured by Texas Instruments. Polling latch 72 includes a plurality of data inputs 1D through 4D which are in com ⁇ munication with data latch 40, and a plurality of outputs 1Q through 4Q each of which is in communication with a row of switch array 70.
• polling latch 72 in ⁇ cludes special inputs such as enable -(ENA) and clock (CLK). The operation of polling latch 72 is such that the data presented at inputs 1D through 4D would cause one of the outputs 1Q through 4Q to be low, and all others high.
• Column selection means 74 in the preferred embodiment is a 74LS240 register or output latch manufactured by Texas Instruments.
• Output latch 74 comprises a plurality of inputs 1A1 through 2A1 each of which is in communica ⁇ tion with a column of switch array 70, and a plurality of data outputs 1Y1 through 2Y1 which are in communication with data latch 40.
• output latch 74 is such that if a key of switch array 70 is depressed, a low signal would appear in one of the parallel data which are forward by output latch 74 to microprocessor 30.
• Micro- processor 30 than compares the received data with a con ⁇ ventional "look-up" table of the switch array matrix that is stored in ROM 34 to determine which key is depressed.
• column selection controlling means 76 in the preferred embodiment is an OR gate the inputs of which are the ⁇ 7 ⁇ 1 signal of device 42c and the 10 SEL2 signal of multiplexer 32.
• display means 20 comprises three electro-optical display means—an alphanumeric communication display means 22, an keypad entry display means 24, and a positional display means 26.
• alphanumeric display means 22 com- prises a liquid crystal display (LCD) device 80.
• LCD 80 in the preferred embodiment is a LCM-522-1A dot matrix display module manufactured by Sanyo Semiconductor Corp. of Allendale, New Jersey.
• LCD 80 includes a plurality of inputs which are in communication with data latch 40.
• two NAND gates 82 and 84, and an inverter 86 are provided for controlling LCD 80.
• the input signals of gate 82 are the 10 SEL3 and 10 SEL5 signals from multi ⁇ plexer 32.
• the output of gate 82 and the I/O W signal from device 42d are inputted into gate 84.
• LCD 80 is capable of providing a visual in ⁇ struction to the player.
• - LCD 80 is capable of displaying the serial number of the bingo card that has just been scanned, instructions such as "ENTER NUMBER", etc.
• the presence of an ⁇ O SEL3 signal, presenting a low signal at input RS of LCD 80 indicates to LCD 80 that a command signal is to be presented.
• the absence of an ⁇ O SEL3 ' signal, presenting a high signal at input RS indicates that data are to be presented to LCD 80.
• the presence of either the ⁇ U SEL3 or ⁇ U SEL5 signal in conjunction with the I/O W signal cause inverter 86 to output a signal that enables LCD 80 via input E.
• keypad entry display means 24 is provided' to display the manually-entered, called-out numbers as they are being entered by the player. More particularly, key ⁇ pad display means 24 comprises two light emitting devices 88a and 88b, as best shown in Figure 6B.
• Display devices 88a and 88b in the preferred embodiment are TIL311 inte ⁇ grated circuit displays manufactured by Texas Instrumentshack Each of display devices 88a and 88b includes a plurality of inputs A through D which are in communication with data latch 40, and an enable input (EL).
• an OR gate 90 is provided to control the operation of keypad display means 24. The inputs of gate 90 are the I/O W signal from device 42d and the 10 SEL4 signal from multi ⁇ plexer 32.
• positional display means 26 is provided for sequentially displaying the possible winning configura ⁇ tions to the player before and during the game and for displaying the winning configuration to the player if a bingo has occurred. More particularly, positional display means 26, as best shown in Figure 6B, comprises a plural ⁇ ity of shift registers 92a, 92b, 92c, and a flip-flop 92d. Each of shift registers 92a, 92b and 92c in the preferred embodiment is a 74LS164 serial-input, parallel-output shift register manufactured by Texas Instruments. Each shift register includes a plurality of outputs OA through OH each of which is connected to a light emitting diode (LED).
• LED light emitting diode
• flip-flop 92d a D-type flip-flop, in ⁇ cludes an LED at its output Q.
• OR gate 94 is provided to control the operation of the shift regis- ters and the flip-flop. The inputs of gate 94 are the i/ W signal from device 42d and the ⁇ O SEL7 signal from multiplexer 32.
• ROM 34 is activated. This automatic activation has been pre-programmed into ROM 34. ROM 34 then outputs its eight lowest binary bits from outputs 00 through 07. These address instructions. are forwarded to microprocessor 30. After receiving these address instructions, micropro ⁇ cessor 30 begins the initialization (INIT) routine, as best shown by the flow chart in Figure 8. The initializa- tion routine initializes the various units of game monitor 12. For initializing barcode microprocessor 60, micropro ⁇ cessor 30 forwards the appropriate signals such that a signal appears at the SERIAL IN output of flip-flop 56, as best shown in Figure 4A. Initialization signals are then forwarded to barcode microprocessor 60.
• IIT initialization
• micropro ⁇ cessor 30 forwards the appropriate signals such that a signal appears at the SERIAL IN output of flip-flop 56, as best shown in Figure 4A. Initialization signals are then forwarded to barcode microprocessor 60.
• microprocessor 30 outputs an ⁇ O S " E " __? signal that is in ⁇ putted to LCD 80 via input RS, permitting LCD 80 to accept command signals such as the initialization signals. These signals are then presented to inputs DO through D7.
• the IO/M and WR outputs of microprocessor 30 are activated by the presence of a high and low signal, re ⁇ spectively.
• Inverter 46 in turn inverts the high signal of the IO/M port, indicating that microprocessor 30 is controlling an input/output operation.
• the low output of OR gate 42d, ⁇ /5 is inverted by inverter 48 before it is inputted to NAND gate 84.
• NAND gate 84 The output of NAND gate 84 is inverted by inverter 86, the output of which enables LCD" 80 to receives signals at its inputs DO through D7.
• microprocessor 30 outputs the appropriate signals such that OR gate 90 outputs a low signal to the EL " inputs of display devices 88a and 88b, as best shown in Figure 6B.
• Microprocessor 30 then outputs low data signals from its outputs ADO through AD7, which are forwarded by data latch 40 on its DB0 through DB7 lines. These low signals are then received by inputs A through D of display devices 88a and 88b.
• micro ⁇ processor For initializing positional display means 26, micro ⁇ processor outputs the appropriate signals such that a low signal is outputted by OR gate 94, as best shown in Figure 6B. Microprocessor 30 then outputs a low SOD signal' that is inputted into shift register 92a. This low signal then propagates through shifts registers 92a, 92b and 92c, and flip-flop 92d such that these devices are all initialized. As best shown by the flow chart of Figure 9, RAM 36 is then initialized and tested (RAMTST) . Microprocessor 30 first outputs a high signal at its output A12 which is then inverted by inverter 44. The presence of this low signal at input OS of RAM 36 enables RAM 36, that is, permitting RAM 36 to read or write.
• ROM 34 is disabled by the high signal from output A12.
• micro ⁇ processor 30 now outputs data from outputs ADO through AD7 and A8 through A10. These data, the eight lowest bits having passed through address latch 38, are received by inputs A0 through A10 of RAM 36.
• the data received by RAM 36 are test patterns and other information. The test patterns are then read back into microprocessor 30 which compares the patterns to determine whether RAM 36 is functioning properly.
• game monitor 12 is now in the idle mode (IDLE) after all ini ⁇ tializations and testings have been completed.
• Keyboard means 18 is first tested to see whether the player has depressed the play ; mode ("START PLAY” key of switch array 70) or the card input mode ("START CARD READING" key). If the card input (CARDIN) routine has been selected, as best shown in Figure 11, barcode reader 50 is enabled to read the bar codes of bingo cards 27. In this routine, flip- flop 52 of Figure 4A is activated. Microprocessor 30 out ⁇ puts the appropriate signals such that multiplexer 32 out ⁇ puts a signal at ⁇ O SEL6 .
• microprocessor activates the IO/M and WR outputs to enable the production of the I/O W signal by inverter 48, and activates the SOD output.
• the presence of these signals causes flip-flop 52 to produce the SERIAL IN signal, which is inputted to bar ⁇ code microprocessor 60.
• the presence of the SERIAL IN signal activates transistor 64 which in turn activates barcode reader 50 via lines EN and V+.
• a bingo card 27 bearing a strip of bar code is moved across bar code reader 50.
• the bar code on the bingo card which is in the "3 of 9 Code" format, is then serially received by barcode microprocessor 60 via the DIG IN line.
• Barcode microprocessor 60 first converts this digital information into the ASCII format and then for- wards it to microprocessor 30 in a serial fashion via the SID line. These data, representing the matrix of one bingo card 27, are first converted by microprocessor 30 into the BCD format. Microprocessor 30 then outputs this information to RAM 36 in a parallel fashion via outputs ADO through AD7 and A8 through A10.
• beeper 62 is then activated, via transistor 68, to notify the player that the bar code information has been properly received by game monitor 12. In the event that the player scanned a bingo card that had already been scanned, the program returns to the beginning of the routine.
• microprocessor 30 After receiving the bar code information from barcode entry means 54, microprocessor 30 then outputs the serial number of this bingo card to alphanumeric display means 22, Microprocessor 30 outputs the appropriate signals such that multiplexer 32 outputs an ⁇ SE 5 ' signal and in ⁇ verter 48 outputs an I/O W signal.
• the absence of a low signal at input RS of LCD 80 permits LCD 80 to receive data from microprocessor 30 and to display alphanumerics. Thus, data are transmitted from microprocessor 30 to LCD 80 via data latch 40.
• LCD 80 may display messages such as "INPUT NEXT CARD", or a variety of messages. If 50 bingo cards have been received, barcode reader 50 is then disabled, and the program returns to the idle routine.
• the player selects the type of game he wishes to play, i.e., the conventional bingo game in which the winning configurations are the horizontals, verticals, diagonals and the corners, or some other form of the game
• the player would select this type of game by keying in the numerals "01" on the keys of switch array 70.
• This selection is verified by display devices 88a an 88b.
• the possible winning configurations ar also displayed, sequentially, on positional display means 26. Additional alphanumeric messages may be displayed by LCD 80.
• the program may be diverted to the routine shown in Figure 12D.
• one bit of a nu meral stored in RAM 36 is set aside to indicate that that number had been called out.
• the most signi- ficant bit of an eight-bit word may be used for this pur ⁇ pose.
• the numeral two may be stored at "0000 0010" in RA 36. If this numeral had been called by the announcer, th most significant bit is changed to one, i.e., "1000 0010" In this routine, the most significant bit of that numeral is returned to zero and the routine returns to the IDLE routine.
• microprocessor 30 searches RAM 36 to detect whether a match exists and then checks to see whe ⁇ ther all the numerals of a winning configuration have bee called. If no winning configuration is detected, the rou tine returns to the routine of Figure 12A.
• Microprocessor 30 outputs the appropriate signals such - that multiplexer 32 outputs a 10 SEL7 signal and device 42d outputs the I/O W signal. Upon receipt of these sig ⁇ nals, OR gate 94 outputs a signal that operates registers 92a, 92b and 92c, and flip-flop 92d. Microprocessor 30 then outputs a serial data on the SOD line which propa- gates through positional display means 26. For example, if the winning configuration is the vertical of column 1 , then diodes D1 through D5 would be activated. If the win ning configuration is the horizontal of row 1, then diode 1, 6, 11, 16 and 21 would be- activated. In addition, if more than one configuration is detected, then these win ⁇ ning configurations are displayed sequentially. The seri al number of the winning bingo card is also displayed on LCD 80. ' . , "
• the routine then awaits instructions from the player to begin again the play mode. For example, clear the mos significant bits of all entries in RAM 36, causing the program to exit to the routine of Figure 12D. Or, delete a called-out numeral from RAM 36, causing the program to exit to the routine of Figure 12E. Or, changing the type of game being played, as illustrated in Figure 12C.
• a strip o conventional magnetic tape may be substituted.
• the numerals of a bingo card are coded and written onto the magnetic tape.
• the magnetic tape is then positioned onto the bingo card.
• the coding of the numerals may be one of several conventional coding methods.
• a magnetic tape reader is substituted for barcode reader 50, a magnetic reader operating means is substituted for barcode operating mean 52, and matrix processing means is substituted for barcod processing means 54.
• the magnetic tape reader is capable of transforming the coded numerals into digital data for further processing by microprocessor 60 of automatic -matrix entry means 16.

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• Engineering & Computer Science (AREA)
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• Telephone Function (AREA)
• Memory System Of A Hierarchy Structure (AREA)
• Lubrication Of Internal Combustion Engines (AREA)
• Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
• Management, Administration, Business Operations System, And Electronic Commerce (AREA)
• Input From Keyboards Or The Like (AREA)

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• 1986
  • 1986-02-19 JP JP61501359A patent/JPS62501823A/ja active Pending
  • 1986-02-19 DE DE19863690088 patent/DE3690088T1/de not_active Withdrawn
  • 1986-02-19 WO PCT/US1986/000358 patent/WO1986004826A1/en active Application Filing
  • 1986-02-19 AU AU54580/86A patent/AU5458086A/en not_active Abandoned
  • 1986-02-19 GB GB08624813A patent/GB2180970A/en not_active Withdrawn

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