Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/02—Details
  • H01L31/0224—Electrodes
  • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
  • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
  • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
  • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/547—Monocrystalline silicon PV cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• This invention pertains to the manufacture of photovoltaic cells and more particularly to an improved low-cost method of fabricating polycrystalline silicon solar cells wherein the damaged surface layer generated during hydrogen passi ⁇ vation is used as a plating mask for the metallization of the front surface electrodes.
• a common method of fabricating silicon solar cells has included the steps of forming a PN junction by diffusing a suitable dopant into the front side of a silicon wafer or ribbon, etching a grid electrode pattern in a protective dielectric masking layer formed on that front surface, depositing a nickel plating on all silicon exposed by the etching, solder dipping or overplating the nickel with copper and tin, removing the remainder of the dielectric masking layer from the front surface, and providing an anti-reflection coating on the newly exposed portions of the front surface.
• the altered surface layer produced in hydrogen ion beam passivation may be used as a plating mask for subsequent metallization steps.
• a preferred embodiment of the pro ⁇ cess described in detail therein as applied to the manufacture of silicon solar cells involves, inter alia, the following steps: (1) forming a plating mask of a dielectric material on the front surface of a shallow-junction silicon ribbon so as to leave exposed those areas of the silicon to be later covered by the front surface electrode, (2) depositing a thin layer of nickel (or similar material) on the exposed sili ⁇ con, (3) removing the plating mask, (4) hydrogen passivating the junction side of the ribbon, (5) sin ⁇ tering the nickel to form in part a nickel silicide, (6) plating additional metal(s) onto the metal-covered portions of the cell, and (7) anti-reflection coating the exposed surface of the silicon.
• the silicon may be further processed, e.g. to prepare it for connection to electrical circuits.
• the passiva ⁇ tion alters the exposed surface of the junction side of the substrate so that it serves as a mask for the secondary plating step (6) .
• the heating of the sample during passivation supplies at least part of the energy for the nickel sintering step.
• a negative plating mask i.e., a mask covering only those areas of the front surface to be later covered by the front surface electrode
• a negative plating mask i.e., a mask covering only those areas of the front surface to be later covered by the front surface electrode
• a removable and reusable mechanical mask is used to shadow-cast the ion beam used for hydrogen passivation onto the front surface of the substrate.
• the altered surface layer produced by the ion beam passing through the apertures in the mask forms a plating mask delimiting the areas of sub ⁇ sequent front surface metallization by immersion plating.
• the preferred embo ⁇ diment of the invention relates to the production of solar cells from EFG grown P-type silicon ribbon.
• one side hereafter the "front side"
• a phosphorus dif ⁇ fusion process calculated to produce a relatively shallow junction 4 (i.e., a junction of between about 3,000 and about 7,000 Angstrom units deep), and an N-type conductivity region 6.
• a sili ⁇ con ribbon of P-type conductivity made by the EFG process and having a resistivity of about 5 ohm-cm is cleaned by etching in a solution of HNO3(70%) :HF(49%) in a ratio of between about 4:1 and 9:1 for about one to three minutes at a temperature of about 25 * C. Thereafter the ribbon is subjected to a phosphorus diffusion process, as well known in the art.
• a layer of phophosilicate glass 8 formed as detailed in U.S. Patent 4,152,824 may be used as a source for the phosphorus dopant.
• the layer of phosphosilicate glass 8 is etched away by immersing the substrate in a buffered HF solution.
• (P2O5) x (Si ⁇ 2)y/ a phosphosilicate glass may be removed from the substrate by submerging the latter in IONH4F(40%) :1HF at a temperature of bet ⁇ ween about 25*C and about 40*C for a period of between about 15 seconds and 2 minutes.
• the aluminum paste used to form layer 10 preferably comprises aluminum powder in a volatile organic vehicle, such as terpineol, that can be removed by evaporation.
• This step is then followed by an alloying step in which the substrate is heated for about 0.25 to 2.0 minutes at a temperature greater than about 575*C to remove any volatile or pyrolyzable organic components of the paste and to alloy the aluminum in the paste to the silicon substrate.
• the aluminum coating 10 alloys with the back side of the substrate to form a P + region 12 having a depth of from about 1 to about 5 microns.
• a pre ⁇ ferred method is to expose the front surface of substrate 2 to the hydrogen ion beam of a Kaufman-type (broad beam) ion source situated about 15 cm from the substrate.
• a mask 14 is positioned between the ion source and the substrate.
• This ion source is preferably operated at a pressure of between about 20 and 50 millitorr (of hydrogen) , with a hydrogen flow rate on the order of about 25 to 40 s.c.c. per minute, with a potential of about 1700 volts d.c. between source and substrate, and with a beam current of be ⁇ tween about 1 and 3 milliampere/cm2 at the substrate.
• An exposure time of between about 1 and about 4 minutes has been found adequate both to mini ⁇ mize the minority carrier recombination losses typi ⁇ cally experienced with EFG-type silicon cells (providing a passivation zone some 20 to 80 microns deep, or about 100 times as deep as junction 4) while simultaneously providing an altered surface layer 18 approximately 200 Angstrom units deep on the exposed portions of substrate 2.
• altered surface layer 18 is not known. However, it is believed to be a damaged zone wherein the crystal structure has been somewhat disrupted, the silicon in part forming SiH or SiH2 with hydrogen from the ion beam, yet wherein the material is possibly amorphous. A small amount of carbon or one or more hydrocarbons appear to be necessary for the formation of the desired altered surface layer.
• the Kaufman ion source used was equipped with a graphite mounting stage about 5 inches (c. 13 cm) in diameter on which the substrates, typically 2 by 4 inches (5 by 10 cm) on a side, were centrally located.
• the altered layer did not perform as a plating mask as well as when the graphite stage was employed.
• carbon or hydrocarbon vapor formed by the impact of the hydrogen ion beam on the graphite stage may form a dielectric layer on the surface of the substrate.
• an altered surface layer 18 produced in accor ⁇ dance with this procedure with accelerating voltages between about 1400 and about 1700 volts and exposure times as short as 1 minute is sufficient to prevent subsequent immersion plating metallization of the substrate over altered layer 18.
• Mask 14 is a metallic reticle in the pattern of the desired multi-fingered grid electrode, e.g., an electrode having the form illustrated in U.S. Patent 3,686,036.
• Mask 14 is preferably fabricated of molyb ⁇ denum, although other metals such as invar, stainless steel, titanium, nickel, or the like, or graphite and similar high temperature non-metallic materials could also be used.
• Mask 14 is positioned, relative to the front surface of substrate 2 and the ion beam source, so as to shadow-cast the desired electrode grid pat ⁇ tern onto the front surface 20 when the ion beam source is activated. That is to say, mask 14 obstructs ion beam 16 in the desired electrode grid pattern while permitting irradiation of the substrate in the inter-electrode areas.
• Both sides of the substrate are immersion plated with nickel, an adhesive deposition of nickel forming a nickel layer 22 on the back side over the entire area of the aluminum coating 10, while the adhesive deposi ⁇ tion of nickel on the front side forms a nickel layer 20 directly on the surface of substrate 2 only over those areas free of altered surface layer 18.
• the altered surface layer 18 of the silicon forms a plating mask to which the nickel does not adhere.
• Immersion plating of the nickel layers may be done in various ways. Preferably it is accomplished in accordance with an immersion nickel plating process like or similar to the process described in U.S. Patent No. 4,321,283 of Kirit Patel, et al.
• immersion plating designates a process wherein an object is plated without the use of an externally applied electric field by immersing it in a plating bath that does not contain a reducing agent, and the plating involves a displacement reaction.
• electroless plating designates plating without the use of an externally applied electric field by immersing the object to be plated in a plating bath that contains a reducing agent.
• the cleaned silicon substrate surface is pre-activated with a suitable agent.
• a suitable agent e.g. platinum chloride, stannous chloride - palladium chloride, or other well known activators may be used, as described, for instance, in U. S. Patent No. 3,489,603.
• both sides of the silicon ribbon are coated with a layer of nickel, preferably by immersing the ribbon in an aqueous bath as described in said U.S. Patent No. 4321283, or in an aqueous bath of nickel sulfamate and ammonium fluoride at a pH of about 2.9 and at approximately room temperature for a period of about 2 to 6 minutes.
• the substrate is heated in an inert atmosphere or a mixture such as nitrogen and hydrogen to a temperature and for a time sufficient to sinter the nickel layers and cause the nickel layer 20 on the front side of the substrate to react with the adjacent silicon to form a nickel suicide ohmic contact.
• the substrate is preferably heated to a temperature of about 300*C for between about 15 and about 40 minutes. This provides a nickel suicide layer with a depth of about 300 Angstrom units at the interface between nickel layer 20 and substrate 2.
• the nickel layer 22 on the rear side forms an alloy with aluminum layer 10.
• the temperature of this sintering step should not greatly exceed 300*C, as higher temperatures lead to a poor quality nickel layer 20, and, as previously noted, may cause some of the passivating hydrogen to diffuse back out of the substrate material.
• the deposition and sintering of the nickel is controlled such that nickel layer 20 on the front side of the substrate has a thickness of no more than about 750 Angstrom units.
• the nickel of layers 20 and 22 are preferably subjected to etching, as with nitric acid, and to further metallization, as with a second layer of nickel and one or more layers of copper.
• the additional nickel is applied by immersion plating, preferably in the manner previously described for formation of layers 20 and 22 since the added nickel will plate onto layers 20 and 22 but not onto the exposed areas of altered layer 18.
• copper is applied by immersion plating and/or electroplating, by techniques well known in the art. No masking of altered layer 18 is required since copper formed by immersion plating or electroplating will not adhere to the altered surface 18.
• an anti-reflection coating 24 is applied to the front surface of the cell. This may be accomplished by any of a number of known methods, such as by chemical vapor deposition or evaporation of, for instance, Ti ⁇ 2- Alternatively, an anti- reflection coating 24 may be formed by the plasma deposition of silicon nitride at a temperature of about 150*C, as is well known in the art.
• the preferred method of prac ⁇ ticing the present invention comprises performing the individual steps set forth hereinabove in the pre ⁇ ferred mode described in detail for each step and in the sequence set forth.
• the process of the present invention greatly simplifies production of solar cells.
• the method not only greatly reduces the number of steps required in the process but also eli- minates the use of much nonrecoverable material.
• the present method eliminates the need to coat, expose, and develop such a resist, together with the required step of removing remaining resist. Similar con ⁇ siderations apply to equivalent processes of chemical milling.
• the process detailed hereinabove may be modified without departing in scope from the invention.
• the preferred embodiment of the method of the present invention makes use of the altered layer formed by hydrogen passivation to mask subsequent plating except on earlier plated nickel
• the method may be used with other metals than nickel.
• the initial layer of the front surface electrodes on a shallow junction silicon device may be deposited by immersion plating any of a number of low reactivity materials capable of forming (preferably at a low temperature) an ohmic contact and serving as a barrier to the dif ⁇ fusion of copper or any other base metal deposited at a later stage.
• Suitable metals for use with copper include palladium, platinum, cobalt, and rhodium, as well as nickel. While all of these materials form suicides, a silicide layer is not essential. It is important, however, that the initial metal layer adhere properly, serve as an ohmic contact, and act as a barrier to the migration of any metal deposited later, as well as not significantly migrating to the junction itself.
• nickel or other low reactivity material such as palladium, platinum, cobalt and rho ⁇ dium
• forming the junction by ion implantation If no masking layer is deposited over the altered layer, the added nickel (or other low reactivity metal of the type described) must be applied by immer ⁇ sion plating.
• the process provided by this invention is not limited to the production of solar cells from EFG substrates.
• cast poly ⁇ crystalline substrates, epitaxial silicon on metallurgical grade silicon or fine grade polysilicon layers formed by chemical or physical vapor deposition can be used to form relatively high efficiency solar cells according to the present invention.
• the process is applicable to single crystal silicon. Then, too, the process may be practiced with N-type as well as P-type substrates.
• junction may be formed by various processes, and not merely through phosphorous diffusion. Since these and other changes may be made in the above processes without departing from the scope of the invention herein involved, it is intended that all matter contained in the above description or shown in the accompanying drawing shall be interpreted in an illustrative and not a limiting sense.

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• 1984
  • 1984-12-14 DE DE19843490611 patent/DE3490611T1/de not_active Withdrawn
  • 1984-12-14 AU AU38890/85A patent/AU573696B2/en not_active Ceased
  • 1984-12-14 EP EP19850900536 patent/EP0165990A4/en not_active Withdrawn
  • 1984-12-14 GB GB08516878A patent/GB2162998B/en not_active Expired
  • 1984-12-14 WO PCT/US1984/002066 patent/WO1985002943A1/en not_active Application Discontinuation
  • 1984-12-14 NL NL8420337A patent/NL8420337A/nl unknown
  • 1984-12-14 CH CH3597/85A patent/CH668861A5/de not_active IP Right Cessation
• 1985
  • 1985-08-16 SE SE8503835A patent/SE456626B/sv not_active IP Right Cessation

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