Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
  • H04L12/40—Bus networks
  • H04L12/403—Bus networks with centralised control, e.g. polling
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B3/00—Line transmission systems
  • H04B3/54—Systems for transmission via power distribution lines
  • H04B3/542—Systems for transmission via power distribution lines the information being in digital form
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B2203/00—Indexing scheme relating to line transmission systems
  • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
  • H04B2203/5404—Methods of transmitting or receiving signals via power distribution lines
  • H04B2203/5408—Methods of transmitting or receiving signals via power distribution lines using protocols
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B2203/00—Indexing scheme relating to line transmission systems
  • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
  • H04B2203/5404—Methods of transmitting or receiving signals via power distribution lines
  • H04B2203/5416—Methods of transmitting or receiving signals via power distribution lines by adding signals to the wave form of the power source
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B2203/00—Indexing scheme relating to line transmission systems
  • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
  • H04B2203/5429—Applications for powerline communications
  • H04B2203/5445—Local network
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B2203/00—Indexing scheme relating to line transmission systems
  • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
  • H04B2203/5429—Applications for powerline communications
  • H04B2203/5458—Monitor sensor; Alarm systems
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B2203/00—Indexing scheme relating to line transmission systems
  • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
  • H04B2203/5462—Systems for power line communications
  • H04B2203/5491—Systems for power line communications using filtering and bypassing
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B2203/00—Indexing scheme relating to line transmission systems
  • H04B2203/54—Aspects of powerline communications not already covered by H04B3/54 and its subgroups
  • H04B2203/5462—Systems for power line communications
  • H04B2203/5495—Systems for power line communications having measurements and testing channel

Definitions

• the present invention relates generally to comput ⁇ erized data communications systems, and more specifically to a computer system for monitoring a plurality of remote elec ⁇ trically operated devices such as slot machines wherein the data bus incorporates the electrical power lines supplying the remote devices.
• the remote devices may be geographically dispersed (e.g. computer terminals in various cities), or may be rela ⁇ tively proximate one another in a single building (e.g. heating and ventilation controls) .
• the common denominator is information transfer, regardless of whether the information is to be used for accounting, security, energy conservation, or some other purpose.
• phase shift keying is most often carried out by having the transmitter constantly sending the carrier signal so that the receiver can remain in constant synchronization. Needless to say, this cannot be done if two-way communication is to be carried out over the same telemetry lines. In such a case, separate clocks at the transmitter and receiver are maintained in constant synchronization during data transmis-
• C PI sion by means of a phase locked loop which derives its timing from the bit changes themselves.
• the use of a phase locked loop is less than optimal since it requires a considerable amount of critically designed circuitry and involves a signi- ficant amount of lockup time in order to synchronize the clocks.
• a spurious signal has the effect of throwing the phase locked loop out of lock so as to destroy the data, even if the spurious signal itself didn't represent a threat to data integrity.
• Slot machines are but one example of devices whose operation is characterized by substantial cash flow and thus present accounting and security problems. In the context of a gambling casino, a large number of machines are located in a room which is accessible to the public at all times.
• Each machine is characterized by a payout ratio that is slightly less than one hundred percent so that on the average the casino retains a small share of the total money passing through the machines.
• Overall profitability depends on having a large number of slot machines operating twenty-four hours a day, seven days a week, so that the effects of statistical anomalies are eliminated and the small percentage retained by the casino is applied to a large base to provide a large positive cash flow increment.
• the present invention provides a computerized monitoring system which eliminates all down time for retro ⁇ fitting except for the modest time required to provide each individual remote device with its own internal sensor unit. This is accomplished by incorporating the power lines that provide electrical power to the remote devices as the physi- cal communications medium of a serial data bus for the com ⁇ puter system.
• the computerized communications system comprises a central computer and a plurality of computerized sensor modules within the individual slot machines.
• the central computer and the individual sensor modules are capable of and include means for sending and receiving signals to and from one another, the significance of the signals to be described more fully below.
• the central computer and each of the sensor modules has associated with it a respective data link for coupling the respective signal generating and receiving means to the power distribution lines and for manipulating the signals to and from a form suitable for transmission on the power distribution lines.
• Phase shift keying is used wherein binary bits of data are represented as 180° phase shifts of the pulses in a carrier pulse train.'
• a data trans- mission rate of approximately 15,000 baud with a carrier frequency of 120 kHz is typical.
• Communication may occur between any two devices, but in the preferred embodiment, communication is initiated by the central computer which sequentially polls individual sensor modules within the slot machines on a regular cyclical basis.
• Each slot machine sensor module is assigned a serial number for identification purposes.
• the polling signal includes a preamble of pure carrier frequency, followed by the serial number of the device being polled, followed by the data (or instructions) defining the message content.
• Each data link has its own clock for generating a pulse train at a frequency very close to the common carrier frequency, and includes means for bringing its own carrier frequency pulse train approximately into a predetermined phase relationship with the carrier train that is appearing on the power lines. This is typically done by stepping the phase by 90° incre ⁇ ments until the local clock is in proper phase.
• serial number portion of the message begins, all data links are synchronized with the carrier in order to be able to interpret the serial number.
• each device ascertains whether the message is destined for it, and if so, receives and acts on the message.
• the message from the main computer requests the transmission from the remote sensor of some data. If the transmission from the remote sensor occurs substantially immediately, the central computer is already synchronized with the sensor.
• the electrical power distribution lines represent an extremely noisy environment and thus an unlikely medium for messages where error free data transmission is a prerequisite.
• the noise on the electrical lines arises from the various device drawing electrical power such as motors with arcing brushes and solid state control units characterized by extremely sharp changes in current conduction. While some potential sources of electrical interference may be filtered, sharp pulses contain power at virtually all frequencies, and canno be filtered.
• the mes ⁇ sage formats are designed to achieve substantially error fre data transfer.
• messages are kept short, and suitable parity checks and other error detection techniques are employed. If a reasonable probability of error is detected, the message is ignored completely rather than any attempt being made to reconstruct it.
• the remote sensor does not answer, signifying to the central computer that an error occurred. If the error occurred in a message from a remote sensor, the central computer disregards the message and retransmits. It should be noted that synchronization of the receiving data link clock with the transmitting data link clock occurs once only at the beginning of the message.
• each data link has means for changing (for example, halving) the carrier frequency if it is determined that messages at the original frequency are not getting through without error. This capability lowers the probability that data transmission is totally interfered with.
• Each sensor module has a sensor/interface which provides signals to monitor the significant events in the slot machine operation, such as the receipt of coins, the turning of the reels, the payout of coins, and the opening o the slot machine door.
• a typical machine generates 50 volt AC signals for energizing the payout motor and for incremen- ting electromechanical counters that keep track of coin destinations and the like.
• the sensor/interface provides signals corresponding to the AC signals in the machine, signals indicative of the coin path followed by a coin, signals representative of the movement and timing of the reels, and a signal representative of the position of the door.
• no mech ⁇ anical connection is made to the working mechanical compo ⁇ nents of the machine and electrical connections are kept to minimum.
• the electromechanical signals regarding the state of the slot machine are monitored by a plurality of opto/isolators assemblies. While an electrical connection i made to sense the electrical signals originating in the machine, the connection is one-way; while the sensor module can respond to the AC signals, it cannot influence them. Th passage of a coin through the machine is monitored by a plur
• OMPI ality of optical interruption detector assemblies placed at locations to detect a coin coming into the machine, a coin being paid out, a coin entering the safe, and a coin enterin the hopper. These optical interruption detector assemblies also serve to verify the proper functioning of the slot machines own electromechanical counters. The motion of the reels is monitored by a plurality of reflected light senors which change their respective states as alternating dark and light portions on the reels pass by. An additional reflecte light sensor is mounted proximate the door of the slot machine and cooperates with a reflective target mounted on the door to provide a signal that is representative of the distance between the sensor and the reflective target.
• This signal in the form of a voltage, is communicated through a voltage controlled oscillator, so that by monitoring the frequency of the signal from the voltage controlled oscilla ⁇ tor, it is possible to verify that the door is indeed closed or that the door is opened under proper authorization.
• FIG. 1 is a simplified electrical schematic for th power distribution system in a hypothetical casino
• Fig. 2 is a block diagram of the communication system utilizing the electrical power distribution lines
• Fig. 3 is a block diagram of the data link associ ⁇ ated with one of the slot machines;
• Figs. 5A and 5B taken together, form a circuit schematic of the slot machine sensor and interface
• Fig. 6 is a schematic of alternate reel monitoring circuitry
• Figs. 7A and 7B taken together, form a circuit schematic of the communications processor; and Fig. 8 is a diagram illustrating the system message format.
• DETAILED DESCRIPTION OF THE INVENTION Overview provides a computer ⁇ ized monitoring system which uses the power lines that pro ⁇ vide electrical power to the monitored devices as the physi ⁇ cal data communications medium of the computer data bus.
• the description that follows will be with reference to monitoring a plurality of slot machines in a casino.
• Fig. 1 is a schematic block diagram showing a typical power distribution system for a hypothetical casino.
• the data is transmitted at fre ⁇ quencies greatly in excess of the 60 Hz at which AC power is supplied.
• a data rate of 10 kHz (10,000 baud) superimposed on a carrier frequency in the range of 50-200 kHz is typical.
• the important elements of the system include a central computer system 10 and a plurality of specially outfitted slot machines 12. For definiteness, assume that a first group 15 of slot machines, all of which operate on 110 volts, is located on the ground floor of the casino; and that a second group 17, a first subgroup 18 of which operates on 220 volts and a second subgroup 19 of which operates on 110 volts, is located on the mezzanine floor of the casino.
• ground floor slot machines 15, and mezzanine slot machines 17 are powered from respective isolated secondary windings 20, 22, and 25 of a main transformer 27. Power from the transformer secondaries is communicated to respective electrical panels 30, 32, and 35 which typically provide circuit breakers for individual circuits served by that panel. A stepdown transformer 36 is provided between panel 25 and slot machine subgroup 19. It is immediately apparent that the power lines do not provide a suitable communication medium.when isolated transformer secondaries are used. To overcome this, couplin capacitors are installed to provide a continuous current pat for high frequency signals. In particular, coupling capaci ⁇ tors 37 are installed between corresponding terminals of primaries 20 and 22, and coupling capacitors 40 are installe between corresponding terminals of secondaries 22 and 25.
• coupling capacitors 42 are installed across th circuit breakers in computer room breaker panel 30 and acros any other breakers where it is desired to keep the communica tion lines open in the event of a breaker opening. Also, since power to slot machine subgroup 19 is stepped down from 220 volts to 110 volts, capacitors 45 are connected between corresponding primary and secondary terminals of transformer 20. The value of the capacitors is not critical; 0.1 micro ⁇ farad bidirectional capacitors rated at 1200 volts are suitable.
• FIG. 2 is a block diagram showing central computer system 10 and several specially outfitted slot machines 12 connected to a common power line 60, which for purposes of electrical signals at high frequencies, may be considered a continuous two-conductor line.
• Central compute system 10 includes a mini-computer 65 which receives its electrical power from line 60, a communications processor 67, and a central computer data link 70 that is coupled to power line 60 by suitable capacitors 72.
• Communications processor 67 transfers data between mini-computer 65 and central com ⁇ puter data link 70.
• Each slot machine 12 includes the slot machine proper, designated by reference numeral 75, and a sensor subassembly 80 which includes a sensor/interface 82, a microcomputer 85, and a slot machine data link 87.
• Slot machine data link 87 is coupled to power distribution line 60
• Each slot machine data link 87 is sub ⁇ stantially the same as central computer data link 70.
• Fig. 3 is a block diagram illustrating the basic elements of data link 87 and its interaction with micropro ⁇ cessor 85. It should be understood that electronic compo ⁇ nents in data link 87, microcomputer 85, and sensor/interface 82 derive their electrical power from power supply circuitry 91 coupled to power distribution line 60. Broadly, phase shift keying is used to superimpose binary bits on a carrier (clock) frequency in the range 50-200 (60 or 120 kHz being preferred) kHz with bit changes being signified by a 180° phase shift from the basic carrier.
• Data link 87 includes clock circuitry 92, transmitting circuitry 93, receiving circuitry 94, and phase comparison circuitry 95.
• the clock frequency is supplied to transmitting circuitry 93 on a line 96 and to phase comparison circuitry 95 on a line 97 by clock circuitry 92 which receives a 240 kHz square wave from an ALE output 100 of microprocessor 85.
• Microprocessor 85 is driven by a local crystal oscillator 101 which ultimately defines the ALE output.
• a data output 102 of microprocessor 85, designated PHASE, controls the phase of clock 92.
• Clock circuitry 92 includes flip-flops 120 and 122, each of which provides a frequency division by a factor of 2.
• a 2-to-l multiplexer 123 is controlled by a line 124, designated X2, so that flip-flop 120 may be selectively by-
• CVPI f ⁇ +> passed to avoid one of the frequency divisions.
• line 96 is in fact a pair of complementary output line from the and outputs of flip-flop 122 while line 97 is coupled to the output only.
• An Exclusive OR (XOR) gate 12 is interposed between the flip-flops, and has one of its inputs controlled by PHASE output 102.
• Flip-flop 122 is triggered by a rising edge with the result that each transi ⁇ tion at PHASE output 102 causes a 90° phase shift on lines 9 and 97.
• XMIT output 105 is also coupled to PHASE output 102 through a 10K resistor 127.
• Microprocessor 85 has an internal 50K pullup resistor on PHASE output 102, so that a low level at XMIT output 105 actually holds PHASE output 102 low.
• microprocessor 85 specifies a high level at output 102, it sends a short high pulse which it expects would keep output 102 high. The result is that PHASE output 102 goes high and is quickly pulled low by XMIT output 105.
• XMIT output 105 an instruction to set PHASE output 102 high results in an upward and a downward transi ⁇ tion at that output which causes a 180° phase change at the outputs of flip-flop 122.
• the output lines of flip-flop 122 that define line 96 are coupled to first inputs of respective AND gates 130 and 132 within gate circuitry 104.
• the second inputs are controlled by XMIT output 105 so that the output ultimately is controlled by the level on XMIT output 105.
• Driving circuitry 111 includes driving transistors in a push/pull configuration to produce a square wave that replicates the Q output from flip-flop 122. Unless XMIT output 105 is low, no pulses are produced by driver 111.
• Low pass filter 112 is typically a 200 kHz low pass filter.
• the square wave from driver 111 is then filtered to suppress radiofrequency sig ⁇ nals and capacitively coupled to line 60, with the resulting sine wave being communicated to all the other data links in the system.
• Incoming signals on power line 60 are passed by coupling capacitor 90 to a data input line 138 and trans- mitted to receiving circuitry 94 which includes a high pass filter 140, limiting circuitry 142, and suitable amplifica ⁇ tion circuitry 145 to provide a square wave at the carrier frequency and in constant phase relationship with the incom ⁇ ing signal.
• the square wave is fed to the first input of an XOR gate 150, the other input of which receives the clock signal from locally controlled clock 92 on line 97.
• the output of XOR gate 150 depends on the relative phase between the two signals.
• an XOR gate is such that the output is a pulse train at twice the carrier frequency with the duty cycle (fraction of time high) varying linearly from 0 to 1 as the phase difference varies from 0 to + 180°.
• the two signals are precisely in phase, a uniform low level is output; if out of phase, a uniform high level is output. If the signals are 90° out of phase, a square wave at twice the carrier frequency is at the output.
• the output is passed through a low pass filter 152 in order to produce a level that is directly representative of the duty cycle and hence the phase difference.
• phase difference of + 90° is unsuit- able for data recognition, since a 180° phase shift of the incoming data results in a phase difference of ; j ;90 o , which produces the same level at the output of low pass filter 152
• the level is passed to discriminator circuitry 160 that applies level test and a so-called strict test and provides two output signals that are communicated to respective test inputs 162 and 165 of microprocessor 85.
• the level at input 162 is high or low depending on the output from low pass filter 152 while the level at input 165 indicates whether th level from low pass filter 152 is sufficiently far removed from the halfway level that 180° phase shifts are reliably recognizable. If it is determined that the phase difference between the incoming signal and the receiving data link cloc is generally near + 90°, microprocessor 85 steps the phase b 90°.
• Low pass filter 152 is preferably a second order active low pass filter with the component parameters chosen to define a corner frequency 2/3 the baud rate with 6 db/octave attenuation above the corner.
• Discriminator circuitry 160 includes a center thresholder 167 with 10% hysteresis to feed test input 162 for the level test, and a window comparator 170 with comparison points at one-third and two-thirds the voltage to feed test input 165 for the strict test.
• the status of test inputs 162 and 165 may be rapidly checked by microprocessor 85.
• the output from low pass filter 152 will also be at the halfway level when there is no
• each data link can, when desired, "listen” for signals at the carrier frequency by periodically stepping the clock phase by 90° to see if the output from low pass filter 152 passes the strict test. Once a signal at the carrier frequency is found, shifts in the level from low pass filter 152 denote shifts i the binary bits.
• a slot machine has a plurality of coaxial adjacent reels, each having a plurality of pictorial symbols on its cylindrical surface.
• An operator places one or more coins in a slot, an pulls a handle. This causes the reels to turn independently of one another, and depending on the configuration of aligne symbols when the reels stop, coins may be paid out in varyin amounts.
• the significant events in the slot machine opera ⁇ tion are the receipt of coins, the turning of the reels, the payout of coins, and the opening of the slot machine door which allows casino personnel to gain access to the machine' interior. From an accounting and security point of view, useful information can be gained by suitable monitoring of the machine with respect to any and all of these events.
• a mechanical sorter Upon insertion of a coin into the slot machine, a mechanical sorter makes an initial determination that the coin is an acceptable coin of a particular denomination. Th downward passage of the coin then actuates a icroswitch to initiate the machine cycle. The coin then falls into a
• O ⁇ .-H hopper where it is available for payout, or, if the hopper i full, into a safe at the bottom of the machine where it is n longer available for payout.
• a typical machine generates 50 volt AC signals for energizing the payout motor and for incrementing electromechanical counters that keep track of information such as the number of coins accepted, the number of coins entering the hopper, and the like.
• Figs. 5A and 5B taken together, form a circuit schematic of sensor/interface 82.
• the sensor/inter face provides signals corresponding to the AC signals in the machine, signals indicative of the coin path followed by a coin, signals representative of the movement and timing of the reels, and a signal representative of the position of th door.
• the general requirement to ensure slot machine integ- rity is that no mechanical connection be made to the working mechanical components of the machine and that electrical connections be kept to a minimum.
• Each opto/isolator assembly includes an opto/isolator 182, itself comprising a light emitting diode (LED) 182a and a phototransistor 182b, and a thresholder 185.
• LED 182a is energized by the presence of 50 volt, 60 cycle signals within the machine and turns photo- transistor 182b on to provide an electrical signal which is passed through thresholder 185 to an appropriate data input of microcomputer 85.
• LED 182a is energized by the presence of 50 volt, 60 cycle signals within the machine and turns photo- transistor 182b on to provide an electrical signal which is passed through thresholder 185 to an appropriate data input of microcomputer 85.
• the connec ⁇ tion is one-way; while microcomputer 85 can respond to the AC signals, it cannot influence them.
• opto/isolator assemblies 180 that are coupled to respective sources of signals representing a coin coming into the machine, a coin being paid out of the
• Each optical interruption detector assembly 190 includes a an LED 192 on a first side of the expected coin path, a cooperating phototransistor 195 on the opposite side, and a thresholder 197.
• the passage of a coin between LED 192 and phototransistor 195 causes an electrical pulse which is communicated through thresholder 197 to an appropriate data input of microcomputer 85.
• there are four such optical interruption detector assemblies placed at locations to detect a coin coming into the machine, a coin being paid out, a coin entering the safe, and a coin entering the hopper.
• optical interruption detector assemblies 190 serve to also verify the proper functioning of the electromechanical count ⁇ ers. With respect to the coin entering the machine, it is preferable to have the particular optical interruption detector assembly 190 proximate the microswitch which ini ⁇ tiates the machine cycle so that microcomputer 85 can detect an attempt to repeatedly actuate the microswitch with a coin on a string.
• the motion of the reels, fragmentary portions being designated 199, is monitored by a plurality of individual reel motion detectors 200, each of which comprises a re ⁇ flected light sensor 202 and a thresholder 205.
• Sensor 202 changes its state as alternating dark and light portions on the reels pass by, and the change in state is electrically communicated through thresholder 205 to an appropriate date input of microcomputer 85.
• An additional reflected light sensor 210 is mounted proximate the door of the slot machine and co- operates with a reflective target 212 mounted on the door to provide a signal that is representative of the distance between sensor 210 and reflective target 212.
• Sensor 210 provides a precise reading of door position over the last centimeter or so of door travel prior to the door's closing.
• This signal in the form of a voltage, is communicated through a voltage controlled oscillator 215 to microcomputer 85.
• Microcomputer 85 can monitor the frequency of the signa from voltage controlled oscillator 215 in order to verify that the door is indeed closed, or that the door is opened under proper authorization.
• microcomputer 85 In order for microcomputer 85 to properly respond to system messages being communicated over power line 60, an in order for the microcomputer to properly monitor the slot machine functioning, it is necessary to have access to infor mation unique to its own particular slot machine. In addi ⁇ tion to an identification number for the slot machine, there are timing parameters and other quantities that are charac ⁇ teristic of that machine and vary from one machine to an ⁇ other. This information is preferably stored in a separate memory chip 220, designated a slot machine memory. Slot machine memory 220 must be non-volatile so that the appro- priate parameters are not lost during a power interruption.
• slot machine memory 220 If it is desired to also maintain long term registers (such as total number of cycles that the slot machine has under ⁇ gone), it is necessary that memory locations within slot machine memory 220 be capable of being updated. These re- quirements are met by using a CMOS RAM for slot machine memory 220, and providing a battery 221 for backup when normal power is absent. The address information is latched at memory address latches 222 on the falling edge of the ALE signal. Address and data are transmitted on microcomputer data bus 223 in a time multiplexed fashion.
• alternating changes in state of reflected light sensors 202 signify the movement of reels 199, and thus give information on reel velocity.
• Fig. 6 is a circuit schematic of alternate reel monitoring circuitry capable of monitoring the reel's position as well as its velocity, being suitable for use where the reels are charac ⁇ terized by unidirectional rotation. While only one reel's associated circuitry is shown, the identical circuitry is provided for each of reels 199.
• Each of reels 199 is pro ⁇ vided with marker such as a contrasting dot 225 at a prede ⁇ termined position, preferably near an edge of the cylindrical surface of reel 199.
• the basic purpose of the circuitry is to use dot 225 as a reference and to count the number of symbols passing after the dot in order to gain a precise indication of the reel position.
• a first reflected light sensor 227 (comprising an LED 227a and a phototransistor 227b) directed toward the symbols on the reel
• a second reflected light sensor 230 (comprising an LED 230a and a phototransistor 230b) directed at the axial portion of the reel where dot 225 is located.
• An oscillator circuit 232 which may comprise a timer and appropriate passive compo- nents, energizes LEDs 227a and 228a at a predetermined fre ⁇ quency, preferably 700 Hz.
• a 700 Hz signal is inter ⁇ mittently generated at phototransistor 227b during the per- iods that light is being reflected.
• the signals from photo ⁇ transistor 227b are passed through 700 Hz band pass circuitry 235, and thence to 700 Hz detection circuitry 240.
• Circuitry 235 is characterized by a gain of 5 and value of 3 to amplify and filter the signals in order to provide a clean 700 Hz signal during those intervals when light is being reflected.
• Detection circuitry 240 tuned to the same 700 Hz frequency provides an output signal pulse for each picture that goes by sensor 227. These pulses are passed to a 5-bit counter 245 which provides a numeric representation of the position of reel 199.
• Phototransistor 228b provides a 700 Hz signal during those portions of the rotation of the reel that light
• FIG. 7 is a simplified circuit schematic of communications processor 67.
• communications processor fulfills two mai functions.
• the first is reconfiguring the data between the format for transmission onto or reception from the power lines and the format for central minicomputer 65.
• the secon function is bidirectional voltage isolation.
• Communication processor 67 comprises a microproces- sor 260 which is coupled to central computer data link 70 in the same manner that microcomputer 85 is coupled to slot machine data link 87.
• Microprocessor 260 communicates to a universal synchronous/asynchronous receiver and transmitter (hereinafter USART) 262.
• USART 262 transmits signals on lines 265 and 267 to the LED (input) side of an opto/isolator 270, and receives signals on lines 272 and 273 from the phototransistor (output) side of an opto/isolator 274.
• O PI WIPO link 70, microprocessor 260, and USART 262 receive their electrical power from a common power supply.and the signals are TTL compatible. Signals " at the phototransistor side of opto/isolator 270 and at the LED side of opto/isolator 274 are communicated to minicomputer 65 at 19,200 baud.
• a sepa ⁇ rate power supply 275 provides +12 volt, +5 volt, 0 volt, an -12 volt levels so that the signals are EIA spec RS-232 compatible.
• a standard communication between central minicom ⁇ puter 65 and one of slot machines 12 occurs between communi ⁇ cations processor microprocessor 260 and microcomputer 85 with the transmitted data being applied to and extracted fro power line 60 by central computer data link 70 and slot machine data link 87.
• such standard message includes an initial message from the central computer and a response from the slot machine.
• microcomputer 85 is essentially doing two things. First, it is monitoring the various signals from sensor/inte face 82 and updating various of its own counters and status registers (to be described below). Second, and simultaneous ly, it is carrying out a communications protocol with the rest of the system. The slot machine monitoring is carried out at a standard program level while the system communica- tions is carried out an interrupt level of the microprocessor.
• the polling message from central mini computer 65 begins with a preamble of pure carrier frequency to enable each microcomputer 85 to get synchronized with the carrier frequency in order that the subsequently transmitted message can be successfully demodulated.
• the preamble has a dura ⁇ tion, designated Tl, that is typically 4-12 standard bit times, depending on transfer characteristics.
• the standard bit time, designated T2 is determined by the baud rate and may be approximately 1/30,000th to 1/10,000th of a second.
• the message content is included in two frames, eac having 11 bits, namely a start bit, 8 bits of data, an odd parity bit, and a stop bit.
• the start bit is defined by a 180° phase shift relative to the preamble and is defined to be a data '0' . Subsequent bit changes are signified by further 180° phase shifts.
• the stop bit is defined to be a data '1' .
• the first frame includes data bits 0-7 while the second frame includes data bits 8-15. Data bits 0-11 form a 12-bit address while data bits 12-15 define a 4-bit command code, thus providing for 16 possible commands.
• the response begins with a preamble of pure carrie frequency having a duration, designated T3, that is approxi ⁇ mately 2 standard bit times.
• This preamble is not required for synchronization (since the response occurs substantially immediately after the polling message), but rather serves to define the start of the first response frame.
• the total response may be 1-4 frames in length, each frame of which has 11 bits as in the polling message.
• communications from the central computer are caused to occur in a predictable time slot at a constant repetition rate.
• the time slot is suffici- ently long to accommodate the preamble, the two frames of message, and up to four frames of response.
• microcomputer 85 The interval between the start of the preamble on subsequent polls is a system constant.
• An internal timer in microcomputer 85 generates an interrupt that signifies that it is time to receive a message from communications processor 67, at which time, data link 87 hunts for the preamble at the carrier frequency and synchronizes as described above so that the message may be received. This occurs in each sensor module.
• microcomputer 85 and data link 87 On start up of a particular sensor module, in order that the time slots may be established, microcomputer 85 and data link 87 must constantly search for carrier frequency by periodically stepping the clock phase by 90° as described
• the microcomputer uses its very accurate internal timer and sets it to a quantity such that it will be inter ⁇ rupted by its own timer at exactly the time of the start of the next preamble.
• microcomputer 85 remains powered, it will stay in basic synchronization by starting its timer again from when it receives the stop bit at the end of frame 2 of the message from the communications processor.
• the communications processor must do an analogous timing so that it sends out preamble at this specified rate to be followed by commands that it is ordered to send by central minicomputer 65.
• synchronization takes place at two levels. First, on powering up of any particular one of remote microcomputers 85, that microcomputer's inter ⁇ nal timer is synchronized with the polling messages that are being transmitted at fixed intervals from communications processor 67. Second, on each polling, a signal at the carrier frequency must be found and the clock synchronized in order to receive data.
• microcomputer 85 is constantly monitoring the signals from sensor/interface 82 in order to ascertain the status of slot machine 75. Most of the time is spent awaiting a signal from the "coin in” sensor to indicate that a coin has been dropped into the machine. When this happens, microcomputer 85 updates the appropriate counters and waits for another coin to be inserted or for the slot machine handle to be pulled and the reels to start spinning. Once this has occurred, microcomputer 85 goes into the next phase of the cycle and waits for the reels to stop, checks their timing, and checks for payout, if there any. Turning next to the particular commands and re ⁇ sponses, it should be understood that the following is an illustrative format. For security reasons, the particular significance of the bits is likely to be different from one casino to the next, and furthermore is likely to be changed
• the 16 command codes and the length of the expecte response for each are shown in Table 1. It should be re ⁇ called that up to four frames (32 bits) may be accommodated.
• Group Poll 1 (2 bit times) for each of 16 machines
• OM ⁇ I Command type 0 is a group poll wherein groups of machines are polled to quickly see if any machines have data to transmit.
• the expected response is one bit for each member of a polled group of 16 slot machines, although the response for a given slot machine actually extends over two bit times.
• carrier frequency in phase with the signal during the stop bit is sent for the first bit time and then a 180° phase shift is introduced if there is a message to transmit. After polling in this fashion, the central computer can individually poll those machines with data to report.
• Command type 1 requests the return of an 8-bit status register.
• the particular significance of the status register bits is shown in Table 2 wherein a designated occur- rence is signified by that bit's being a '1'.
• Command type 2 request the return of an 8 bit cycle phase code register.
• Various slot machines are set up so they can take some number of coins on a particular cycle prior to the handle's being pulled. Bits 0-3 are coded to indicate the number of coins that have been accepted while bits 4-7 are coded to indicate what part of the cycle the slot machine is currently in.
• the particular bit allocation and cycle phase codes are shown in Table 3.
• Command type 3 requests the return of an 8-bit error code.
• the type of error codes can be representative of states arising out of equipment failure, normally occurring events, or intentional attempts to defraud the machine. Typical situations for the latter are if the machine timing is changed due to someone's having drilled a small hole in the machine and inserted a wire to affect the governor or other movement of the wheel, or if the machine has been subjected to a large magnetic field to affect the operation.
• Command type 5 requests the return of a 24-bit counter representative of the number of coins that have been put into the machine.
• Command type 6 requests the return of a 24-bit counter representative of the number of coins that have been paid out in the past.
• Command type 7 requests the return of a 24-bit counter representative of the number of coins that have gone into the hopper.
• Command type 8 is requests the return of a 24-bit counter representative of the number of coins that have gone into the safe.
• Command type 9 requests the return of a 16-bit counter representative of the number of coins that were paid out on the last cycle.
• Command type 10 requests the return of the last payout code which is a 16-bit number that contains coded information regarding what combination came up on the reels and is used to verify that a particular machine has come up with a winning combination when it starts to pay.
• Command type 11 requests the return of a 24-bit data check code which is the sum of the number of coins in, the number of coins out, the number of coins in the hopper, and the number of coins in the safe. It is used to detect that one of these quantities changed since the last time the machine was interrogated.
• Command type 12 instructs microcomputer 85 to select the alternate carrier frequency from whenever it may be at the time, and, when it gets to that other carrier fre ⁇ quency, to return the status register.
• Command type 13 instructs microcomputer 85 to clea the error code and return the status, but this will only occur if the previous command to the particular microcompute
• OMPI VT O was a type 3 command to return the error code. Otherwise th response to the command is merely to return the status register but not to clear the error code.
• Command type 14 requests return of the 24-bit cycl number of the last cycle on which an error occurred.
• Command type 15 requests that the return of an 8-bit check code for the last message. This is a checksum which is used to verify the accuracy of certain types of information that have been transferred.
• Microcomputer 85 takes the 8-bit data frames that were in the last message, sums up the individual frames, and comes up with an 8-bit two's complement number that is sent out as a response.
• the present inven ⁇ tion provides a computerized monitoring and communications system that is characterized by simplicity and reliability while providing high data transfer rates under highly inhos ⁇ pitable conditions. While the above provides a full and complete disclosure of the preferred embodiments of the invention, various modifications, alternate constructions, and equivalents may be employed without departing from the true spirit and scope of the invention. For example, the system is clearly applicable to remote devices other than slot machines. Therefore, the above description and illus ⁇ trations should not be construed as limiting the scope of th invention which is defined by the appended claims.

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  • 1982-09-27 GB GB08412482A patent/GB2140659B/en not_active Expired
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  • 1982-09-27 WO PCT/US1982/001334 patent/WO1984001482A1/en unknown
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