WO1990015491A1 - Data communication apparatus - Google Patents

Data communication apparatus Download PDF

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Publication number
WO1990015491A1
WO1990015491A1 PCT/GB1990/000816 GB9000816W WO9015491A1 WO 1990015491 A1 WO1990015491 A1 WO 1990015491A1 GB 9000816 W GB9000816 W GB 9000816W WO 9015491 A1 WO9015491 A1 WO 9015491A1
Authority
WO
WIPO (PCT)
Prior art keywords
cabling
data
slave
unit
slave units
Prior art date
Application number
PCT/GB1990/000816
Other languages
French (fr)
Inventor
John Allen
Original Assignee
M-Net Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by M-Net Limited filed Critical M-Net Limited
Publication of WO1990015491A1 publication Critical patent/WO1990015491A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/54Systems for transmission via power distribution lines
    • H04B3/542Systems for transmission via power distribution lines the information being in digital form
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5404Methods of transmitting or receiving signals via power distribution lines
    • H04B2203/5408Methods of transmitting or receiving signals via power distribution lines using protocols
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5404Methods of transmitting or receiving signals via power distribution lines
    • H04B2203/5416Methods of transmitting or receiving signals via power distribution lines by adding signals to the wave form of the power source
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2203/00Indexing scheme relating to line transmission systems
    • H04B2203/54Aspects of powerline communications not already covered by H04B3/54 and its subgroups
    • H04B2203/5429Applications for powerline communications
    • H04B2203/5441Wireless systems or telephone

Definitions

  • the present invention relates to data communication apparatus, in particular though not exclusively, for enabling computers and computer peripheral devices to communicate data from one to another.
  • data device includes computers, such as a personal computer; computer peripheral devices, suc as a printer; and any other device which is capable of producing a digital electronic signal having an information content.
  • Apparatus exists to enable computers to communicate.
  • Such apparatus employs modems via which digital dat modulates or is demodulated from a carrier frequency transmitted from one modem to another, a modem being provided one for one with each computer or other data device.
  • Modems are available both for transmission of data via telephone lin and via mains electricity supply lines. The latter are limit in their speed of operation such that in practice a small number - in the teens - only of data devices can communicate a single system, comprising the data devices, modems and main wiring.
  • the reason for the device number limitation is that if to many devices and their modems are included in the system, unacceptable delays occur in communication.
  • the object of the present invention is to provide improve communication apparatus, whereby a greater number of data devices can be included in the system.
  • the invention achieves this object by providing within th system a "master unit” controlling the occurrence of data transmission between "slave units”, conveniently in accordanc with a disciplined protocol.
  • An important preferred feature o the inverition is that data transmission from one data device t another is allowed to occur only in discrete "packages" of defined maximum length. Such a package may be of insufficient length for the entire data transmission between the two devices, but the protocol can permit data packages to be transmitted between other pairs or more of devices in an interleaved manner, whereby there is no appreciable delay in initiation of transmission/reception at a particular device, and especially no queuing and concommittant delay before transmission occurs.
  • the cabling is conveniently mains electricity cabling.
  • signal transmission is via the neutral/earth pair.
  • Connection to the cabling can be effected within the casings of the master and slave units to their power leads.
  • the master unit does not need to process the information data signals passing between the slave units.
  • the master unit is conveniently adapted for signal handling in the same way as the slave units handle data signals.
  • the slave units communicate data in modulated radio frequency form and the master unit accordingly is preferably equipped with a modem unit for transmitting signals to the cabling and receiving them therefrom.
  • a modulation device for transferring logic information to and from a conductive line comprising:- a modulator for superimposing a logic signal onto a radio frequency carrier signal, the modulator having:- a carrier frequency input terminal, a logic signal input terminal, an output terminal for connection to the conductiv »e line and switching means having an input, an enable terminal and an output, the switching means being adapted to switch its output between one predetermined voltage state and another predetermined voltage state in accordance with voltage at its input when enabled and to exhibit a high output impedance stat when disabled, and the switching means being arranged with its input connected to the said carrier frequency input terminal, its enable terminal connected to the said logic signal input terminal and its output connected to the said output terminal, whereby an output signal switched between the two said predetermined voltage states at
  • the master unit of the apparatus is preferably adapted to selectively interrogate at least some of the slave units as to whether they have information data to transmit.
  • the apparatus operates in accordance with a protocol whereby the master and slave units are adapted to operate as follows: the mast ⁇ r unit interrogates the slave units in cycles of a weighted or non-weighted sequence, any - transmitting - one of the slave units requiring to transmit data to another - target - slave unit identifies itself as such, and preferably the master unit interrogates the target slave unit as to whether it is ready to receive and enables the transmitting slave unit to transmit.
  • the slave units are adapted to transmit information data in discrete packages of limited length (of time or bit qu ⁇ ntity) and to identify if there is more information to transmit, whereby if the transmitting slave unit has more information than can be contained within one package, the master unit enables it to continue transmission at its turn in the next cycle of the interrogation sequence.
  • the master unit transmits the slave identity signal of at least each slave uni which is adapted to transmit data signals in turn in progressive sequence or alternatively in a sequence weighted towards those slave units expected to transmit most often. Th sequence may be non-weighted and include transmission of the slave identity signals for slave units able to receive only.
  • such signals may be transmitted only when a potentially transmitting slave unit's identity signal has been responded to by a signal indicating that the state of that slave unit is a "ready to transmit to slave unit X" state. Then the master unit will immediately transmit the signal identifying slave unit X to engender a "ready to receive" signal from it - if such is the case. The master unit then retransmits the signal identifying the slave unit which is ready to transmit, followed by a further signal indicating tha slave unit X is ready to receive - if such is the case. If slave unit X is not ready, the further signal indicates this and data transmission is inhibited.
  • interrogation of the target slave unit enabling of the transmitting slave unit and transmittal of the information fro transmitting to target slave unit, as described below in respect of the preferred embodiment the interrogation can occu n one cycle and the information transmission in the subsequen cycle.
  • the master unit successively transmits the slave identifying signal of each slave in turn, together with received, slave-unit state-indicating signals as appropriate.
  • the slave units are essentially passive in transmitting both state indicating and data signals only in response to signals from the master unit. However in order to allow interleaving of data transmission by various slave units, and avoidance of delay whilst one unit transmits an excessively long data signal, the slave units are preferably adapted to transmit dat of a predetermined length, which may be established in terms o a predetermined transmission time or a predetermined number of information bits or indeed a number of information bits determined by ambient conditions.
  • dat transmission may be preceded by the slave unit identifying signal of the target unit, possibly together with a further signal enabling the target unit to receive.
  • the master unit has a protocol such that immediately on receiving a "ready to transmit to slave unit X" signal, it has interrogated that slave unit and established for the transmitting unit that X is ready, then it is unnecessary for the target unit to be further identified since it can have bee enabled to receive for the predetermined time and so be uniquely ready to receive the imminent data transmission.
  • the master unit will normally be a stand alone unit, it is possible for it to be provided in the form of a circuit board to be accommodated in the rack of computer and connected to its bus. Such arrangement facilitates modification of its protocol if appropriate.
  • the slave unit's data devices are computers or dumb terminals the slave units are envisaged to be normally provided as circuit boards to be inserted therein.
  • the slave unit may be a stand alone unit connected to the data device through its (or one of its) ports.
  • Both the master unit and the slave units can be essentially similar as regards their circuitry - although the master unit is programmed differently from the slave units.
  • the units preferably comprise a micro-processor integrated circuit and an associated ROM circuit, which may be integral, a clock, circuits for inputting and outputting data to the micro-processor circuit and modulation and demodulation circuits.
  • the slave units additionally comprise an interface circuit for connection of the micro-processor circuit to the unit's data device. They may also include a RAM circuit, where they are required to incorporate a data buffer.
  • the master unit additionally comprises a RAM circuit to enable it to remember the identity of the intended target slave unit and the associated identity of the slave unit which is ready to transmit, and then the response of the target unit for reply to the other slave unit.
  • the master and slave units ar embodied as circuits having identical circuits including an identically programmed microprocessor chip, except that certai connections external to the chip identify whether the circuit is configured as a master or a slave unit.
  • Figure 1 is a diagram of apparatus according to the invention including one master unit and ten slave units incorporated in a network system of ten data devices in one building;
  • FIG. 2 is a block diagram of the master unit of the apparatus of Figure 1;
  • FIG. 3 is a block diagram of one of the slave units of the apparatus of Figure 1;
  • Figure 4 is a circuit diagram of the master unit or a slave unit according to its configuration
  • FIGS 5, 6 and 7 are flow charts for three successive cycles of transmissions and receptions of the master unit, showing communication of the master unit with each of the slave units in turn;
  • Figure 8 is a flow chart of the three cycle of Figures 5, 6 and 7 showing receptions from the master unit and transmissions to target slave units from two data transmitting slave units (receptions in the cycles to which the transmitting slave units do not react are omitted for the sake of clarity) ;
  • Figure 9 is a flow chart of the three cycles of Figures 5, 6 and 7 showing receptions of data transmissions and their acknowledgement by two target slave units (receptions in the cycles to which the target slave units do not react are omitted for the sake of clarity).
  • the system 1 incorporates a master unit M ⁇ and ten slave units SUl,S ⁇ 2,SU3,SU4,S ⁇ 5,SU6,SU7,S ⁇ 8,SU9,SUl0 of the invention.
  • the slave units are all connected to a mains electric cable 2 which incorporates a radio frequency filter 3 at the external supply end thereof to prevent signals from the system 1 leaving the building in which the system is installed.
  • the slave units are connected one-for-one to ten data devices
  • DD1,DD2,DD3,DD4,DD5,DD6,DD7,DD8,DD9,DD10 which may be computers, dumb terminals, printers or the like.
  • the master unit MU comprises a micro-processor circuit 11, having peripherally connected to it a ROM circuit 12, a RAM circuit 13, a clock 14, a data input circuit 15 and a data output circuit 16.
  • a demodulator circui 17 is connected between the data input circuit 15 and the neutral and earth leads N,E of the power input cable 18 (also including a live lead L) to a power unit 19.
  • a modulator circuit 20 is connected between the data output circuit 16 and the leads N and E.
  • the power input cable 18 is connected to the mains electric cable 2 by a conventional plug and socket - not shown.
  • the clock 14 not only times the micro-processor circuit 11, but also the modulator circuit 20 to operate at 12 KHz.
  • a typical slave unit SU is shown in Figure 3. It incorporates the following components having exact counterpart in the master unit M ⁇ :- micro-processor circuit 21, ROM circuit 22, clock 24, data input circuit 25, data output circuit 26, demodulator circuit 27, power input cable 28, power unit 29, modulator circuit 30. Additionally, the slave unit SU has an interface circuit 31 connected between its data device DD and the micro-processor curcuit 21.
  • FIG. 4 there is shown a circuit diagram of a unit which can be configured either as a master unit or as a slave unit. It comprises a Z8 embedded controller chip 41 programmed for operation either as a master unit or as a slave unit. It has external connections 42 which identify whether i is configured as a master or slave. A 12MHz crystal 43 is connected to the chip for timing it to operate at a modulated radio frequency of 125kHz. Connector circuits 44,45 provide interfaces as required. For transmission of signals to the neutral line N, the chip 41 is connected to a tristate gate 46 or a plurality of such gates in parallel for sufficient power, in series with a resistor 47 and a capacitor 48. These components constitute a modulator as described in more detail in the above referenced International application. The four stage demodulator 49 is also described in that application, to which reference should be made for further details thereof.
  • the chip 41 contains sufficient ROM and RAM for operation of the units.
  • the connecto circuits 44,45 are configured as Centronics compatible output ports which will each drive a parallel printer.
  • one of the connector circuits 44,45 is configured as one Centronics compatible inpu port connected to the printer port of the computer and the other is connected to a dil switch bank which is used to set the unit's identification number, mode of operation and test modes.
  • one of the connector circuits 44,45 is configured as one
  • Centronics compatible output port for a parallel printer and the other is connected to a dil switch bank which is used to set the unit's identification number, mode of operation and test modes.
  • a dil switch bank which is used to set the unit's identification number, mode of operation and test modes.
  • an RS 232 serial board may be added to this configuration of slave unit.
  • cycle 1 asking whether the slave unit is ready to receive. If the response is YRR, the master unit memorizes this - or the fact that the target slave unit has failed to respond or has responded in some other way indicatin that it is not ready to receive.
  • cycle 1 shows slave unit SU10 being interrogated, following a request by slave unit SU8 to transmi to it, and responding in the affirmative.
  • Cycle 2 Figure 6 shows normal polling of slave units SU1 to SU4 and SU5 being interrogated as to whether it is ready to receive. Normal polling continues for SU6 and SU7. Slave uni SU8 has its identity signal transmitted followed by a further signal "SU10YRR" indicating that SU10 is ready to receive. SU responds with its identity signal, then that of SU10, then a data package DPI and a further RTSU8 indicating that there is more data for SU8. The master unit also receives a further signal SU10DR indicating that SU10 has received and is acknowledging receipt of the data.
  • Cycle 3 contains normal polling except for transmission of a second package of data DP2 from SU8 to SU10.
  • Figure 8 shows events through the cycles 1,2 and 3 at the transmitting slave units SU8 and SU10. (All slave units will be continually receiving transmission for other slave units an this is ignored.)
  • the micro-processor 21 and ROM 22 are programmed to react only to signals prefixed by its own identity signal.
  • the slave unit SU8 has prior to cycle 1 received commands from its data device DD8 to the effect that it wishes to transmit to slave unit SU10. When it receives it identity signal it then responds with its identity signal followed by RTSU10, as mentioned above.
  • cycle 2 SU8 receives its identity signal from the master unit in its turn followed by SU10RR indicating that SU1 is ready. SU8 then transmits its identity signal, followed by that of SU10 - its target -, the first package of data DPI and RTSU10 requesting further transmission to SU10. SU10 acknowledges the first data package by transmitting DR after its identity signal.
  • SU9 transmits an entire, shorter data package DPI' to SU5.
  • SU8 completes its transmission to SU10 with its second data package DP2. It wil therefore be noted that SU9's transmission was interleaved wit that of SU8.
  • Figure 9 shows events through the cycles 1,2 and 3 at the target slave units SU10 and SU5.
  • SU10 is interrogated as to whether it is ready to receive. It replies in the affirmative by transmitting its own identity signal followed by YRR indicating that it is ready to receive. in the next cycle, at its turn, this information is transmitte to slave unit SU8 as described above, and this responds with its transmission of its first data package DPI.
  • SU10 acknowledges this by transmitting its identity code followed DR. Shortly afterwards, at the turn of SU10 itself, it is interrogated as to whether it is ready for reception of furth transmission to which it replies in the affirmative with its identity signal followed by YRR.
  • slave unit SU5 is interrogated at its tu as to whether it is ready, to which it replies YRR. Then at the turn of the transmitting slave unit SU9, the transmission occurs and is acknowledged.
  • FIG. 9 illustrates not only the interleaving of transmission of data where the total character content is too much for one package, but also that two events occur in each cycle to a target slave unit for each transmission. By contrast only one event occurs per cycle to a transmitting slave unit, which indicates that it wishes to transmit in one cycle and does so in the next.
  • the apparatus operates with a modulation frequency of 125 KHz, which enables a nominal 860 character p second transmission rate. This is fast enough for four printers to be kept continuously printing by four computers.
  • the protocol can modified to dispense with acknowledgements of data transmission; to eliminate requests to transmit where a signa indicating that another package is waiting is transmitted at the end of any other than the last package; to poll only like transmitting slave units in a normal cycle and to interrogate target slave units only on request to transmit to them; to po more frequently priority transmitting slave units; and to pol irregularly whereby interrogation is speedily effected allowin a longer time than the interrogation time for transmission.
  • secure transmission is required amongst a subset of the slave units, they can be provided with encryption/decryption circuits whereby their transmission is unintelligible if erroneously received at other slave units.
  • the programming of the micro-processors in the master units and/or the slave unit may be modified at will, possibly under the control of one of the computers in the system. Thus when for instance heavy traffic is expected between certain of the slave units, these can be given priority in the protocol. It should be particularly noted that although the above described embodimen is suitable for use with office computers, the apparatus of the invention is suitable for use in other applications such as for interconnecting numerically controlled machines in a factory.

Abstract

Data communication apparatus enables data devices DD1-DD10 to communicate via electronically conductive cabling (2) and comprises a master unit MU adapted for connection to the cabling and a plurality of slave units SU1-SU10 corresponding in number to the number of data devices DD1-DD10 enabled to communicate, the slave units being adapted for connection to the cabling and to the data devices. The master device MU is an electronic data processing device adapted to transmit via the cabling (2) in accordance with a protocol respective signals both identifying the individual slave units SU1-SU10 and enabling transmission therefrom as appropriate and to receive signals via the cabling from the slave units indicative of their state. Each slave unit SU1-SU10 is an electronic data processing device adapted to receive the identity signals via the cabling (2) and to respond uniquely to its own signal by transmitting signals via the cabling indicative of its state, by transmitting information data signals from its data device to the cabling and/or by receiving data signals from the cabling for its data device.

Description

Data Communication Apparatus
Field of the Invention
The present invention relates to data communication apparatus, in particular though not exclusively, for enabling computers and computer peripheral devices to communicate data from one to another.
As used herein, the term "data device" includes computers, such as a personal computer; computer peripheral devices, suc as a printer; and any other device which is capable of producing a digital electronic signal having an information content.
Background of the Invention
Apparatus exists to enable computers to communicate. Typically such apparatus employs modems via which digital dat modulates or is demodulated from a carrier frequency transmitted from one modem to another, a modem being provided one for one with each computer or other data device. Modems are available both for transmission of data via telephone lin and via mains electricity supply lines. The latter are limit in their speed of operation such that in practice a small number - in the teens - only of data devices can communicate a single system, comprising the data devices, modems and main wiring. The reason for the device number limitation is that if to many devices and their modems are included in the system, unacceptable delays occur in communication.
Object of the Invention
The object of the present invention is to provide improve communication apparatus, whereby a greater number of data devices can be included in the system.
The Invention
The invention achieves this object by providing within th system a "master unit" controlling the occurrence of data transmission between "slave units", conveniently in accordanc with a disciplined protocol. An important preferred feature o the inverition is that data transmission from one data device t another is allowed to occur only in discrete "packages" of defined maximum length. Such a package may be of insufficient length for the entire data transmission between the two devices, but the protocol can permit data packages to be transmitted between other pairs or more of devices in an interleaved manner, whereby there is no appreciable delay in initiation of transmission/reception at a particular device, and especially no queuing and concommittant delay before transmission occurs.
Apparatus according to the invention to enable data devices to communicate via electronically conductive cabling comprises:- a master unit adapted for connection to the cabling and a plurality of slave units corresponding in number to the number of data devices enabled to communicate, the slave units being adapted for connection to the cabling and to the data devices; the master device being an electronic data processing device adapted to transmit via the cabling in accordance with a protocol respective signals both identifying the individual slave units and enabling transmission therefrom as appropriate and to receive signals via the cabling from the slave units indicative of their state; each slave unit being an electronic data processing device adapted to receive the identity signals via the cabling and to respond uniquely to its own signal by transmitting signals via the cabling indicative of its state, by transmitting information data signals from its data device to the cabling and/or by receiving data signals from the cabling for its data device.
The cabling is conveniently mains electricity cabling. Preferably signal transmission is via the neutral/earth pair. Connection to the cabling can be effected within the casings of the master and slave units to their power leads.
The master unit does not need to process the information data signals passing between the slave units. However, to facilitate handling of the slave identity and slave state indicating signals by the slave units in like manner to the information data signals, the master unit is conveniently adapted for signal handling in the same way as the slave units handle data signals. Preferably the slave units communicate data in modulated radio frequency form and the master unit accordingly is preferably equipped with a modem unit for transmitting signals to the cabling and receiving them therefrom.
The preferred form of modem is described in my co-pending International patent application No. PCT/GB 89/01384, applied for on 21st November 1989 and not yet published as at the application date of this application (nor at its priority date), hereby incorporated by reference. It describes and claims a modulation device for transferring logic information to and from a conductive line comprising:- a modulator for superimposing a logic signal onto a radio frequency carrier signal, the modulator having:- a carrier frequency input terminal, a logic signal input terminal, an output terminal for connection to the conductiv »e line and switching means having an input, an enable terminal and an output, the switching means being adapted to switch its output between one predetermined voltage state and another predetermined voltage state in accordance with voltage at its input when enabled and to exhibit a high output impedance stat when disabled, and the switching means being arranged with its input connected to the said carrier frequency input terminal, its enable terminal connected to the said logic signal input terminal and its output connected to the said output terminal, whereby an output signal switched between the two said predetermined voltage states at the carrier frequency is passe to the said output terminal of the said modulator when the switching means is enabled by one condition of the logic signal and the modulator exhibits a high output impedance in another condition of the logic signal; and a demodulator. Preferably the switching means is a tristate gate or a plurality of tristate gates connected in parallel.
The master unit of the apparatus is preferably adapted to selectively interrogate at least some of the slave units as to whether they have information data to transmit. The apparatus operates in accordance with a protocol whereby the master and slave units are adapted to operate as follows: the mastςr unit interrogates the slave units in cycles of a weighted or non-weighted sequence, any - transmitting - one of the slave units requiring to transmit data to another - target - slave unit identifies itself as such, and preferably the master unit interrogates the target slave unit as to whether it is ready to receive and enables the transmitting slave unit to transmit.
In accordance with a particular feature of the preferred protocol, the slave units are adapted to transmit information data in discrete packages of limited length (of time or bit quβntity) and to identify if there is more information to transmit, whereby if the transmitting slave unit has more information than can be contained within one package, the master unit enables it to continue transmission at its turn in the next cycle of the interrogation sequence. In more detail, under the protocol, the master unit transmits the slave identity signal of at least each slave uni which is adapted to transmit data signals in turn in progressive sequence or alternatively in a sequence weighted towards those slave units expected to transmit most often. Th sequence may be non-weighted and include transmission of the slave identity signals for slave units able to receive only. Alternatively such signals may be transmitted only when a potentially transmitting slave unit's identity signal has been responded to by a signal indicating that the state of that slave unit is a "ready to transmit to slave unit X" state. Then the master unit will immediately transmit the signal identifying slave unit X to engender a "ready to receive" signal from it - if such is the case. The master unit then retransmits the signal identifying the slave unit which is ready to transmit, followed by a further signal indicating tha slave unit X is ready to receive - if such is the case. If slave unit X is not ready, the further signal indicates this and data transmission is inhibited. As an alternative to such immediate identification of the transmitting slave unit, interrogation of the target slave unit, enabling of the transmitting slave unit and transmittal of the information fro transmitting to target slave unit, as described below in respect of the preferred embodiment the interrogation can occu n one cycle and the information transmission in the subsequen cycle.
In the non-weighted protocol, the master unit successively transmits the slave identifying signal of each slave in turn, together with received, slave-unit state-indicating signals as appropriate.
Other alternative protocols can be envisaged to be suitabl to use of the apparatus of the invention in particular systems
The slave units, preferably equipped with modems as mentioned, are essentially passive in transmitting both state indicating and data signals only in response to signals from the master unit. However in order to allow interleaving of data transmission by various slave units, and avoidance of delay whilst one unit transmits an excessively long data signal, the slave units are preferably adapted to transmit dat of a predetermined length, which may be established in terms o a predetermined transmission time or a predetermined number of information bits or indeed a number of information bits determined by ambient conditions.
Particularly when the master unit's protocol is non-weighted, in order to ensure that transmission is received only by an intended receiver slave unit (the target unit), dat transmission may be preceded by the slave unit identifying signal of the target unit, possibly together with a further signal enabling the target unit to receive. Alternatively where the master unit has a protocol such that immediately on receiving a "ready to transmit to slave unit X" signal, it has interrogated that slave unit and established for the transmitting unit that X is ready, then it is unnecessary for the target unit to be further identified since it can have bee enabled to receive for the predetermined time and so be uniquely ready to receive the imminent data transmission.
Should the data transmission be longer than the predetermined length, it ceases at the end of the permitted length, possibly with a target disenabling signal unless the target automatically disenables after the predetermined length and the master unit proceeds in accordance with its protocol, possibly enabling other units to communicate in the meanwhile until the original transmitting unit is re-enabled to transmit as before. Whilst it is envisaged that the master unit will normally be a stand alone unit, it is possible for it to be provided in the form of a circuit board to be accommodated in the rack of computer and connected to its bus. Such arrangement facilitates modification of its protocol if appropriate. on the other hand particularly where the slave unit's data devices are computers or dumb terminals the slave units are envisaged to be normally provided as circuit boards to be inserted therein. However in cases where this is inappropriate or indeed not feasible such as with a printer, the slave unit may be a stand alone unit connected to the data device through its (or one of its) ports.
Both the master unit and the slave units can be essentially similar as regards their circuitry - although the master unit is programmed differently from the slave units. The units preferably comprise a micro-processor integrated circuit and an associated ROM circuit, which may be integral, a clock, circuits for inputting and outputting data to the micro-processor circuit and modulation and demodulation circuits. The slave units additionally comprise an interface circuit for connection of the micro-processor circuit to the unit's data device. They may also include a RAM circuit, where they are required to incorporate a data buffer.
The master unit additionally comprises a RAM circuit to enable it to remember the identity of the intended target slave unit and the associated identity of the slave unit which is ready to transmit, and then the response of the target unit for reply to the other slave unit.
In the preferred embodiment, the master and slave units ar embodied as circuits having identical circuits including an identically programmed microprocessor chip, except that certai connections external to the chip identify whether the circuit is configured as a master or a slave unit.
To help understanding of the invention, a specific embodiment thereof will now be described by way of example and with reference to the accompanying drawings in which:- The Drawings
Figure 1 is a diagram of apparatus according to the invention including one master unit and ten slave units incorporated in a network system of ten data devices in one building;
Figure 2 is a block diagram of the master unit of the apparatus of Figure 1;
Figure 3 is a block diagram of one of the slave units of the apparatus of Figure 1;
Figure 4 is a circuit diagram of the master unit or a slave unit according to its configuration;
Figures 5, 6 and 7 are flow charts for three successive cycles of transmissions and receptions of the master unit, showing communication of the master unit with each of the slave units in turn;
Figure 8 is a flow chart of the three cycle of Figures 5, 6 and 7 showing receptions from the master unit and transmissions to target slave units from two data transmitting slave units (receptions in the cycles to which the transmitting slave units do not react are omitted for the sake of clarity) ; and
Figure 9 is a flow chart of the three cycles of Figures 5, 6 and 7 showing receptions of data transmissions and their acknowledgement by two target slave units (receptions in the cycles to which the target slave units do not react are omitted for the sake of clarity). The Preferred Embodiment
Referring first to Figure 1, the system 1 thereshown incorporates a master unit Mϋ and ten slave units SUl,Sϋ2,SU3,SU4,Sϋ5,SU6,SU7,Sϋ8,SU9,SUl0 of the invention.
These units are all connected to a mains electric cable 2 which incorporates a radio frequency filter 3 at the external supply end thereof to prevent signals from the system 1 leaving the building in which the system is installed. The slave units are connected one-for-one to ten data devices
DD1,DD2,DD3,DD4,DD5,DD6,DD7,DD8,DD9,DD10, which may be computers, dumb terminals, printers or the like.
Referring now to Figure 2, the master unit MU comprises a micro-processor circuit 11, having peripherally connected to it a ROM circuit 12, a RAM circuit 13, a clock 14, a data input circuit 15 and a data output circuit 16. A demodulator circui 17 is connected between the data input circuit 15 and the neutral and earth leads N,E of the power input cable 18 (also including a live lead L) to a power unit 19. A modulator circuit 20 is connected between the data output circuit 16 and the leads N and E. The power input cable 18 is connected to the mains electric cable 2 by a conventional plug and socket - not shown. The clock 14 not only times the micro-processor circuit 11, but also the modulator circuit 20 to operate at 12 KHz.
A typical slave unit SU is shown in Figure 3. It incorporates the following components having exact counterpart in the master unit Mϋ:- micro-processor circuit 21, ROM circuit 22, clock 24, data input circuit 25, data output circuit 26, demodulator circuit 27, power input cable 28, power unit 29, modulator circuit 30. Additionally, the slave unit SU has an interface circuit 31 connected between its data device DD and the micro-processor curcuit 21.
Referring to Figure 4, there is shown a circuit diagram of a unit which can be configured either as a master unit or as a slave unit. It comprises a Z8 embedded controller chip 41 programmed for operation either as a master unit or as a slave unit. It has external connections 42 which identify whether i is configured as a master or slave. A 12MHz crystal 43 is connected to the chip for timing it to operate at a modulated radio frequency of 125kHz. Connector circuits 44,45 provide interfaces as required. For transmission of signals to the neutral line N, the chip 41 is connected to a tristate gate 46 or a plurality of such gates in parallel for sufficient power, in series with a resistor 47 and a capacitor 48. These components constitute a modulator as described in more detail in the above referenced International application. The four stage demodulator 49 is also described in that application, to which reference should be made for further details thereof.
The chip 41 contains sufficient ROM and RAM for operation of the units.
When the unit is configured as a master unit, the connecto circuits 44,45 are configured as Centronics compatible output ports which will each drive a parallel printer.
When the unit is configured as a slave unit for incorporation into a personal computer, one of the connector circuits 44,45 is configured as one Centronics compatible inpu port connected to the printer port of the computer and the other is connected to a dil switch bank which is used to set the unit's identification number, mode of operation and test modes.
When the unit is configured as a slave unit for a printer, one of the connector circuits 44,45 is configured as one
Centronics compatible output port for a parallel printer and the other is connected to a dil switch bank which is used to set the unit's identification number, mode of operation and test modes. Optionally an RS 232 serial board may be added to this configuration of slave unit.
Turning now to Figures 5, 6 and 7, three cycles of the protocol with which the master unit's micro-processor 11 and its ROM 12 are programmed, are thereshown. The micro-processo successively generates signals identifying the individual slav units. This is shown by the boxes "TX:SU1ID", "TX:SU2ID" etc. Although the cycle has been abbreviated in Figure 5, these signals are generated and transmitted via the output and. modulator circuits 17,20 for all of the slave units SU1 to SU10 one after the other in the basic protocol now described. Each slave unit on recognising its identity signal will respond wit a signal indicating either that it is:- (i) NOT BUSY (NB) or
(ϋ) REQUESTING TO TRANSMIT (RT) or (iii) READY TO RECEIVE (YRR). The master unit will receive these signals via its input and demodulator circuits 16,17 and react as described below in cas of the latter two. The former - NB - engenders no response from the master unit. When, as shown in Figure 5 in respect o SU8 and SU9, the master unit receives responses RT indicating that these slave units wish to transmit to the particular slav units indicated by identity signals following the RT signal, the master unit memorizes in RAM 13 the information of which slave units wishes to transmit to which others. When next it reaches, or polls round to, the first of the target units, it transmits after the identity signal of the unit, an interrogative signal RR? - asking whether the slave unit is ready to receive. If the response is YRR, the master unit memorizes this - or the fact that the target slave unit has failed to respond or has responded in some other way indicatin that it is not ready to receive. The last two boxes of the Figure 5 cycle, cycle 1, show slave unit SU10 being interrogated, following a request by slave unit SU8 to transmi to it, and responding in the affirmative.
Cycle 2, Figure 6, shows normal polling of slave units SU1 to SU4 and SU5 being interrogated as to whether it is ready to receive. Normal polling continues for SU6 and SU7. Slave uni SU8 has its identity signal transmitted followed by a further signal "SU10YRR" indicating that SU10 is ready to receive. SU responds with its identity signal, then that of SU10, then a data package DPI and a further RTSU8 indicating that there is more data for SU8. The master unit also receives a further signal SU10DR indicating that SU10 has received and is acknowledging receipt of the data.
Next a similar series of signals occurs in respect of transmission from SU9 to SU5, except that SU9' s transmission ends with DC indicating that the data transmission is complete Finally in cycle 2 SU10 is interrogated as to whether it i ready to receive further data - from SU8.
Cycle 3, Figure 7, contains normal polling except for transmission of a second package of data DP2 from SU8 to SU10. Figure 8 shows events through the cycles 1,2 and 3 at the transmitting slave units SU8 and SU10. (All slave units will be continually receiving transmission for other slave units an this is ignored.) The micro-processor 21 and ROM 22 are programmed to react only to signals prefixed by its own identity signal. The slave unit SU8 has prior to cycle 1 received commands from its data device DD8 to the effect that it wishes to transmit to slave unit SU10. When it receives it identity signal it then responds with its identity signal followed by RTSU10, as mentioned above.
Nothing further occurs to SU8 in cycle 1, but immediately subsequent to SUδ's request, SU9 requests to transmit to SU5.
In cycle 2, SU8 receives its identity signal from the master unit in its turn followed by SU10RR indicating that SU1 is ready. SU8 then transmits its identity signal, followed by that of SU10 - its target -, the first package of data DPI and RTSU10 requesting further transmission to SU10. SU10 acknowledges the first data package by transmitting DR after its identity signal. Next in cycle 3, SU9 transmits an entire, shorter data package DPI' to SU5. Then in cycle 3 SU8 completes its transmission to SU10 with its second data package DP2. It wil therefore be noted that SU9's transmission was interleaved wit that of SU8. Figure 9 shows events through the cycles 1,2 and 3 at the target slave units SU10 and SU5. At the end of cycle 1, SU10 is interrogated as to whether it is ready to receive. It replies in the affirmative by transmitting its own identity signal followed by YRR indicating that it is ready to receive. in the next cycle, at its turn, this information is transmitte to slave unit SU8 as described above, and this responds with its transmission of its first data package DPI. SU10 acknowledges this by transmitting its identity code followed DR. Shortly afterwards, at the turn of SU10 itself, it is interrogated as to whether it is ready for reception of furth transmission to which it replies in the affirmative with its identity signal followed by YRR.
Also in cycle 2, slave unit SU5 is interrogated at its tu as to whether it is ready, to which it replies YRR. Then at the turn of the transmitting slave unit SU9, the transmission occurs and is acknowledged.
Finally in cycle 3, the second transmission occurs to SU1 Figure 9 illustrates not only the interleaving of transmission of data where the total character content is too much for one package, but also that two events occur in each cycle to a target slave unit for each transmission. By contrast only one event occurs per cycle to a transmitting slave unit, which indicates that it wishes to transmit in one cycle and does so in the next. Typically the apparatus operates with a modulation frequency of 125 KHz, which enables a nominal 860 character p second transmission rate. This is fast enough for four printers to be kept continuously printing by four computers. However it should be noted that in practice it is feasible fo considerably more than these eight machines to be interconnected by the apparatus of the invention.
The invention is not intended to be restricted to the details of the above described embodiment. The protocol can modified to dispense with acknowledgements of data transmission; to eliminate requests to transmit where a signa indicating that another package is waiting is transmitted at the end of any other than the last package; to poll only like transmitting slave units in a normal cycle and to interrogate target slave units only on request to transmit to them; to po more frequently priority transmitting slave units; and to pol irregularly whereby interrogation is speedily effected allowin a longer time than the interrogation time for transmission. Where secure transmission is required amongst a subset of the slave units, they can be provided with encryption/decryption circuits whereby their transmission is unintelligible if erroneously received at other slave units. The programming of the micro-processors in the master units and/or the slave unit may be modified at will, possibly under the control of one of the computers in the system. Thus when for instance heavy traffic is expected between certain of the slave units, these can be given priority in the protocol. It should be particularly noted that although the above described embodimen is suitable for use with office computers, the apparatus of the invention is suitable for use in other applications such as for interconnecting numerically controlled machines in a factory.

Claims

Claims
1. Data communication apparatus for enabling data devices to communicate via electronically conductive cabling comprises:- a master unit adapted for connection to the cabling and a plurality of slave units corresponding in number to the number of data devices enabled to communicate, the slave units being adapted for connection to the cabling and to the data devices; the master device being an electronic data processing device adapted to transmit via the cabling in accordance with protocol respective signals both identifying the individual slave units and enabling transmission therefrom as appropriate and to receive signals via the cabling from the slave units indicative of their state; each slave unit being an electronic data processing device adapted to receive the identity signals via the cabling and to respond uniquely to its own signal by transmitting signals via the cabling indicative of its state, by transmitting information data signals from its data device to the cabling and/or by receiving data signals from the cabling for its data device.
2. Apparatus as claimed in claim 1, wherein the apparatus is adapted for communication of the master and slave units via th neutral/earth pair of mains electricity cabling, which constitutes the said cabling.
3. Apparatus as claimed in claim 2, wherein the master and slave units are connected to the electricity cabling within casings housings containing the units.
4. Apparatus as claimed in.claim 1, claim 2 or claim 3, wherein the master and slave units are similarly programmed microprocessor devices.
5. Apparatus as claimed in claim 4, wherein the units communicate in modulated radio frequency form and the master and slave units are equipped with a respective modem unit for transmitting signals to the cabling and receiving them therefrom.
6. Apparatus as claimed in claim 5, wherein each modem unit comprises:- a modulator for superimposing a logic signal onto a radio frequency carrier signal, the modulator having:- a carrier frequency input terminal, a logic signal input terminal, an output terminal for connection to the conductive line and switching means - preferably at least one tristate gate - having an input, an enable terminal and an output, the switching means being adapted to switch its output between one predetermined voltage state and another predetermined voltage state in accordance with voltage at its input when enabled and to exhibit a high output impedance state when disabled, and th switching means being arranged with its input connected to the said carrier frequency input terminal, its enable terminal connected to the said logic signal input terminal and its output connected to the said output terminal, whereby an outpu signal switched between the two said predetermined voltage states at the carrier frequency is passed to the said output terminal of the said modulator when the switching means is enabled by one condition of the logic signal and the modulator exhibits a high output impedance in another condition of the logic signal; and a demodulator.
7. Apparatus as claimed in any preceding claim, wherein the master unit is adapted to selectively interrogate at least som of the slave units as to whether they have information data to transmit.
8. Apparatus as claimed in claim 7, wherein the apparatus operates in accordance with a protocol whereby the master and slave units are adapted to operate as follows: the master unit interrogates the slave units in cycles of weighted or non-weighted sequence and any - transmitting - one of the slave units requiring to transmit data to another - target - slave unit identifies itself as such.
9. Apparatus as claimed in claim 8, wherein in accordance wit the protocol, the master unit is further adapted to interrogat the target slave unit as to whether it is ready to receive and to enable the transmitting slave unit to transmit.
10. Apparatus as claimed in claim 9, wherein the target slave unit is uniquely enabled for information reception on interrogation by the master unit.
11. Apparatus as claimed in claim 8, wherein the target slave unit is enabled by transmission of its identity signal by the transmitting slave unit as a preface to the information signal
12. Apparatus as claimed in any one of claims 8 to 11, wherein in accordance with the protocol, the slave units are adapted t transmit information data in discrete packages of limited length and to identify if there is more information to transmit, whereby if the transmitting slave unit has more information than can be contained within one package, the master unit enables it to continue transmission at its turn in the next cycle of the interrogation sequence.
13. Apparatus as claimed in any preceding claim, wherein the master unit is accommodated in a host computer.
14. Apparatus as claimed in any preceding claim, wherein the slave units are stand alone units for one-to-one connection with data devices.
15. Apparatus as claimed in any one of claims 1 to 14, wherein the slave units are accommodated on a one-to-one basis within their data devices.
PCT/GB1990/000816 1989-05-27 1990-05-25 Data communication apparatus WO1990015491A1 (en)

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GB898912276A GB8912276D0 (en) 1989-05-27 1989-05-27 Data communication apparatus
GB8912276.6 1989-05-27

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2674996A1 (en) * 1991-04-03 1992-10-09 Sgs Thomson Microelectronics System for data exchange in a central station and remote stations
AU647276B2 (en) * 1991-05-30 1994-03-17 Fuji Electric Co., Ltd. Method and apparatus for transmitting signals on a transmission line
EP0776108A3 (en) * 1995-11-25 1998-06-17 Bernward Zimmermann Bus system in particular for electric installation
AT411315B (en) * 1996-03-16 2003-11-25 Insta Elektro Gmbh INSTALLATION BUS SYSTEM FOR A BUS RAIL LIGHTING
EP1443708A2 (en) * 2001-05-30 2004-08-04 Lg Electronics Inc. Network control system for home appliance

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Publication number Priority date Publication date Assignee Title
FR2294487A1 (en) * 1974-12-13 1976-07-09 Dassault Avions Binary data exchange with control system - uses separate wires for data and command signals and has several peripherals
WO1984001482A1 (en) * 1982-09-27 1984-04-12 Cybex Int Cash flow monitoring system
WO1989003145A1 (en) * 1987-09-25 1989-04-06 Price, Jacqueline, Ruth Network apparatus and method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2294487A1 (en) * 1974-12-13 1976-07-09 Dassault Avions Binary data exchange with control system - uses separate wires for data and command signals and has several peripherals
WO1984001482A1 (en) * 1982-09-27 1984-04-12 Cybex Int Cash flow monitoring system
WO1989003145A1 (en) * 1987-09-25 1989-04-06 Price, Jacqueline, Ruth Network apparatus and method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2674996A1 (en) * 1991-04-03 1992-10-09 Sgs Thomson Microelectronics System for data exchange in a central station and remote stations
AU647276B2 (en) * 1991-05-30 1994-03-17 Fuji Electric Co., Ltd. Method and apparatus for transmitting signals on a transmission line
EP0776108A3 (en) * 1995-11-25 1998-06-17 Bernward Zimmermann Bus system in particular for electric installation
AT411315B (en) * 1996-03-16 2003-11-25 Insta Elektro Gmbh INSTALLATION BUS SYSTEM FOR A BUS RAIL LIGHTING
EP1443708A2 (en) * 2001-05-30 2004-08-04 Lg Electronics Inc. Network control system for home appliance
EP1443708A3 (en) * 2001-05-30 2006-04-26 Lg Electronics Inc. Network control system for home appliance

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