WO1981000167A1 - Unite a memoire a bulles magnetiques avec microplaquettes montees face-a-face - Google Patents

Unite a memoire a bulles magnetiques avec microplaquettes montees face-a-face Download PDF

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Publication number
WO1981000167A1
WO1981000167A1 PCT/US1980/000746 US8000746W WO8100167A1 WO 1981000167 A1 WO1981000167 A1 WO 1981000167A1 US 8000746 W US8000746 W US 8000746W WO 8100167 A1 WO8100167 A1 WO 8100167A1
Authority
WO
WIPO (PCT)
Prior art keywords
printed circuit
chips
package
chip
circuit board
Prior art date
Application number
PCT/US1980/000746
Other languages
English (en)
Inventor
W Layton
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of WO1981000167A1 publication Critical patent/WO1981000167A1/fr

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/085—Generating magnetic fields therefor, e.g. uniform magnetic field for magnetic domain stabilisation

Definitions

  • This invention relates to magnetic bubble (domain) assemblies and more particularly to a new and improved bubble memory package arrangement with increased chip density.
  • a magnetic bubble memory package comprises one or more chips or modules containing a thin layer of garnet-like material formed on a substrate and disposed between bias magnets to provide a bias field, normal to the plane of the substrate, to establish and maintain bubbles in the garnet-like material.
  • sinusoidal type for example, field drive coils provide rotational in-plane magnetic fields and surround the substrate.
  • Means are provided to interconnect chips to one another, if there is more than one chip in the package, to control circuitry for performing various bubble manipulations in the chips, and to connect the chips to the outside world.
  • the chips mounted on the printed circuit board with the mirror image chips on the oppositely facing printed circuit board, but it has been found that by selectively arranging conductors on the printed circuit boards on v/hich the chips are mounted and selectively connecting these conductors by package leads, the chips can be connected in series or in parallel so that individual chips and/or series of chips can be selectively accessed. And as will be clear from the detailed description hereafter, depending on selected package size needs, in two embodiments disclosed, the printed circuit boards are interconnected differently.
  • the primary object of this invention is to provide a technique for interconnecting chips on oppositely facing substrates.
  • Another object of this invention is to provide a new and improved bubble memory package having increased chip density and increased bubble density over prior art packages. Still another object of this invention is to provide a unique arrangement of substrates on which magnetic bubble memory chips are mounted with selectively arranged conductors and package leads so that individual magnetic memory chips or a series of such chips can be selectively accessed.
  • Still another object is to provide a package in which the memory capacity can be doubled by adding mirror image chips in pairs with already existing "normal” chips without increasing drive coil volume (and thus inductance).
  • the package which accomplishes the foregoing objects comprises an assembly of bubble memory chips arranged in pairs one of each of the pairs having its propagation and functional elements for the -4-
  • the printed circuit boards which mount the pairs of chips will have its own interconnect conductors for interchip connection and connection to the outside world. Interconnection between the printed circuit boards is made with the leads or pins that provide interconnection to the outside world. Two embodiments of such interconnections are disclosed. BRIEF DESCRIPTION OF THE DRAWINGS
  • Figure 1 is a perspective view of one embodiment of a bubble memory package constructed according to the teachings of this invention and partially broken away to illustrate the inner details thereof.
  • Figure 2 is an exploded view of the package of Figure 1
  • Figure 3 is a partial view of the printed circuit board and chips, enlarged over Figures 1 and 2, to show the details of the boards and the interconnect conductors of the first embodiment
  • Figures 4 and 5 are cross-sectional views taken along lines 4-4 and 5-5, respectively, of Figure 1 and looking in the direction of the arrows.
  • Figure 6 is a perspective exploded view of the second embodiment of the invention having shorter printed circuit boards
  • Figure 7 is a cross-sectional view illustrating the connection of the printed circuit boards of Figure 6.
  • BRIEF DESCRIPTION OF THE PREFERRED EMBODIMENTS The drawings disclose a bubble memory package
  • bias magnets 14 and 16 having a yoke 12 which encloses bias magnets 14 and 16 and an innerassembly 18. Bias magnets 14 and 16 are connected to the yoke by an adhesive 20.
  • the yoke 12 forms the housing for the package and also forms a
  • This innerassembly includes orthagonally oriented drive coils 22 and 24 encompassing a plurality of magnetic bubble chips 26A and 26B disposed in cavities 28A and
  • the chips 26A are generally considered the "normal” or "normally mounted” chips in the art.
  • the printed circuit boards 30A and 30B are identical to The printed circuit boards 30A and 30B.
  • the bubble memory chips 26A and 26B under the influence of the magnetic field provided by the bias magnets, form and maintain bubbles in the magnetic
  • ⁇ l ) materials usually a garnet, within the chips.
  • the innerassembly 18 is canted with respect to the bias magnets 14 and 16 to provide a magnetic gradient (see Figures 4 and 5) and, on the garnet materials, are propagate elements and functional elements for
  • bubble chips 26A mounted on the lower printed circuit board 30A have storage loop architecture which is the mirror image of the architecture of the chips on the top printed circuit
  • the printed circuit boards 30A and 30B are made in three layers 40, 42 and 44 by a conventional process (although additional layers could be used), with suitable plated throughholes 46 and conductors 48 which terminate at one end in throughholes 50. The latter are adjacent the cavities 28A, 28B so that wires 52 from the pads of the bubble memory chips can be connected to the selected printed circuit board conductors.
  • conductive pads 54 On the outer edge of the printed circuit boards are conductive pads 54, only a few of which are shown, which contain the plated throughholes 46 to receive one leg of L-shaped package lead pins 56 ( Figures 2, 5 and 7). These lead pins 56 connect the chips to the outside world for suitable controls and for the insertion and retrieval of data from the chips. These package lead pins extend through the holes 46 and are connected, as by soldering, as shown at 60, to selected pads so that the lower circuit board 30A may be electrically connected to the upper circuit board
  • the lead pins permit accessing of both the chips 26A on the lower printed circuit board as well as the chips 26B on the upper printed circuit board.
  • Selected ones of the package leads can also be used for connecting the upper chips 26B to the lower chips 26A for interchip communication.
  • the size of the package in this embodiment may be determined by the number and distance between the pads 46.
  • the chips of either circuit board 30A' and 30B' can be accessed separately.
  • the size of the package may be determined by the number of chips rather than by the number of plated throughholes.
  • the lead pins 56 of the first embodiment can be connected to both printed circuit boards if it is desired to access both the normal chip and its mirror image in the embodiment together with the separate lead pins 56A' and 56B 1 .
  • lead pin 56' can be added to connect a chip on substrate 30A' with its mirror chip on the substrate 30B' without an additional pad being added and not already required of the configuration.
  • bias magnets and yoke are not shown in Figures 6 and 7, they were omitted for clarity of disclosure and where
  • 0KP1 components, etc. have the same function in Figures 6 and 7 as Figures 1-5, they are given the same reference identification plus an apostrophe to represent a prime number.
  • a bubble memory package has been disclosed in which there is interconnection by package lead pins between chips mounted face-to-face on a suitable substrate and chip density and thus bubble density has been increased by mounting the chips face-to-face utilizing common drive coils and bias magnets. Also, by selection of the printed circuit board and package lead pins, the size of the package can be selected to meet the needs of the user.

Landscapes

  • Semiconductor Memories (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

Unite a memoire a bulles magnetiques comprenant des microplaquettes de memoire a bulles (26A, 26B) disposees en paires, avec les elements de propagation et fonctionnels de manipulation des bulles, l'une des deux plaquettes de chaque paire etant l'image de miroir de l'autre, les microplaquettes etant montees sur une plaque a circuits imprimes (30A, 30B) en face-a-face et entourees d'enroulements d'entrainement espaces et orientes orthogonalement (22, 24), et des aimants de polarisation (14, 16) de support et de propagation des bulles. Chaque plaquette de chaque paire peut etre connectee en serie et en parallele par la plaque a circuits imprimes de maniere a ce qu'il soit possible d'avoir acces selectivement a des plaquettes individuelles ou a une serie de plaquettes. Deux modes de realisation d'interconnexion entre de telles plaques de circuits sont decrits pour satisfaire les conditions de connexion en serie et en parallele de l'unite de memoire selectionnee.
PCT/US1980/000746 1979-06-29 1980-06-19 Unite a memoire a bulles magnetiques avec microplaquettes montees face-a-face WO1981000167A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US5370979A 1979-06-29 1979-06-29
US53709 1979-06-29

Publications (1)

Publication Number Publication Date
WO1981000167A1 true WO1981000167A1 (fr) 1981-01-22

Family

ID=21986018

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1980/000746 WO1981000167A1 (fr) 1979-06-29 1980-06-19 Unite a memoire a bulles magnetiques avec microplaquettes montees face-a-face

Country Status (2)

Country Link
EP (1) EP0031373A1 (fr)
WO (1) WO1981000167A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3958155A (en) * 1972-06-21 1976-05-18 International Business Machines Corporation Packaged magnetic domain device having integral bias and switching magnetic field means
US4027300A (en) * 1976-05-24 1977-05-31 International Business Machines Corporation Bubble memory package
US4180863A (en) * 1978-06-30 1979-12-25 International Business Machines Corporation Magnetic domain device modular assembly

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3958155A (en) * 1972-06-21 1976-05-18 International Business Machines Corporation Packaged magnetic domain device having integral bias and switching magnetic field means
US4027300A (en) * 1976-05-24 1977-05-31 International Business Machines Corporation Bubble memory package
US4180863A (en) * 1978-06-30 1979-12-25 International Business Machines Corporation Magnetic domain device modular assembly

Also Published As

Publication number Publication date
EP0031373A1 (fr) 1981-07-08

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