USRE34484E - Gold-plated electronic components - Google Patents
Gold-plated electronic components Download PDFInfo
- Publication number
- USRE34484E USRE34484E US07/800,462 US80046291A USRE34484E US RE34484 E USRE34484 E US RE34484E US 80046291 A US80046291 A US 80046291A US RE34484 E USRE34484 E US RE34484E
- Authority
- US
- United States
- Prior art keywords
- gold
- alloy
- plated
- plated layer
- electronic components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
- C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
- C25D5/623—Porosity of the layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12535—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.] with additional, spatially distinct nonmetal component
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12771—Transition metal-base component
- Y10T428/12861—Group VIII or IB metal-base component
- Y10T428/12889—Au-base component
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/26—Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
- Y10T428/263—Coating layer not in excess of 5 mils thick or equivalent
- Y10T428/264—Up to 3 mils
- Y10T428/265—1 mil or less
Definitions
- gold Because of its superior physical properties, gold has been widely used as a plated layer on various electronic components. When gold is used in electronic components composed of metallized ceramics, it exhibits good connecting properties in bonding, brazing, soldering, etc. Since gold is very expensive, it is desired to use it in a layer having the smallest possible thickness. In spite of this strong incentive, it has not been realized for one or more reasons. For example, when the gold-plated layer is made thin, an undercoat of plated Ni or Cu, or the metallized layer diffuses into the gold-plated layer because such an undercoat layer or the metallized layer cannot be made compact, i.e., pore free. On the other hand through pinholes in the gold coating, the undercoat layer is degenerated, and discolored under heat. There are further deteriorations in heat resistance and connecting properties, such as the peeling of a silicon tip, deterioration of bonding, and poor cap attachment of an Au/Sn seal. Thus, despite the high cost, a thick gold-plated layer has been required.
- the present invention provides an electronic component having a metal surface and a gold-plated layer applied to the metal surface in which a plated layer of an alloy of nickel and cobalt or an alloy containing these metals as essential ingredients is applied to the metal surface as an undercoat for the gold-plated layer; and a process for producing such an electronic component.
- a metallized layer composed mainly of W was printed on green sheets formed from alumina and a resin.
- the green sheets were laminated and sintered to produce a standard side-braze type LSI ceramic package.
- a coating 2 microns in thickness having an Ni/Co ratio varying as shown in the table was formed from a plating bath consisting of a Watt bath as a base and cobalt sulfate as to use it as an undercoat for a gold coating.
- a gold-plated layer, 1.5 microns thick was formed from a commercially available gold plating bath ("Tempelex 401", a trademark for a product of Tanaka Noble Metals Co., Ltd.).
- Various properties of the resulting product were evaluated.
Abstract
Gold-plated electronic components are disclosed, as well as a process for producing the same, wherein an alloy of nickel and cobalt or an alloy containing these elements as essential ingredients is used as an undercoat for the gold-plated layer.
Description
This is a continuation of application Ser. No. 72,750, filed Sept. 5, 1979, now abandoned.
1. Field of the Invention
This invention relates to gold-plated electronic components and, more specifically, to electronic components of high quality having a thin gold-plated layer and to a method for their production.
2. Description of the Prior Art
Because of its superior physical properties, gold has been widely used as a plated layer on various electronic components. When gold is used in electronic components composed of metallized ceramics, it exhibits good connecting properties in bonding, brazing, soldering, etc. Since gold is very expensive, it is desired to use it in a layer having the smallest possible thickness. In spite of this strong incentive, it has not been realized for one or more reasons. For example, when the gold-plated layer is made thin, an undercoat of plated Ni or Cu, or the metallized layer diffuses into the gold-plated layer because such an undercoat layer or the metallized layer cannot be made compact, i.e., pore free. On the other hand through pinholes in the gold coating, the undercoat layer is degenerated, and discolored under heat. There are further deteriorations in heat resistance and connecting properties, such as the peeling of a silicon tip, deterioration of bonding, and poor cap attachment of an Au/Sn seal. Thus, despite the high cost, a thick gold-plated layer has been required.
In view of the state of art, extensive investigations of electronic components having a metal surface which do not undergo deterioration in performance even when overcoated with a thin gold-plated layer have been made. These investigations have led to the discovery that such electronic components can be provided by applying a plating of a special alloy as an undercoat layer for gold plating.
The present invention provides an electronic component having a metal surface and a gold-plated layer applied to the metal surface in which a plated layer of an alloy of nickel and cobalt or an alloy containing these metals as essential ingredients is applied to the metal surface as an undercoat for the gold-plated layer; and a process for producing such an electronic component.
The FIGURE is a graph showing variations in the Co/Ni ratio in an alloy coating when it is applied from an alloy plating bath having various Co/Ni ratios.
The present invention is concerned with electronic components having a gold-plated layer on a metal surface. There is no particular restriction on the metal surface to which the gold-plated layer can be formed by the present invention. Examples of the metal surface are metals which constitute ordinary electronic components such as copper, iron, and aluminum, and ceramic substrates whose surfaces are metallized with materials composed mainly of tungsten, molybdenum, or mixtures thereof. Gold-plated electronic equipment includes, for example, circuit boards for hybrid IC, IC package boards, LSI packages, boards for LED, microswitches, small switches, and connector plugs. Gold is used for a variety of purposes including the wire bonding, tip attachment and soldering (including sealing) of electronic component parts, the provision of conductors and contacts, and also for rust-proofing of these parts. The present invention is applicable to all of these applications.
The present invention is characterized by applying a plated layer of an alloy of nickel and cobalt or an alloy containing these metals as essential ingredients as an undercoat for the gold-plated layer in these electronic components. The method of applying the alloy plating is not limited. It is formed in a thickness of about 0.1 to 10 microns, preferably about 0.5 to 5 microns, by electroplating, electroless plating, etc. The preferred contents of cobalt in the alloy is from about 2 to 60% by weight, and especially from about 7 to 40% by weight. In most cases the balance of the alloy is nickel. If the cobalt content is less than 2 by weight, the heat resistance and connecting property of the resulting alloy coating are not improved appreciably. On the other hand, if the cobalt content exceeds 55% by weight, solderability becomes inferior, and moreover, this is economically disadvantageous because cobalt is much higher in price than nickel. In electroless plating, when sodium hypophosphite is used as reducing agent, the alloy will be 2 to 60% cobalt, 88 to 30% nickel and the remainder, about 10% phosphorus. When sodium borohydride is used as reducing agent, the alloy will be 2 to 60% cobalt, 95-37% nickel and the remainder, about 3% boron. Hydrazine can also be employed as reducing agent.
The plating conditions for the alloy layer are not limited. In the case of electrolytic plating ordinary Ni plating conditions may be used such as 40° to 60° C. and a current density of 1 A/dm2. In the case of electroless plating, when a hypophosphite group is used as reducing agent, the liquid temperature is 90° to 95° C. When a borohydride is used as reducing agent, liquid temperature is 70° to 80° C.
Preferably, the alloy-plated layer is treated in a non-oxidizing atmosphere, such as nitrogen, ammonia-decomposition gas, or hydrogen gas at a temperature of at least about 700° C. and preferably about 700° to 1000° C. This makes the alloy coating compact i.e., free from pores, and increases adhesion between the plated layer and its substrate.
The present inventors have examined the Co/Ni atomic ratio in the alloy coating prepared from an alloy plating bath having varying Co/Ni atomic ratios, and found that as shown in the FIGURE, cobalt deposits preferentially to nickel. To maintain the Ni/Co atomic ratio in the alloy coating constant, it is necessary to supply Co to the plating bath. A supplemental solution for this purpose should contain Ni and Co in a lower Ni/Co atomic ratio than the Ni/Co atomic ratio of the alloy plating bath. A Co/Ni atomic ratio of 0.01 to 0.3 and preferably 0.03 to 0.15 is suitable for the plating bath, but the ratio may vary outside those ranges. A plated coating of uniform quality can be obtained by performing the plating of the alloy while adding a supplemental solution, Ni and Co can also be supplied from the anode in addition to from the solutions.
After the alloy coating is formed by the above method, gold plating is performed in a known manner. Conventional electronic components have a gold plated layer usually having a thickness of about 2 to 4 microns, although the thickness varies depending upon the uses of the components. In contrast, in the present invention, the same performance can be obtained even when the thickness of the gold coating is decreased by 1 to 2 microns because a plated layer of an alloy of nickel and cobalt or an alloy containing these metals as main ingredients is formed as an undercoat for the gold-plated layer. For example, in a ceramic package for LSI, a gold-plated layer usually having a thickness of about 3 to 4 microns is formed when a nickel plated layer is applied as an undercoat. In contrast, in the present invention, the provision of a gold-plated layer having a thickness of about 1.5 to 2 microns is sufficient. The same performance as in conventional articles can be obtained even when the thickness of the gold coating is reduced. This is presumably because the inclusion of cobalt in the undercoat layer greatly inhibits the diffusion of the elements of the undercoat layer into the gold, for example, the diffusion of nickel to gold, and thus makes it possible to retain the purity of the gold-plated layer.
In spite of the thin gold-plated layer in the electronic equipment in accordance with this invention, good performance is obtained. Accordingly, the cost of production can be maintained low, and the present invention has much practical utility.
The following Examples illustrate the present invention in greater detail. It should be understood that the invention is not limited by these Examples.
A metallized layer composed mainly of W was printed on green sheets formed from alumina and a resin. The green sheets were laminated and sintered to produce a standard side-braze type LSI ceramic package. A coating 2 microns in thickness having an Ni/Co ratio varying as shown in the table was formed from a plating bath consisting of a Watt bath as a base and cobalt sulfate as to use it as an undercoat for a gold coating. Then, a gold-plated layer, 1.5 microns thick, was formed from a commercially available gold plating bath ("Tempelex 401", a trademark for a product of Tanaka Noble Metals Co., Ltd.). Various properties of the resulting product were evaluated.
Testing Methods
(1) Die Bonding Test
A silicon tip was bonded while it was scribed in N2 gas at 450° C. Those products in which at least 90% of the area around the tip was wetted with an Au/Si eutectic alloy were regarded as acceptable.
(2) Aging Test
A die-bonded sample was allowed to stand in N2 gas at 300° C., and the tip was pushed with a force of 500 g at 0, 15, 30, 50, 75, 150 and 200 hours to determine at which time peeling of the tip occurred. Those products in which the tip did not peel for at least 30 hours were regarded as acceptable.
(3) Lid Seal Test
A 1.0 t Kovar cap (with a gold plated-layer of 2.0 microns in thickness) was sealed in a hydrogen furnace at 300° C. for 6 minutes using a 50μ thick 80Au/20Sn preform. Then, a He leak test was conducted in accordance with MIL-STD 883, 1014, and those products which did not show leakage were regarded as acceptable.
(4) Lead Bending Test
A load as exerted on the lead to perform a bending test in accordance with MIL-STD 883,4004. Those products in which the plated coating was not peeled or cracked were regarded as acceptable.
(5) Solderability Test
A lead was dip-soldered in accordance with MIL-STD 883, 2003 and those products in which at least 95% of the lead was wetted with the solder were regarded as acceptable.
(6) High Temperature Standing Test
Samples were allowed to stand in atmosphere air at 175° C. for 250 hours, and those products which did not develop rust were regarded as acceptable.
For each sample tested 10 runs were made. The number of unacceptable runs out of the 10 in each of the above test (1) to (6) is shown in the following table. As is clearly seen from the table, when cobalt is included in a nickel plated undercoating, the results in each test are improved.
TABLE
__________________________________________________________________________
Aging test Lead Bending
Solderability
High Temperature
Co (%) Die Bonding
Before
After
Lid Seal Test
Test Test Standing Test
Sample
in N.sub.1
Before
After
Aging Aging
Before
After
Before
After
Before
After
Before
After
No Plating
Aging.sup.(2)
Aging.sup.(2)
(hours)
(hours)
Aging
Aging
Aging
Aging
Aging
Aging
Aging
Aging
__________________________________________________________________________
1 0 2 4 15 0 1 1 0 0 1 3 2 3
.sup. 2.sup.(1)
0 0 0 30 15 0 0 0 0 0 1 0 1
3 1.2 1 0 30 15 0 1 0 0 1 1 1 1
4 2.3 0 0 50 30 0 0 0 0 0 0 0 1
5 5.2 0 0 75 50 0 0 0 0 0 0 0 1
6 7.5 0 0 150 50 0 0 0 0 0 0 0 0
7 10.2 0 0 200 75 0 0 0 0 0 0 0 0
8 21.3 0 0 >200 150 0 0 0 0 0 0 0 0
9 30.6 0 0 >200 150 0 0 0 0 0 0 0 0
10 39.5 0 0 >200 150 0 0 0 1 0 0 0 0
11 52.4 0 0 >200 150 0 0 3 2 0 0 0 0
12 58.0 0 0 150 75 0 0 5 5 0 2 0 0
13 69.3 0 0 150 75 0 0 10 7 0 5 1 2
14 76.5 1 0 75 50 0 1 10 7 3 5 3 5
15 83.7 0 0 50 30 1 1 10 10 5 7 4 7
__________________________________________________________________________
.sup.(1) Sintered in H.sub.2 atmosphere at 800° C.
.sup.(2) Aging was conducted by heating goldplated test pieces in the air
at 450° C. for 10 minutes to impart an aging effect (i.e., to
impart a corroding effect in the process).
Example 1 was repeated except that 5% of Fe was included in an Ni/Co alloy. Substantially the same results as in Example 1 were obtained.
While the invention has been described in detail and with reference to specific embodiment thereof, it will be apparent to one skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope thereof.
Claims (2)
1. An electronic component, comprising a member consisting of:
a ceramic board substrate having a metallized surface formed thereon;
a metal alloy layer coated on the substrate, the metal alloy layer consisting essentially of nickel and cobalt, wherein the cobalt is contained in an amount of 7 to 40% by weight, wherein the metal alloy layer is formed in a thickness of 0.5 to 5 microns; and
a gold-plated outer surface layer coated on said metal alloy, said gold-plated outer surface layer forming the outer-most surface of the electronic component, wherein the gold-plated outer surface layer is formed in a thickness of .[.0.5.]. .Iadd.1.5 .Iaddend.to 2 microns.
2. The electronic component of claim 1, wherein the balance of said alloy is nickel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US07/800,462 USRE34484E (en) | 1978-09-05 | 1991-11-29 | Gold-plated electronic components |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP53108976A JPS6013078B2 (en) | 1978-09-05 | 1978-09-05 | Gold-plated electronic components and their manufacturing method |
| JP53-108976 | 1978-09-05 | ||
| US7275079A | 1979-09-05 | 1979-09-05 | |
| US06/344,158 US4465742A (en) | 1978-09-05 | 1982-01-29 | Gold-plated electronic components |
| US07/800,462 USRE34484E (en) | 1978-09-05 | 1991-11-29 | Gold-plated electronic components |
Related Parent Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US7275079A Continuation | 1978-09-05 | 1979-09-05 | |
| US06/344,158 Reissue US4465742A (en) | 1978-09-05 | 1982-01-29 | Gold-plated electronic components |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| USRE34484E true USRE34484E (en) | 1993-12-21 |
Family
ID=27469686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US07/800,462 Expired - Lifetime USRE34484E (en) | 1978-09-05 | 1991-11-29 | Gold-plated electronic components |
Country Status (1)
| Country | Link |
|---|---|
| US (1) | USRE34484E (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5679469A (en) * | 1994-08-02 | 1997-10-21 | Sumitomo Electric Industries, Ltd. | Metallized ceramic substrate having smooth plating layer and method for producing the same |
| US6248964B1 (en) | 1999-03-30 | 2001-06-19 | Bourns, Inc. | Thick film on metal encoder element |
| US6420205B1 (en) | 1999-03-24 | 2002-07-16 | Kyocera Corporation | Method for producing package for housing photosemiconductor element |
| US6758387B1 (en) * | 1999-10-20 | 2004-07-06 | Senju Metal Industry Co., Ltd. | Solder coated material and method for its manufacture |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3691289A (en) * | 1970-10-22 | 1972-09-12 | Minnesota Mining & Mfg | Packaging of semiconductor devices |
| US3707358A (en) * | 1969-06-27 | 1972-12-26 | Philips Corp | Crystal support for a semiconductor crystal |
| US3708405A (en) * | 1969-01-22 | 1973-01-02 | Furukawa Electric Co Ltd | Process for continuously producing nickel or nickel-gold coated wires |
| US3729820A (en) * | 1969-03-12 | 1973-05-01 | Hitachi Ltd | Method for manufacturing a package of a semiconductor element |
| US3778576A (en) * | 1970-01-29 | 1973-12-11 | Echlin Manuf Corp | Tungsten electrical switching contacts |
| US3963455A (en) * | 1973-01-12 | 1976-06-15 | Lea-Ronal, Inc. | Electrodeposited gold plating |
-
1991
- 1991-11-29 US US07/800,462 patent/USRE34484E/en not_active Expired - Lifetime
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3708405A (en) * | 1969-01-22 | 1973-01-02 | Furukawa Electric Co Ltd | Process for continuously producing nickel or nickel-gold coated wires |
| US3729820A (en) * | 1969-03-12 | 1973-05-01 | Hitachi Ltd | Method for manufacturing a package of a semiconductor element |
| US3707358A (en) * | 1969-06-27 | 1972-12-26 | Philips Corp | Crystal support for a semiconductor crystal |
| US3778576A (en) * | 1970-01-29 | 1973-12-11 | Echlin Manuf Corp | Tungsten electrical switching contacts |
| US3691289A (en) * | 1970-10-22 | 1972-09-12 | Minnesota Mining & Mfg | Packaging of semiconductor devices |
| US3963455A (en) * | 1973-01-12 | 1976-06-15 | Lea-Ronal, Inc. | Electrodeposited gold plating |
Non-Patent Citations (2)
| Title |
|---|
| F. A. Lowenheim, Electroplating, McGraw Hill Book Co., New York, 1978, pp. 416 419. * |
| F. A. Lowenheim, Electroplating, McGraw-Hill Book Co., New York, 1978, pp. 416-419. |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5679469A (en) * | 1994-08-02 | 1997-10-21 | Sumitomo Electric Industries, Ltd. | Metallized ceramic substrate having smooth plating layer and method for producing the same |
| US6420205B1 (en) | 1999-03-24 | 2002-07-16 | Kyocera Corporation | Method for producing package for housing photosemiconductor element |
| US6248964B1 (en) | 1999-03-30 | 2001-06-19 | Bourns, Inc. | Thick film on metal encoder element |
| US6758387B1 (en) * | 1999-10-20 | 2004-07-06 | Senju Metal Industry Co., Ltd. | Solder coated material and method for its manufacture |
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