USH663H - High density probe head for chip testing - Google Patents
High density probe head for chip testing Download PDFInfo
- Publication number
- USH663H USH663H US07/143,511 US14351188A USH663H US H663 H USH663 H US H663H US 14351188 A US14351188 A US 14351188A US H663 H USH663 H US H663H
- Authority
- US
- United States
- Prior art keywords
- probe
- probe head
- frame
- fused silica
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07314—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
- G01R1/07321—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support the probes being of different lengths
Definitions
- the present invention relates to probe heads having a plurality of probe points for use in probing interior and perimeter bonding pads of a chip.
- the testing procedure is for the probe head to be lowered onto the particular dye to be tested within the wafer, with the probe "fingers" lowered to contact the bonding pads to made electrical connections for testing.
- the fingers bring out the electrical paths to a test computer or similar machine which applies stimuli to the input pins and records responses on the output pins to determine whether the chip is good.
- the probe head is raised and moved to a new location over another dye on the wafer to be tested. Process is repeated for each dye on the wafer until all of the chips have been tested.
- the aforementioned probe heads of the prior art are designed to make electrical contact with a large number of bonding pads corresponding to a large number of I/0 pins and power pins.
- the manufacture and maintenance of such probe heads is expensive and the probe heads themselves are easily damaged.
- the probe lead wires from the test computer typically enter in a single planar surface and touch bonding pads that are located on the periphery of he chip to be tested.
- This design and location of the probe fingers makes for an extremely dense and large probe head since the probes are fixed in a conical radial array corresponding to the periphery of the chip.
- This radial design necessarily forces the outer diameter of the probe head with the connecting wires to be quite large.
- the present invention overcomes the above-enumerated problems and other shortcomings associated with current chip testing devices.
- FIG. 1 is a perspective view of an embodiment of a probe head in accordance with the principles of the present invention
- FIG. 2 is a cross-sectional view of the probe head embodiment shown in FIG. 1, viewed from the top;
- FIG. 3 is a partial side view of the probe head embodiment shown in FIG. 1;
- FIG. 4 is a partial cut-away side view of the probe head embodiment shown in FIG. 1.
- the present invention relates to a probe head of substantially rectangular construction for use in the testing of chips.
- the probe head has a body disposed about the perimeter of a fused silica window.
- Probe points extend in a high-density fixed configuration through the fused silica window. These probe points are formed at one end of continuous probe leads, the other ends of which are brought out to either twisted pair or shielded coaxial connections to a test computer which can compare the input stimulus to the output responses to determine the appropriate functioning of the chip.
- the probe leads are disposed in a plurality of layers, such that interior surface, as well as perimeter, probing and testing of chips is facilitated.
- the probe head also includes a depth-limit plate extending over the edge of the fused silica window and connecting to the probe head body. This depth-limit plate prevents the probe points from being deformed due to excess downward pressure during the test process and holds the fused silica window in place.
- An advantage of one embodiment of the present invention is that its reduced size in comparison to prior art devices reduces the amount of exposed wire and allows high-speed testing with very little noise or crosstalk between the probe wires, a feature which has good application for gallium arsenide logic.
- Another advantage of one embodiment of the present invention is its capacity to be custom-designed to the type of chip being manufactured at a very low cost.
- Yet another advantage of one embodiment of the present invention is its capacity for miniaturization, thus allowing compatibility with other miniaturized electrical components.
- Still another advantage of one embodiment of the present invention lies in its disposal of probe leads in a plurality of layers, such that interior surface, as well as perimeter, probing and testing of a chip is facilitated.
- the probe head 20 contains a number of electrically conductive probe leads 22 disposed about the substantially rectangular body 24 of the probe head 20.
- said probe leads are very small gold alloy wires.
- the body 24 is multi-layered and frame-like in construction, forming a rectangular border about a substantially transparent fused silica window 26, through which probe points 28 of the probe leads 22 extend.
- any rigid support for the probe leads could be used in place of the fused silica window.
- Dimensions of the preferred embodiment of the device are very small; the probe head 20 is intended to be 100 mils long, 100 mils wide, and 30 mils deep.
- the probe leads 22 are intended to be 4 mils in diameter.
- the probe leads 22 of the preferred embodiment enter the body 24 in a substantially perpendicular direction to the plane in which the top of the body 24 rests.
- Each lead 22 may vertically extend, in the preferred embodiment, for example to one of five different levels, at which point it horizontally pierces the body.
- Each of the leads 22 then extends horizontally through and out the frame-like body 24, such that the lead is disposed in the interior portion of the body, above some point of the fused silica window 26.
- the lead 22 then drops perpendicularly from its substantially horizontal position, such that it extends through open space in the interior of the body 24 before vertically piercing and extending through the fused silica window 26.
- the varied paths of individual probe leads 22 are best illustrated by a combination of FIGS. 2, 3 and 4.
- the ends 28 of the leads 22 which extend through the fused silica window 26 are disposed at substantially the same distance between the surface of the fused silica window 26 and said ends, hereinafter referred to as probe points 28.
- the positioning of probe points 28 such that they are disposed over a substantial portion of the fused silica window 26, along with their characteristic as being of substantially similar distance from the surface of the fused silica window 26, facilitates the probing of a chip for test purposes.
- Depth control on the apparatus is accomplished through the presence of a depth-limit plate 30 which extends over the edge of the fused silica window 26 and connects to the body 24. This plate 30 prevents the probe points 28 from being deformed due to excess downward pressure during the test process and holds the fused silica window 26 in place.
- the probe head 20 is placed into contact with a chip under testing such that each probe point 28 electrically connects to a bonding pad of the chip.
- the probe leads 22 are brought out to either twisted pair or shielded coaxial connections to a test computer which can compare the input stimulus to the output responses to determine the appropriate functioning of the chip. In this fashion, chips may be tested before they are sliced from the wafer on which they are manufactured, thus reducing the cost of packaging faulty components.
- the probe head 20 may possess custom-designed probe points 28 which correspond to a specific type of chip.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
Description
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/143,511 USH663H (en) | 1988-01-13 | 1988-01-13 | High density probe head for chip testing |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/143,511 USH663H (en) | 1988-01-13 | 1988-01-13 | High density probe head for chip testing |
Publications (1)
Publication Number | Publication Date |
---|---|
USH663H true USH663H (en) | 1989-08-01 |
Family
ID=22504405
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/143,511 Abandoned USH663H (en) | 1988-01-13 | 1988-01-13 | High density probe head for chip testing |
Country Status (1)
Country | Link |
---|---|
US (1) | USH663H (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113376503A (en) * | 2021-04-29 | 2021-09-10 | 苏州通富超威半导体有限公司 | Device manufacturing method for chip testing |
-
1988
- 1988-01-13 US US07/143,511 patent/USH663H/en not_active Abandoned
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113376503A (en) * | 2021-04-29 | 2021-09-10 | 苏州通富超威半导体有限公司 | Device manufacturing method for chip testing |
CN113376503B (en) * | 2021-04-29 | 2022-12-06 | 苏州通富超威半导体有限公司 | Device manufacturing method for chip testing |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5422574A (en) | Large scale protrusion membrane for semiconductor devices under test with very high pin counts | |
US4724383A (en) | PC board test fixture | |
US5428298A (en) | Probe structure for testing a semiconductor chip and a press member for same | |
US4780670A (en) | Active probe card for high resolution/low noise wafer level testing | |
US4518914A (en) | Testing apparatus of semiconductor wafers | |
US6456099B1 (en) | Special contact points for accessing internal circuitry of an integrated circuit | |
US3803483A (en) | Semiconductor structure for testing of metallization networks on insulative substrates supporting semiconductor chips | |
US3746973A (en) | Testing of metallization networks on insulative substrates supporting semiconductor chips | |
US5838023A (en) | Ancillary pads for on-circuit array probing composed of I/O and test pads | |
EP0577333A1 (en) | Temporary connections for fast electrical access to electronic devices | |
JPH11125645A (en) | Vertical needle type probe card and its manufacture | |
US5929649A (en) | Method and apparatus for electrical parasitic measurement of pin grid array | |
USH663H (en) | High density probe head for chip testing | |
US5085084A (en) | Method and apparatus for testing lead bonds and detecting failure | |
JPH10153644A (en) | Adaptor module for bga device test | |
JP2764854B2 (en) | Probe card and inspection method | |
US7474113B2 (en) | Flexible head probe for sort interface units | |
JP2000106257A (en) | Socket for inspecting semiconductor element, semiconductor device, manufacture of the semiconductor device, and method for inspecting the semiconductor device | |
JPH08285890A (en) | Probe card | |
JP4097003B2 (en) | Semiconductor chip package quality inspection method and apparatus | |
JPS59762Y2 (en) | probe card | |
US6597188B1 (en) | Ground land for singulated ball grid array | |
US6525553B1 (en) | Ground pin concept for singulated ball grid array | |
JPS6047433A (en) | Test equipment for multikind loading wafer | |
JPS60206149A (en) | Wafer testing equipment |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: CRAY RESEARCH, INC., 608 SECOND AVENUE SOUTH, MINN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:MASSOPUST, DAN;REEL/FRAME:004822/0182 Effective date: 19880106 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
AS | Assignment |
Owner name: TERA COMPUTER COMPANY, WASHINGTON Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CRAY RESEARCH, L.L.C.;REEL/FRAME:011231/0132 Effective date: 20000524 |
|
AS | Assignment |
Owner name: CRAY, INC., WASHINGTON Free format text: CHANGE OF NAME;ASSIGNOR:TERA COMPUTER COMPANY;REEL/FRAME:011712/0145 Effective date: 20010423 |
|
AS | Assignment |
Owner name: CRAY INC., WASHINGTON Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE, FILED ON 12-31-2001. RECORDED ON REEL 012322, FRAME 0143;ASSIGNOR:TERA COMPUTER COMPANY;REEL/FRAME:012322/0143 Effective date: 20000403 |
|
AS | Assignment |
Owner name: WELLS FARGO BANK, N.A., CALIFORNIA Free format text: SECURITY AGREEMENT;ASSIGNOR:CRAY INC.;REEL/FRAME:016446/0675 Effective date: 20050531 |